ARM Packages: Moved ARM assembly files to 'Arm' subdirectory
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13772 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
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//
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// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmPlatformLib.h>
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#include <AutoGen.h>
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#include <ArmPlatform.h>
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.text
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.align 3
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GCC_ASM_EXPORT(ArmPlatformSecBootAction)
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GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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ASM_PFX(ArmPlatformSecBootAction):
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bx lr
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/**
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Initialize the memory where the initial stacks will reside
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This memory can contain the initial stacks (Secure and Secure Monitor stacks).
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In some platform, this region is already initialized and the implementation of this function can
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do nothing. This memory can also represent the Secure RAM.
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This function is called before the satck has been set up. Its implementation must ensure the stack
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pointer is not used (probably required to use assembly language)
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**/
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ASM_PFX(ArmPlatformSecBootMemoryInit):
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// The SMC does not need to be initialized for RTSM
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bx lr
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@@ -0,0 +1,54 @@
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//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmPlatformLib.h>
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#include <AutoGen.h>
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#include <ArmPlatform.h>
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmPlatformSecBootAction
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EXPORT ArmPlatformSecBootMemoryInit
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PRESERVE8
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AREA RTSMVExpressBootMode, CODE, READONLY
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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ArmPlatformSecBootAction
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bx lr
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/**
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Initialize the memory where the initial stacks will reside
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This memory can contain the initial stacks (Secure and Secure Monitor stacks).
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In some platform, this region is already initialized and the implementation of this function can
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do nothing. This memory can also represent the Secure RAM.
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This function is called before the satck has been set up. Its implementation must ensure the stack
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pointer is not used (probably required to use assembly language)
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**/
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ArmPlatformSecBootMemoryInit
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// The SMC does not need to be initialized for RTSM
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bx lr
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END
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@@ -0,0 +1,71 @@
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#
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# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http:#opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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#.include AsmMacroIoLib.inc
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#include <Chipset/ArmCortexA9.h>
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.text
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.align 2
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GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
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# IN None
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# OUT r0 = SCU Base Address
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ASM_PFX(ArmGetScuBaseAddress):
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# Read Configuration Base Address Register. ArmCBar cannot be called to get
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# the Configuration BAR as a stack is not necessary setup. The SCU is at the
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# offset 0x0000 from the Private Memory Region.
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mrc p15, 4, r0, c15, c0, 0
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bx lr
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# IN None
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# OUT r0 = number of cores present in the system
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ASM_PFX(ArmGetCpuCountPerCluster):
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stmfd SP!, {r1-r2}
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# Read CP15 MIDR
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mrc p15, 0, r1, c0, c0, 0
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# Check if the CPU is A15
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mov r1, r1, LSR #4
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LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
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and r1, r1, r0
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LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
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cmp r1, r0
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beq _Read_cp15_reg
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_CPU_is_not_A15:
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mov r2, lr @ Save link register
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bl ArmGetScuBaseAddress @ Read SCU Base Address
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mov lr, r2 @ Restore link register val
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ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count
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b _Return
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_Read_cp15_reg:
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mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count
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lsr r0, #24
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_Return:
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and r0, r0, #3
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# Add '1' to the number of CPU on the Cluster
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add r0, r0, #1
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ldmfd SP!, {r1-r2}
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bx lr
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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//
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// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <Chipset/ArmCortexA9.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmGetCpuCountPerCluster
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AREA RTSMHelper, CODE, READONLY
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// IN None
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// OUT r0 = SCU Base Address
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ArmGetScuBaseAddress
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// Read Configuration Base Address Register. ArmCBar cannot be called to get
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// the Configuration BAR as a stack is not necessary setup. The SCU is at the
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// offset 0x0000 from the Private Memory Region.
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mrc p15, 4, r0, c15, c0, 0
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bx lr
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// IN None
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// OUT r0 = number of cores present in the system
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ArmGetCpuCountPerCluster
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stmfd SP!, {r1-r2}
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// Read CP15 MIDR
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mrc p15, 0, r1, c0, c0, 0
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// Check if the CPU is A15
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mov r1, r1, LSR #4
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mov r0, #ARM_CPU_TYPE_MASK
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and r1, r1, r0
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mov r0, #ARM_CPU_TYPE_A15
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cmp r1, r0
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beq _Read_cp15_reg
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_CPU_is_not_A15
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mov r2, lr ; Save link register
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bl ArmGetScuBaseAddress ; Read SCU Base Address
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mov lr, r2 ; Restore link register val
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ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] ; Read SCU Config reg to get CPU count
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b _Return
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_Read_cp15_reg
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mrc p15, 1, r0, c9, c0, 2 ; Read C9 register of CP15 to get CPU count
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lsr r0, #24
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_Return
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and r0, r0, #3
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// Add '1' to the number of CPU on the Cluster
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add r0, r0, #1
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ldmfd SP!, {r1-r2}
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bx lr
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END
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