UefiCpuPkg: Remove X86 ASM and S files
NASM has replaced ASM and S files. 1. Remove ASM from all modules expect for the ones in ResetVector directory. The ones in ResetVector directory are included by Vtf0.nasmb. They are also nasm style. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
@@ -3,7 +3,7 @@
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#
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# The library routines are UEFI specification compliant.
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#
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# Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@@ -30,12 +30,10 @@
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#
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[Sources.IA32]
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Ia32/InitializeFpu.asm
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Ia32/InitializeFpu.nasm
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Ia32/InitializeFpu.S
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[Sources.X64]
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X64/InitializeFpu.asm
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X64/InitializeFpu.nasm
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X64/InitializeFpu.S
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@@ -1,79 +0,0 @@
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;*
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;------------------------------------------------------------------------------
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.686
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.model flat,C
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.const
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;
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; Float control word initial value:
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; all exceptions masked, double-precision, round-to-nearest
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;
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mFpuControlWord DW 027Fh
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;
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; Multimedia-extensions control word:
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; all exceptions masked, round-to-nearest, flush to zero for masked underflow
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;
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mMmxControlWord DD 01F80h
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.xmm
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.code
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;
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; Initializes floating point units for requirement of UEFI specification.
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;
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; This function initializes floating-point control word to 0x027F (all exceptions
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; masked,double-precision, round-to-nearest) and multimedia-extensions control word
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; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
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; for masked underflow).
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;
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InitializeFloatingPointUnits PROC PUBLIC
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push ebx
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;
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; Initialize floating point units
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;
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finit
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fldcw mFpuControlWord
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;
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; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; whether the processor supports SSE instruction.
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;
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mov eax, 1
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cpuid
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bt edx, 25
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jnc Done
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;
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; Set OSFXSR bit 9 in CR4
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;
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mov eax, cr4
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or eax, BIT9
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mov cr4, eax
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;
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; The processor should support SSE instruction and we can use
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; ldmxcsr instruction
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;
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ldmxcsr mMmxControlWord
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Done:
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pop ebx
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ret
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InitializeFloatingPointUnits ENDP
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END
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@@ -1,62 +0,0 @@
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;*
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;------------------------------------------------------------------------------
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.const
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;
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; Float control word initial value:
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; all exceptions masked, double-extended-precision, round-to-nearest
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;
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mFpuControlWord DW 037Fh
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;
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; Multimedia-extensions control word:
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; all exceptions masked, round-to-nearest, flush to zero for masked underflow
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;
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mMmxControlWord DD 01F80h
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.code
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;
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; Initializes floating point units for requirement of UEFI specification.
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;
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; This function initializes floating-point control word to 0x027F (all exceptions
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; masked,double-precision, round-to-nearest) and multimedia-extensions control word
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; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
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; for masked underflow).
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;
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InitializeFloatingPointUnits PROC PUBLIC
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;
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; Initialize floating point units
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;
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; The following opcodes stand for instruction 'finit'
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; to be supported by some 64-bit assemblers
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;
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DB 9Bh, 0DBh, 0E3h
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fldcw mFpuControlWord
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;
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; Set OSFXSR bit 9 in CR4
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;
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mov rax, cr4
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or rax, BIT9
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mov cr4, rax
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ldmxcsr mMmxControlWord
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ret
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InitializeFloatingPointUnits ENDP
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END
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