UefiPayloadPkg: Fix issues when MULTIPLE_DEBUG_PORT_SUPPORT is true

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4427

1. Since UART speed is slower than CPU, BIOS need to check the write
   buffer is empty, to avoid overwrite the buffer content.
2. LPSS UART might disable MMIO space for Windows debug usage during
   ExitBootServices event. BIOS need to avoid access the MMIO space
   after ExitBootServices.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: PaytonX Hsieh <paytonx.hsieh@intel.com>
This commit is contained in:
PaytonX Hsieh
2023-04-26 20:36:56 +08:00
committed by mergify[bot]
parent 56e9828380
commit 23c71536ef
4 changed files with 120 additions and 3 deletions

View File

@@ -52,7 +52,8 @@ typedef struct {
} UART_INFO;
UART_INFO mUartInfo[MAX_SIZE];
UINT8 mUartCount = 0;
UINT8 mUartCount = 0;
BOOLEAN mBaseSerialPortLibHobAtRuntime = FALSE;
/**
Reads an 8-bit register. If UseMmio is TRUE, then the value is read from
@@ -285,6 +286,11 @@ SerialPortWrite (
UseMmio = mUartInfo[Count].UseMmio;
Stride = mUartInfo[Count].RegisterStride;
if (UseMmio && mBaseSerialPortLibHobAtRuntime) {
Count++;
continue;
}
if (BaseAddress == 0) {
Count++;
continue;
@@ -294,6 +300,13 @@ SerialPortWrite (
BytesLeft = NumberOfBytes;
while (BytesLeft != 0) {
//
// Wait for the serial port to be ready, to make sure both the transmit FIFO
// and shift register empty.
//
while ((SerialPortReadRegister (BaseAddress, R_UART_LSR, UseMmio, Stride) & B_UART_LSR_TXRDY) == 0) {
}
//
// Fill the entire Tx FIFO
//