UefiPayloadPkg: Fix issues when MULTIPLE_DEBUG_PORT_SUPPORT is true
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4427 1. Since UART speed is slower than CPU, BIOS need to check the write buffer is empty, to avoid overwrite the buffer content. 2. LPSS UART might disable MMIO space for Windows debug usage during ExitBootServices event. BIOS need to avoid access the MMIO space after ExitBootServices. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: PaytonX Hsieh <paytonx.hsieh@intel.com>
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mergify[bot]
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@@ -52,7 +52,8 @@ typedef struct {
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} UART_INFO;
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UART_INFO mUartInfo[MAX_SIZE];
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UINT8 mUartCount = 0;
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UINT8 mUartCount = 0;
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BOOLEAN mBaseSerialPortLibHobAtRuntime = FALSE;
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/**
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Reads an 8-bit register. If UseMmio is TRUE, then the value is read from
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@@ -285,6 +286,11 @@ SerialPortWrite (
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UseMmio = mUartInfo[Count].UseMmio;
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Stride = mUartInfo[Count].RegisterStride;
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if (UseMmio && mBaseSerialPortLibHobAtRuntime) {
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Count++;
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continue;
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}
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if (BaseAddress == 0) {
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Count++;
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continue;
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@@ -294,6 +300,13 @@ SerialPortWrite (
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BytesLeft = NumberOfBytes;
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while (BytesLeft != 0) {
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//
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// Wait for the serial port to be ready, to make sure both the transmit FIFO
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// and shift register empty.
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//
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while ((SerialPortReadRegister (BaseAddress, R_UART_LSR, UseMmio, Stride) & B_UART_LSR_TXRDY) == 0) {
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}
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//
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// Fill the entire Tx FIFO
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//
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