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CorebootPayloadPkg/PlatformBdsLib: Pass more serial parameters

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Pass the serial port baudrate, register stride, input clock rate and
ID from coreboot to CorebootPayloadPkg.

Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
This commit is contained in:
Leahy, Leroy P
2016-05-09 10:57:55 -07:00
committed by Prince Agyeman
parent deac23ab96
commit 24ca2f3507
7 changed files with 128 additions and 23 deletions
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53
CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
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@@ -14,10 +14,23 @@
#include <Base.h>
#include <Uefi/UefiBaseType.h>
#include <Library/PciLib.h>
#include <Library/PlatformHookLib.h>
#include <Library/CbParseLib.h>
#include <Library/PcdLib.h>
typedef struct {
UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.
UINT16 DeviceId; ///< Device ID to match the PCI device
UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz
UINT64 Offset; ///< The byte offset into to the BAR
UINT8 BarIndex; ///< Which BAR to get the UART base address
UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.
UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
UINT8 Reserved[2];
} PCI_SERIAL_PARAMETER;
/**
Performs platform specific initialization required for the CPU to access
the hardware associated with a SerialPortLib instance. This function does
@@ -38,8 +51,16 @@ PlatformHookSerialPortInitialize (
RETURN_STATUS Status;
UINT32 SerialRegBase;
UINT32 SerialRegAccessType;
UINT32 BaudRate;
UINT32 RegWidth;
UINT32 InputHertz;
UINT32 PayloadParam;
UINT32 DeviceVendor;
PCI_SERIAL_PARAMETER *SerialParam;
Status = CbParseSerialInfo (&SerialRegBase, &SerialRegAccessType, NULL);
Status = CbParseSerialInfo (&SerialRegBase, &SerialRegAccessType,
&RegWidth, &BaudRate, &InputHertz,
&PayloadParam);
if (RETURN_ERROR (Status)) {
return Status;
}
@@ -57,6 +78,34 @@ PlatformHookSerialPortInitialize (
return Status;
}
Status = PcdSet32S (PcdSerialRegisterStride, RegWidth);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet32S (PcdSerialBaudRate, BaudRate);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet64S (PcdUartDefaultBaudRate, BaudRate);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet32S (PcdSerialClockRate, InputHertz);
if (RETURN_ERROR (Status)) {
return Status;
}
if (PayloadParam >= 0x80000000) {
DeviceVendor = PciRead32 (PayloadParam & 0x0ffff000);
SerialParam = PcdGetPtr(PcdPciSerialParameters);
SerialParam->VendorId = (UINT16)DeviceVendor;
SerialParam->DeviceId = DeviceVendor >> 16;
SerialParam->ClockRate = InputHertz;
SerialParam->RegisterStride = (UINT8)RegWidth;
}
return RETURN_SUCCESS;
}