ArmPkg: Added Aarch64 support
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14486 6f19259b-4bc3-4df7-8a09-765794883524
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Harry Liebel
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oliviermartin
oliviermartin
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ArmPkg/Include/AsmMacroIoLibV8.h
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ArmPkg/Include/AsmMacroIoLibV8.h
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/** @file
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Macros to work around lack of Apple support for LDR register, =expr
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __MACRO_IO_LIBV8_H__
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#define __MACRO_IO_LIBV8_H__
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#if defined (__GNUC__)
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#define MmioWrite32(Address, Data) \
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ldr x1, =Address ; \
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ldr x0, =Data ; \
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str x0, [x1]
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#define MmioOr32(Address, OrData) \
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ldr x1, =Address ; \
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ldr x2, =OrData ; \
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ldr x0, [x1] ; \
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orr x0, x0, x2 ; \
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str x0, [x1]
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#define MmioAnd32(Address, AndData) \
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ldr x1, =Address ; \
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ldr x2, =AndData ; \
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ldr x0, [x1] ; \
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and x0, x0, x2 ; \
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str x0, [x1]
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#define MmioAndThenOr32(Address, AndData, OrData) \
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ldr x1, =Address ; \
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ldr x0, [x1] ; \
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ldr x2, =AndData ; \
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and x0, x0, x2 ; \
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ldr x2, =OrData ; \
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orr x0, x0, x2 ; \
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str x0, [x1]
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#define MmioWriteFromReg32(Address, Reg) \
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ldr x1, =Address ; \
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str Reg, [x1]
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#define MmioRead32(Address) \
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ldr x1, =Address ; \
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ldr x0, [x1]
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#define MmioReadToReg32(Address, Reg) \
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ldr x1, =Address ; \
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ldr Reg, [x1]
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#define LoadConstant(Data) \
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ldr x0, =Data
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#define LoadConstantToReg(Data, Reg) \
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ldr Reg, =Data
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#define SetPrimaryStack(StackTop, GlobalSize, Tmp, Tmp1) \
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ands Tmp, GlobalSize, #15 ; \
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mov Tmp1, #16 ; \
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sub Tmp1, Tmp1, Tmp ; \
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csel Tmp, Tmp1, Tmp, ne ; \
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add GlobalSize, GlobalSize, Tmp ; \
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sub sp, StackTop, GlobalSize ; \
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; \
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mov Tmp, sp ; \
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mov GlobalSize, #0x0 ; \
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_SetPrimaryStackInitGlobals: ; \
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cmp Tmp, StackTop ; \
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b.eq _SetPrimaryStackEnd ; \
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str GlobalSize, [Tmp], #8 ; \
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b _SetPrimaryStackInitGlobals ; \
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_SetPrimaryStackEnd:
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// Initialize the Global Variable with '0'
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#define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) \
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and Tmp1, GlobalSize, #15 ; \
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mov Tmp2, #16 ; \
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sub Tmp2, Tmp2, Tmp1 ; \
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add GlobalSize, GlobalSize, Tmp2 ; \
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; \
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mov Tmp1, sp ; \
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sub sp, sp, GlobalSize ; \
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mov GlobalSize, #0x0 ; \
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_InitializePrimaryStackLoop: ; \
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mov Tmp2, sp ; \
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cmp Tmp1, Tmp2 ; \
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bls _InitializePrimaryStackEnd ; \
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str GlobalSize, [Tmp1, #-8]! ; \
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b _InitializePrimaryStackLoop ; \
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_InitializePrimaryStackEnd:
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// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
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// This only selects between EL1 and EL2, else we die.
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// Provide the Macro with a safe temp xreg to use.
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#define EL1_OR_EL2(SAFE_XREG) \
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mrs SAFE_XREG, CurrentEL ;\
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cmp SAFE_XREG, #0x4 ;\
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b.eq 1f ;\
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cmp SAFE_XREG, #0x8 ;\
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b.eq 2f ;\
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b dead ;// We should never get here.
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// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
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// This only selects between EL1 and EL2 and EL3, else we die.
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// Provide the Macro with a safe temp xreg to use.
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#define EL1_OR_EL2_OR_EL3(SAFE_XREG) \
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mrs SAFE_XREG, CurrentEL ;\
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cmp SAFE_XREG, #0x4 ;\
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b.eq 1f ;\
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cmp SAFE_XREG, #0x8 ;\
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b.eq 2f ;\
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cmp SAFE_XREG, #0xC ;\
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b.eq 3f ;\
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b dead ;// We should never get here.
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#else
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//
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// Use ARM assembly macros, form armasm
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//
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// Less magic in the macros if ldr reg, =expr works
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//
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// returns _Data in X0 and _Address in X1
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#define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
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// returns Data in X0 and Address in X1, and OrData in X2
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#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
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// returns _Data in X0 and _Address in X1, and _OrData in X2
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#define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
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// returns result in X0, _Address in X1, and _OrData in X2
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#define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
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// returns _Data in _Reg and _Address in X1
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#define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
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// returns _Data in X0 and _Address in X1
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#define MmioRead32(Address) MmioRead32Macro Address
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// returns _Data in Reg and _Address in X1
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#define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
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// load X0 with _Data
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#define LoadConstant(Data) LoadConstantMacro Data
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// load _Reg with _Data
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#define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
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// conditional load testing eq flag
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#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
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#define SetPrimaryStack(StackTop,GlobalSize,Tmp, Tmp1) SetPrimaryStack StackTop, GlobalSize, Tmp, Tmp1
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#define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) InitializePrimaryStack GlobalSize, Tmp1, Tmp2
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#define EL1_OR_EL2(SAFE_XREG) EL1_OR_EL2 SAFE_XREG
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#define EL1_OR_EL2_OR_EL3(SAFE_XREG) EL1_OR_EL2_OR_EL3 SAFE_XREG
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#endif
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#endif // __MACRO_IO_LIBV8_H__
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