ArmPkg: Added Aarch64 support
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14486 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Harry Liebel
committed by
oliviermartin
oliviermartin
parent
8477cb6e15
commit
25402f5d06
275
ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimer.c
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275
ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimer.c
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/** @file
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*
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Uefi.h>
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#include <Chipset/AArch64.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/ArmLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include "AArch64Lib.h"
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#include "ArmLibPrivate.h"
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#include <Library/ArmArchTimerLib.h>
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VOID
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EFIAPI
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ArmArchTimerReadReg (
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IN ARM_ARCH_TIMER_REGS Reg,
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OUT VOID *DstBuf
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)
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{
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// Check if the Generic/Architecture timer is implemented
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if (ArmIsArchTimerImplemented ()) {
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switch (Reg) {
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case CntFrq:
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*((UINTN *)DstBuf) = ArmReadCntFrq ();
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break;
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case CntPct:
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*((UINT64 *)DstBuf) = ArmReadCntPct ();
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break;
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case CntkCtl:
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*((UINTN *)DstBuf) = ArmReadCntkCtl();
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break;
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case CntpTval:
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*((UINTN *)DstBuf) = ArmReadCntpTval ();
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break;
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case CntpCtl:
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*((UINTN *)DstBuf) = ArmReadCntpCtl ();
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break;
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case CntvTval:
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*((UINTN *)DstBuf) = ArmReadCntvTval ();
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break;
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case CntvCtl:
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*((UINTN *)DstBuf) = ArmReadCntvCtl ();
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break;
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case CntvCt:
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*((UINT64 *)DstBuf) = ArmReadCntvCt ();
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break;
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case CntpCval:
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*((UINT64 *)DstBuf) = ArmReadCntpCval ();
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break;
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case CntvCval:
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*((UINT64 *)DstBuf) = ArmReadCntvCval ();
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break;
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case CntvOff:
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*((UINT64 *)DstBuf) = ArmReadCntvOff ();
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break;
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case CnthCtl:
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case CnthpTval:
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case CnthpCtl:
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case CnthpCval:
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DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));
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break;
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default:
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DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));
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}
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} else {
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DEBUG ((EFI_D_ERROR, "Attempt to read ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));
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ASSERT (0);
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}
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}
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VOID
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EFIAPI
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ArmArchTimerWriteReg (
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IN ARM_ARCH_TIMER_REGS Reg,
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IN VOID *SrcBuf
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)
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{
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// Check if the Generic/Architecture timer is implemented
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if (ArmIsArchTimerImplemented ()) {
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switch (Reg) {
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case CntFrq:
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ArmWriteCntFrq (*((UINTN *)SrcBuf));
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break;
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case CntPct:
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DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTPCT \n"));
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break;
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case CntkCtl:
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ArmWriteCntkCtl (*((UINTN *)SrcBuf));
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break;
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case CntpTval:
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ArmWriteCntpTval (*((UINTN *)SrcBuf));
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break;
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case CntpCtl:
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ArmWriteCntpCtl (*((UINTN *)SrcBuf));
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break;
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case CntvTval:
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ArmWriteCntvTval (*((UINTN *)SrcBuf));
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break;
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case CntvCtl:
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ArmWriteCntvCtl (*((UINTN *)SrcBuf));
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break;
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case CntvCt:
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DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTVCT \n"));
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break;
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case CntpCval:
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ArmWriteCntpCval (*((UINT64 *)SrcBuf) );
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break;
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case CntvCval:
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ArmWriteCntvCval (*((UINT64 *)SrcBuf) );
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break;
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case CntvOff:
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ArmWriteCntvOff (*((UINT64 *)SrcBuf));
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break;
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case CnthCtl:
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case CnthpTval:
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case CnthpCtl:
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case CnthpCval:
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DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));
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break;
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default:
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DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));
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}
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} else {
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DEBUG ((EFI_D_ERROR, "Attempt to write to ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));
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ASSERT (0);
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}
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}
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VOID
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EFIAPI
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ArmArchTimerEnableTimer (
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VOID
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)
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{
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UINTN TimerCtrlReg;
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ArmArchTimerReadReg (CntpCtl, (VOID *)&TimerCtrlReg);
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TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;
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ArmArchTimerWriteReg (CntpCtl, (VOID *)&TimerCtrlReg);
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}
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VOID
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EFIAPI
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ArmArchTimerDisableTimer (
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VOID
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)
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{
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UINTN TimerCtrlReg;
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ArmArchTimerReadReg (CntpCtl, (VOID *)&TimerCtrlReg);
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TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
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ArmArchTimerWriteReg (CntpCtl, (VOID *)&TimerCtrlReg);
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}
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VOID
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EFIAPI
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ArmArchTimerSetTimerFreq (
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IN UINTN FreqInHz
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)
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{
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ArmArchTimerWriteReg (CntFrq, (VOID *)&FreqInHz);
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}
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UINTN
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EFIAPI
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ArmArchTimerGetTimerFreq (
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VOID
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)
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{
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UINTN ArchTimerFreq = 0;
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ArmArchTimerReadReg (CntFrq, (VOID *)&ArchTimerFreq);
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return ArchTimerFreq;
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}
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UINTN
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EFIAPI
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ArmArchTimerGetTimerVal (
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VOID
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)
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{
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UINTN ArchTimerVal;
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ArmArchTimerReadReg (CntpTval, (VOID *)&ArchTimerVal);
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return ArchTimerVal;
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}
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VOID
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EFIAPI
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ArmArchTimerSetTimerVal (
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IN UINTN Val
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)
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{
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ArmArchTimerWriteReg (CntpTval, (VOID *)&Val);
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}
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UINT64
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EFIAPI
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ArmArchTimerGetSystemCount (
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VOID
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)
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{
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UINT64 SystemCount;
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ArmArchTimerReadReg (CntPct, (VOID *)&SystemCount);
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return SystemCount;
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}
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UINTN
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EFIAPI
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ArmArchTimerGetTimerCtrlReg (
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VOID
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)
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{
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UINTN Val;
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ArmArchTimerReadReg (CntpCtl, (VOID *)&Val);
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return Val;
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}
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VOID
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EFIAPI
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ArmArchTimerSetTimerCtrlReg (
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UINTN Val
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)
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{
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ArmArchTimerWriteReg (CntpCtl, (VOID *)&Val);
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}
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VOID
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EFIAPI
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ArmArchTimerSetCompareVal (
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IN UINT64 Val
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)
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{
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ArmArchTimerWriteReg (CntpCval, (VOID *)&Val);
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}
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