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MdeModulePkg/Xhci: make all timeout values be consistent with comments.

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In the original code, there exists some mismatches between the real
waiting time and the corresponding timeout comments. For example, the
XHC_GENERIC_TIMEOUT comment says it's 10ms timeout value, but the real
code in fact waits 10s.

So the code is refined to be consistent in code logic and comments.

Note XHC_POLL_DELAY macro also be removed and the polling interval in
XhcWaitOpRegBit() is changed from 1ms to 1us to keep same code style
with other code. It has no real functionality impact.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18235 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Feng Tian
2015-08-19 03:41:38 +00:00
committed by erictian
parent 1d7258fa53
commit 26cd2d6d2d
6 changed files with 29 additions and 35 deletions
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16
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
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@@ -2,7 +2,7 @@
The XHCI register operation routines.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -499,7 +499,7 @@ XhcClearOpRegBit (
@param Offset The offset of the operation register.
@param Bit The bit of the register to wait for.
@param WaitToSet Wait the bit to set or clear.
@param Timeout The time to wait before abort (in microsecond, us).
@param Timeout The time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The bit successfully changed by host controller.
@retval EFI_TIMEOUT The time out occurred.
@@ -515,16 +515,16 @@ XhcWaitOpRegBit (
)
{
UINT32 Index;
UINTN Loop;
UINT64 Loop;
Loop = (Timeout / XHC_POLL_DELAY) + 1;
Loop = Timeout * XHC_1_MILLISECOND;
for (Index = 0; Index < Loop; Index++) {
if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
return EFI_SUCCESS;
}
gBS->Stall (XHC_POLL_DELAY);
gBS->Stall (XHC_1_MICROSECOND);
}
return EFI_TIMEOUT;
@@ -656,7 +656,7 @@ XhcIsSysError (
Reset the XHCI host controller.
@param Xhc The XHCI Instance.
@param Timeout Time to wait before abort (in microsecond, us).
@param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The XHCI host controller is reset.
@return Others Failed to reset the XHCI before Timeout.
@@ -698,7 +698,7 @@ XhcResetHC (
Halt the XHCI host controller.
@param Xhc The XHCI Instance.
@param Timeout Time to wait before abort (in microsecond, us).
@param Timeout Time to wait before abort (in millisecond, ms).
@return EFI_SUCCESS The XHCI host controller is halt.
@return EFI_TIMEOUT Failed to halt the XHCI before Timeout.
@@ -722,7 +722,7 @@ XhcHaltHC (
Set the XHCI host controller to run.
@param Xhc The XHCI Instance.
@param Timeout Time to wait before abort (in microsecond, us).
@param Timeout Time to wait before abort (in millisecond, ms).
@return EFI_SUCCESS The XHCI host controller is running.
@return EFI_TIMEOUT Failed to set the XHCI to run before Timeout.