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ArmPkg: Added new ARM Processor Feature Register definitions

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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15552 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin
2014-06-03 16:39:23 +00:00
committed by oliviermartin
parent 01674afdad
commit 27331bff97
3 changed files with 9 additions and 3 deletions
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ArmPkg/Include/Chipset/AArch64.h
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@@ -33,6 +33,7 @@
// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
#define AARCH64_PFR0_FP (0xF << 16)
#define AARCH64_PFR0_GIC (0xF << 24)
// SCR - Secure Configuration Register definitions
#define SCR_NS (1 << 0)