ArmPlatformPkg: Added support for Aarch64 AEM RTSM model
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14490 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Harry Liebel
committed by
oliviermartin
oliviermartin
parent
1bc8326695
commit
27be3601d2
@@ -0,0 +1,71 @@
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#
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#include <AsmMacroIoLibV8.h>
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 2
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GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
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GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
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GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
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ASM_PFX(ArmPlatformPeiBootAction):
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ret
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# IN None
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# OUT x0 = number of cores present in the system
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ASM_PFX(ArmGetCpuCountPerCluster):
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x0)
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ldrh w0, [x0]
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ret
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//UINTN
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//ArmPlatformIsPrimaryCore (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformIsPrimaryCore):
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
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ldrh w1, [x1]
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and x0, x0, x1
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
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ldrh w1, [x1]
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cmp w0, w1
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b.ne 1f
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mov x0, #1
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ret
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1:
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mov x0, #0
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ret
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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// With this function: CorePos = (ClusterId * 4) + CoreId
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ASM_PFX(ArmPlatformGetCorePosition):
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and x1, x0, #ARM_CORE_MASK
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and x0, x0, #ARM_CLUSTER_MASK
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add x0, x1, x0, LSR #6
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ret
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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@@ -1,5 +1,5 @@
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#/* @file
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# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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@@ -40,6 +40,9 @@
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Arm/RTSMHelper.asm | RVCT
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Arm/RTSMHelper.S | GCC
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[Sources.AARCH64]
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AArch64/RTSMHelper.S | GCC
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[FeaturePcd]
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gEmbeddedTokenSpaceGuid.PcdCacheEnable
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gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
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@@ -52,3 +55,5 @@
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmPlatformTokenSpaceGuid.PcdCoreCount
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@@ -38,6 +38,9 @@
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Arm/RTSMHelper.asm | RVCT
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Arm/RTSMHelper.S | GCC
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[Sources.AARCH64]
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AArch64/RTSMHelper.S | GCC
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[FeaturePcd]
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gEmbeddedTokenSpaceGuid.PcdCacheEnable
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gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
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@@ -50,3 +53,5 @@
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmPlatformTokenSpaceGuid.PcdCoreCount
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@@ -1,14 +1,14 @@
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/** @file
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*
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* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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@@ -61,6 +61,46 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
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// Cluster 0, Core 3
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0x0, 0x3,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
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(UINT64)0xFFFFFFFF
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},
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{
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// Cluster 1, Core 0
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0x1, 0x0,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
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(UINT64)0xFFFFFFFF
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},
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{
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// Cluster 1, Core 1
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0x1, 0x1,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
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(UINT64)0xFFFFFFFF
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},
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{
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// Cluster 1, Core 2
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0x1, 0x2,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
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(UINT64)0xFFFFFFFF
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},
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{
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// Cluster 1, Core 3
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0x1, 0x3,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
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(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
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@@ -131,7 +171,7 @@ PrePeiCoreGetMpCoreInfo (
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ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
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if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
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// Only support one cluster
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// Only support one cluster on all but ARMv8 FVP platform. FVP still uses CortexA9 ID.
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*CoreCount = ArmGetCpuCountPerCluster ();
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*ArmCoreTable = mVersatileExpressMpCoreInfoTable;
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return EFI_SUCCESS;
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