From 2aefd3c371fd8f90b619f62fa94d556d5cdaa09c Mon Sep 17 00:00:00 2001
From: Jordan Justen <jordan.l.justen@intel.com>
Date: Mon, 30 May 2016 18:51:58 -0700
Subject: [PATCH] MdePkg BaseLib: Convert Ia32/FlushCacheLine.asm to NASM

The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/FlushCacheLine.asm to Ia32/FlushCacheLine.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
 MdePkg/Library/BaseLib/BaseLib.inf            |  1 +
 .../Library/BaseLib/Ia32/FlushCacheLine.nasm  | 51 +++++++++++++++++++
 2 files changed, 52 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 94fe72d588..52e82bd74d 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -313,6 +313,7 @@
   Ia32/FxRestore.asm | INTEL 
   Ia32/FxSave.nasm| INTEL
   Ia32/FxSave.asm | INTEL 
+  Ia32/FlushCacheLine.nasm| INTEL
   Ia32/FlushCacheLine.asm | INTEL 
   Ia32/EnablePaging32.asm | INTEL 
   Ia32/EnableInterrupts.asm | INTEL 
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm
new file mode 100644
index 0000000000..ff6fb6851b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.nasm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   FlushCacheLine.Asm
+;
+; Abstract:
+;
+;   AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+    SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; AsmFlushCacheLine (
+;   IN      VOID                      *LinearAddress
+;   );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmFlushCacheLine)
+ASM_PFX(AsmFlushCacheLine):
+    ;
+    ; If the CPU does not support CLFLUSH instruction,
+    ; then promote flush range to flush entire cache.
+    ;
+    mov     eax, 1
+    push    ebx
+    cpuid
+    pop     ebx
+    mov     eax, [esp + 4]
+    test    edx, BIT19
+    jz      .0
+    clflush [eax]
+    ret
+.0:
+    wbinvd
+    ret
+