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ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe

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ProcessorSubClassDxe provides SMBIOS CPU information using generic
methods combined with calls into OemMiscLib.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
This commit is contained in:
Rebecca Cran
2021-02-07 17:52:46 -07:00
committed by mergify[bot]
parent 0e51d7e445
commit 2ba6ecef39
8 changed files with 1387 additions and 0 deletions
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ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c Normal file
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/** @file
Functions for ARM processor information
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi.h>
#include <Library/ArmLib.h>
#include <Library/ArmLib/ArmLibPrivate.h>
#include "SmbiosProcessor.h"
/** Gets the size of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache size.
**/
UINT64
ArmGetCacheSize (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
)
{
CCSIDR_DATA Ccsidr;
CCSIDR2_DATA Ccsidr2;
CSSELR_DATA Csselr;
BOOLEAN CcidxSupported;
UINT64 CacheSize;
// Read the CCSIDR register to get the cache architecture
Csselr.Data = 0;
Csselr.Bits.Level = CacheLevel - 1;
Csselr.Bits.InD = (!DataCache && !UnifiedCache);
Ccsidr.Data = ReadCCSIDR (Csselr.Data);
CcidxSupported = ArmHasCcidx ();
if (CcidxSupported) {
Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);
CacheSize = (1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *
(Ccsidr.BitsCcidxAA32.Associativity + 1) *
(Ccsidr2.Bits.NumSets + 1);
} else {
CacheSize = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *
(Ccsidr.BitsNonCcidx.Associativity + 1) *
(Ccsidr.BitsNonCcidx.NumSets + 1);
}
return CacheSize;
}
/** Gets the associativity of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache associativity.
**/
UINT32
ArmGetCacheAssociativity (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
)
{
CCSIDR_DATA Ccsidr;
CCSIDR2_DATA Ccsidr2;
CSSELR_DATA Csselr;
BOOLEAN CcidxSupported;
UINT32 Associativity;
// Read the CCSIDR register to get the cache architecture
Csselr.Data = 0;
Csselr.Bits.Level = CacheLevel - 1;
Csselr.Bits.InD = (!DataCache && !UnifiedCache);
Ccsidr.Data = ReadCCSIDR (Csselr.Data);
CcidxSupported = ArmHasCcidx ();
if (CcidxSupported) {
Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);
Associativity = Ccsidr.BitsCcidxAA32.Associativity + 1;
} else {
Associativity = Ccsidr.BitsNonCcidx.Associativity + 1;
}
return Associativity;
}