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Correct the structure's comments to follow doxygen format.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8721 6f19259b-4bc3-4df7-8a09-765794883524
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klu2
2009-07-02 07:40:24 +00:00
parent d97286f4b3
commit 2bbaeb0d62
38 changed files with 648 additions and 700 deletions
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209
IntelFrameworkPkg/Include/Protocol/PciHostBridgeResourceAllocation.h
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@ -3,7 +3,7 @@
Provides the basic interfaces to abstract a PCI host bridge resource allocation. This protocol is
mandatory if the system includes PCI devices.
Copyright (c) 2007, Intel Corporation
Copyright (c) 2007 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -35,19 +35,19 @@ typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BR
// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES
//
// If this bit is set, then the PCI Root Bridge does not
// support separate windows for Non-prefetchable and Prefetchable
// memory. A PCI bus driver needs to include requests for Prefetchable
// memory in the Non-prefetchable memory pool.
//
/// If this bit is set, then the PCI Root Bridge does not
/// support separate windows for Non-prefetchable and Prefetchable
/// memory. A PCI bus driver needs to include requests for Prefetchable
/// memory in the Non-prefetchable memory pool.
///
#define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1
//
// If this bit is set, then the PCI Root Bridge supports
// 64 bit memory windows. If this bit is not set,
// the PCI bus driver needs to include requests for 64 bit
// memory address in the corresponding 32 bit memory pool.
//
///
/// If this bit is set, then the PCI Root Bridge supports
/// 64 bit memory windows. If this bit is not set,
/// the PCI bus driver needs to include requests for 64 bit
/// memory address in the corresponding 32 bit memory pool.
///
#define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2
typedef UINT64 EFI_RESOURCE_ALLOCATION_STATUS;
@ -63,79 +63,81 @@ typedef UINT64 EFI_RESOURCE_ALLOCATION_STATUS;
// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE
//
typedef enum {
///
/// Reset the host bridge PCI apertures and internal data structures.
/// PCI enumerator should issue this notification before starting fresh
/// enumeration process. Enumeration cannot be restarted after sending
/// any other notification such as EfiPciHostBridgeBeginBusAllocation.
///
EfiPciHostBridgeBeginEnumeration,
///
/// The bus allocation phase is about to begin. No specific action
/// is required here. This notification can be used to perform any
/// chipset specific programming.
///
EfiPciHostBridgeBeginBusAllocation,
///
/// The bus allocation and bus programming phase is complete. No specific
/// action is required here. This notification can be used to perform any
/// chipset specific programming.
///
EfiPciHostBridgeEndBusAllocation,
///
/// The resource allocation phase is about to begin.No specific action is
/// required here. This notification can be used to perform any chipset specific programming.
///
EfiPciHostBridgeBeginResourceAllocation,
///
/// Allocate resources per previously submitted requests for all the PCI Root
/// Bridges. These resource settings are returned on the next call to
/// GetProposedResources().
///
EfiPciHostBridgeAllocateResources,
///
/// Program the Host Bridge hardware to decode previously allocated resources
/// (proposed resources) for all the PCI Root Bridges.
///
EfiPciHostBridgeSetResources,
///
/// De-allocate previously allocated resources previously for all the PCI
/// Root Bridges and reset the I/O and memory apertures to initial state.
///
EfiPciHostBridgeFreeResources,
///
/// The resource allocation phase is completed. No specific action is required
/// here. This notification can be used to perform any chipset specific programming.
///
EfiPciHostBridgeEndResourceAllocation
} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;
//
// EfiPciHostBridgeBeginEnumeration
// Reset the host bridge PCI apertures and internal data structures.
// PCI enumerator should issue this notification before starting fresh
// enumeration process. Enumeration cannot be restarted after sending
// any other notification such as EfiPciHostBridgeBeginBusAllocation.
//
// EfiPciHostBridgeBeginBusAllocation
// The bus allocation phase is about to begin. No specific action
// is required here. This notification can be used to perform any
// chipset specific programming.
//
// EfiPciHostBridgeEndBusAllocation
// The bus allocation and bus programming phase is complete. No specific
// action is required here. This notification can be used to perform any
// chipset specific programming.
//
// EfiPciHostBridgeBeginResourceAllocation
// The resource allocation phase is about to begin.No specific action is
// required here. This notification can be used to perform any chipset specific programming.
//
// EfiPciHostBridgeAllocateResources
// Allocate resources per previously submitted requests for all the PCI Root
// Bridges. These resource settings are returned on the next call to
// GetProposedResources().
//
// EfiPciHostBridgeSetResources
// Program the Host Bridge hardware to decode previously allocated resources
// (proposed resources) for all the PCI Root Bridges.
//
// EfiPciHostBridgeFreeResources
// De-allocate previously allocated resources previously for all the PCI
// Root Bridges and reset the I/O and memory apertures to initial state.
//
// EfiPciHostBridgeEndResourceAllocation
// The resource allocation phase is completed. No specific action is required
// here. This notification can be used to perform any chipset specific programming.
//
// EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE
//
///
/// EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE
///
typedef enum {
///
/// This notification is only applicable to PCI-PCI bridges and
/// indicates that the PCI enumerator is about to begin enumerating
/// the bus behind the PCI-PCI Bridge. This notification is sent after
/// the primary bus number, the secondary bus number and the subordinate
/// bus number registers in the PCI-PCI Bridge are programmed to valid
/// (not necessary final) values
///
EfiPciBeforeChildBusEnumeration,
///
/// This notification is sent before the PCI enumerator probes BAR registers
/// for every valid PCI function.
///
EfiPciBeforeResourceCollection
} EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;
//
// EfiPciBeforeChildBusEnumeration
// This notification is only applicable to PCI-PCI bridges and
// indicates that the PCI enumerator is about to begin enumerating
// the bus behind the PCI-PCI Bridge. This notification is sent after
// the primary bus number, the secondary bus number and the subordinate
// bus number registers in the PCI-PCI Bridge are programmed to valid
// (not necessary final) values
//
// EfiPciBeforeResourceCollection
// This notification is sent before the PCI enumerator probes BAR registers
// for every valid PCI function.
//
/**
Enter a certain phase of the PCI enumeration process
@ -327,47 +329,52 @@ EFI_STATUS
);
/**
@par Protocol Description:
Provides the basic interfaces to abstract a PCI host bridge resource allocation.
@param NotifyPhase
The notification from the PCI bus enumerator that it is about to enter
a certain phase during the enumeration process.
@param GetNextRootBridge
Retrieves the device handle for the next PCI root bridge that is produced by the
host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached.
@param GetAllocAttributes
Retrieves the allocation-related attributes of a PCI root bridge.
@param StartBusEnumeration
Sets up a PCI root bridge for bus enumeration.
@param SetBusNumbers
Sets up the PCI root bridge so that it decodes a specific range of bus numbers.
@param SubmitResources
Submits the resource requirements for the specified PCI root bridge.
@param GetProposedResources
Returns the proposed resource assignment for the specified PCI root bridges.
@param PreprocessController
Provides hooks from the PCI bus driver to every PCI controller
(device/function) at various stages of the PCI enumeration process that
allow the host bridge driver to preinitialize individual PCI controllers
before enumeration.
**/
struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {
///
/// The notification from the PCI bus enumerator that it is about to enter
/// a certain phase during the enumeration process.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;
///
/// Retrieves the device handle for the next PCI root bridge that is produced by the
/// host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;
///
/// Retrieves the allocation-related attributes of a PCI root bridge.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;
///
/// Sets up a PCI root bridge for bus enumeration.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;
///
/// Sets up the PCI root bridge so that it decodes a specific range of bus numbers.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;
///
/// Submits the resource requirements for the specified PCI root bridge.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;
///
/// Returns the proposed resource assignment for the specified PCI root bridges.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;
///
/// Provides hooks from the PCI bus driver to every PCI controller
/// (device/function) at various stages of the PCI enumeration process that
/// allow the host bridge driver to preinitialize individual PCI controllers
/// before enumeration.
///
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;
};