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Removed cross references from PciCf8Lib and PciExpressLib class to PciLib class.

Browse Source 
Added PeCoffLoaderGetMachineType to the PeCoffGetEntryPointLibrary Class. Document to be updated.

Added the PeCoffLoaderImageReadFromMemory() and PeCoffLoaderRelocateImageForRuntime () to the PcCoffLib. 

Updated EfiImage.h and removed EFI_IMAGE_OPTIONAL_HEADER and EFI_IMAGE_NT_HEADERS as they were replaced with checking the MachineType.

PeCoffLib – Added checks for MachineType so the PeCoff lib can load any PE32 or PE32+ image. The relocations are still limited to IA32, X64, IPF, and EBC. I also added a re-relocator function to remove PeLoader Code from Runtime Lib. Even though there is only one instance of the re-relocator I wanted to get all the PeCoff loader code together.

Replaced DEBUG_CODE() macro with DEBUG_CODE_START() and DEBUG_CODE_END() so you can debug through the DEBUG_CODE() macros. Also removed PE/COFF code and replaced with library usage.

I also updated the IO Instrinsic lib to use _ReadWriteBarrior() to help with sync problems

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1103 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
ajfish
2006-07-26 15:23:35 +00:00
parent dca84bbd41
commit 2ce311322c
47 changed files with 1822 additions and 1332 deletions
Download Patch File Download Diff File Expand all files Collapse all files

189
MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
View File

@@ -64,192 +64,3 @@ IoWrite64 (
return 0;
}
/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT8
EFIAPI
MmioRead8 (
IN UINTN Address
)
{
return *(volatile UINT8*)Address;
}
/**
Writes an 8-bit MMIO register.
Writes the 8-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT8
EFIAPI
MmioWrite8 (
IN UINTN Address,
IN UINT8 Value
)
{
return *(volatile UINT8*)Address = Value;
}
/**
Reads a 16-bit MMIO register.
Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT16
EFIAPI
MmioRead16 (
IN UINTN Address
)
{
ASSERT ((Address & 1) == 0);
return *(volatile UINT16*)Address;
}
/**
Writes a 16-bit MMIO register.
Writes the 16-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT16
EFIAPI
MmioWrite16 (
IN UINTN Address,
IN UINT16 Value
)
{
ASSERT ((Address & 1) == 0);
return *(volatile UINT16*)Address = Value;
}
/**
Reads a 32-bit MMIO register.
Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT32
EFIAPI
MmioRead32 (
IN UINTN Address
)
{
ASSERT ((Address & 3) == 0);
return *(volatile UINT32*)Address;
}
/**
Writes a 32-bit MMIO register.
Writes the 32-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT32
EFIAPI
MmioWrite32 (
IN UINTN Address,
IN UINT32 Value
)
{
ASSERT ((Address & 3) == 0);
return *(volatile UINT32*)Address = Value;
}
/**
Reads a 64-bit MMIO register.
Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT64
EFIAPI
MmioRead64 (
IN UINTN Address
)
{
ASSERT ((Address & 7) == 0);
return *(volatile UINT64*)Address;
}
/**
Writes a 64-bit MMIO register.
Writes the 64-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT64
EFIAPI
MmioWrite64 (
IN UINTN Address,
IN UINT64 Value
)
{
ASSERT ((Address & 7) == 0);
return *(volatile UINT64*)Address = Value;
}

192
MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
View File

@@ -25,6 +25,198 @@
#ifdef __GNUC__
/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT8
EFIAPI
MmioRead8 (
IN UINTN Address
)
{
return *(volatile UINT8*)Address;
}
/**
Writes an 8-bit MMIO register.
Writes the 8-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT8
EFIAPI
MmioWrite8 (
IN UINTN Address,
IN UINT8 Value
)
{
return *(volatile UINT8*)Address = Value;
}
/**
Reads a 16-bit MMIO register.
Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT16
EFIAPI
MmioRead16 (
IN UINTN Address
)
{
ASSERT ((Address & 1) == 0);
return *(volatile UINT16*)Address;
}
/**
Writes a 16-bit MMIO register.
Writes the 16-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT16
EFIAPI
MmioWrite16 (
IN UINTN Address,
IN UINT16 Value
)
{
ASSERT ((Address & 1) == 0);
return *(volatile UINT16*)Address = Value;
}
/**
Reads a 32-bit MMIO register.
Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT32
EFIAPI
MmioRead32 (
IN UINTN Address
)
{
ASSERT ((Address & 3) == 0);
return *(volatile UINT32*)Address;
}
/**
Writes a 32-bit MMIO register.
Writes the 32-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT32
EFIAPI
MmioWrite32 (
IN UINTN Address,
IN UINT32 Value
)
{
ASSERT ((Address & 3) == 0);
return *(volatile UINT32*)Address = Value;
}
/**
Reads a 64-bit MMIO register.
Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT64
EFIAPI
MmioRead64 (
IN UINTN Address
)
{
ASSERT ((Address & 7) == 0);
return *(volatile UINT64*)Address;
}
/**
Writes a 64-bit MMIO register.
Writes the 64-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT64
EFIAPI
MmioWrite64 (
IN UINTN Address,
IN UINT64 Value
)
{
ASSERT ((Address & 7) == 0);
return *(volatile UINT64*)Address = Value;
}
/**
Reads an 8-bit I/O port.

220
MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
View File

@@ -27,12 +27,13 @@
//
// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
//
int _inp (unsigned short port);
int _inp (unsigned short port);
unsigned short _inpw (unsigned short port);
unsigned long _inpd (unsigned short port);
int _outp (unsigned short port, int databyte );
unsigned short _outpw(unsigned short port, unsigned short dataword );
unsigned long _outpd(unsigned short port, unsigned long dataword );
unsigned short _outpw (unsigned short port, unsigned short dataword );
unsigned long _outpd (unsigned short port, unsigned long dataword );
void _ReadWriteBarrier (void);
#pragma intrinsic(_inp)
#pragma intrinsic(_inpw)
@@ -40,7 +41,15 @@ unsigned long _outpd(unsigned short port, unsigned long dataword );
#pragma intrinsic(_outp)
#pragma intrinsic(_outpw)
#pragma intrinsic(_outpd)
#pragma intrinsic(_ReadWriteBarrier)
//
// _ReadWriteBarrier() forces memory reads and writes to complete at the point
// in the call. This is only a hint to the compiler and does emit code.
// In past versions of the compiler, _ReadWriteBarrier was enforced only
// locally and did not affect functions up the call tree. In Visual C++
// 2005, _ReadWriteBarrier is enforced all the way up the call tree.
//
/**
Reads an 8-bit I/O port.
@@ -62,6 +71,7 @@ IoRead8 (
IN UINTN Port
)
{
_ReadWriteBarrier ();
return (UINT8)_inp ((UINT16)Port);
}
@@ -87,6 +97,7 @@ IoWrite8 (
IN UINT8 Value
)
{
_ReadWriteBarrier ();
return (UINT8)_outp ((UINT16)Port, Value);
}
@@ -111,6 +122,7 @@ IoRead16 (
)
{
ASSERT ((Port & 1) == 0);
_ReadWriteBarrier ();
return _inpw((UINT16)Port);
}
@@ -137,6 +149,7 @@ IoWrite16 (
)
{
ASSERT ((Port & 1) == 0);
_ReadWriteBarrier ();
return _outpw ((UINT16)Port, Value);
}
@@ -161,6 +174,7 @@ IoRead32 (
)
{
ASSERT ((Port & 3) == 0);
_ReadWriteBarrier ();
return _inpd((UINT16)Port);
}
@@ -187,7 +201,207 @@ IoWrite32 (
)
{
ASSERT ((Port & 3) == 0);
_ReadWriteBarrier ();
return _outpd ((UINT16)Port, Value);
}
/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT8
EFIAPI
MmioRead8 (
IN UINTN Address
)
{
_ReadWriteBarrier ();
return *(volatile UINT8 *)Address;
}
/**
Writes an 8-bit MMIO register.
Writes the 8-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 8-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT8
EFIAPI
MmioWrite8 (
IN UINTN Address,
IN UINT8 Value
)
{
_ReadWriteBarrier ();
return *(volatile UINT8 *)Address = Value;
}
/**
Reads a 16-bit MMIO register.
Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT16
EFIAPI
MmioRead16 (
IN UINTN Address
)
{
ASSERT ((Address & 1) == 0);
_ReadWriteBarrier ();
return *(volatile UINT16 *)Address;
}
/**
Writes a 16-bit MMIO register.
Writes the 16-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 16-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT16
EFIAPI
MmioWrite16 (
IN UINTN Address,
IN UINT16 Value
)
{
ASSERT ((Address & 1) == 0);
_ReadWriteBarrier ();
return *(volatile UINT16 *)Address = Value;
}
/**
Reads a 32-bit MMIO register.
Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT32
EFIAPI
MmioRead32 (
IN UINTN Address
)
{
ASSERT ((Address & 3) == 0);
_ReadWriteBarrier ();
return *(volatile UINT32 *)Address;
}
/**
Writes a 32-bit MMIO register.
Writes the 32-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 32-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT32
EFIAPI
MmioWrite32 (
IN UINTN Address,
IN UINT32 Value
)
{
ASSERT ((Address & 3) == 0);
_ReadWriteBarrier ();
return *(volatile UINT32 *)Address = Value;
}
/**
Reads a 64-bit MMIO register.
Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
returned. This function must guarantee that all MMIO read and write
operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to read.
@return The value read.
**/
UINT64
EFIAPI
MmioRead64 (
IN UINTN Address
)
{
ASSERT ((Address & 7) == 0);
_ReadWriteBarrier ();
return *(volatile UINT64 *)Address;
}
/**
Writes a 64-bit MMIO register.
Writes the 64-bit MMIO register specified by Address with the value specified
by Value and returns Value. This function must guarantee that all MMIO read
and write operations are serialized.
If 64-bit MMIO register operations are not supported, then ASSERT().
@param Address The MMIO register to write.
@param Value The value to write to the MMIO register.
**/
UINT64
EFIAPI
MmioWrite64 (
IN UINTN Address,
IN UINT64 Value
)
{
ASSERT ((Address & 7) == 0);
_ReadWriteBarrier ();
return *(volatile UINT64 *)Address = Value;
}
#endif

10
MdePkg/Library/BasePciCf8Lib/PciLib.c
View File

@@ -1315,7 +1315,7 @@ PciCf8ReadBuffer (
//
// Read a byte if StartAddress is byte aligned
//
*(UINT8*)Buffer = PciCf8Read8 (StartAddress);
*(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);
StartAddress += sizeof (UINT8);
Size -= sizeof (UINT8);
Buffer = (UINT8*)Buffer + 1;
@@ -1325,7 +1325,7 @@ PciCf8ReadBuffer (
//
// Read a word if StartAddress is word aligned
//
*(UINT16*)Buffer = PciCf8Read16 (StartAddress);
*(volatile UINT16 *)Buffer = PciCf8Read16 (StartAddress);
StartAddress += sizeof (UINT16);
Size -= sizeof (UINT16);
Buffer = (UINT16*)Buffer + 1;
@@ -1335,7 +1335,7 @@ PciCf8ReadBuffer (
//
// Read as many double words as possible
//
*(UINT32*)Buffer = PciCf8Read32 (StartAddress);
*(volatile UINT32 *)Buffer = PciCf8Read32 (StartAddress);
StartAddress += sizeof (UINT32);
Size -= sizeof (UINT32);
Buffer = (UINT32*)Buffer + 1;
@@ -1345,7 +1345,7 @@ PciCf8ReadBuffer (
//
// Read the last remaining word if exist
//
*(UINT16*)Buffer = PciCf8Read16 (StartAddress);
*(volatile UINT16 *)Buffer = PciCf8Read16 (StartAddress);
StartAddress += sizeof (UINT16);
Size -= sizeof (UINT16);
Buffer = (UINT16*)Buffer + 1;
@@ -1355,7 +1355,7 @@ PciCf8ReadBuffer (
//
// Read the last remaining byte if exist
//
*(UINT8*)Buffer = PciCf8Read8 (StartAddress);
*(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);
}
return ReturnValue;

12
MdePkg/Library/BasePciExpressLib/PciLib.c
View File

@@ -40,7 +40,7 @@
@return The base address of PCI Express.
**/
UINTN
volatile UINTN
GetPciExpressBaseAddress (
VOID
)
@@ -1220,7 +1220,7 @@ PciExpressReadBuffer (
//
// Read a byte if StartAddress is byte aligned
//
*(UINT8*)Buffer = PciExpressRead8 (StartAddress);
*(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);
StartAddress += sizeof (UINT8);
Size -= sizeof (UINT8);
Buffer = (UINT8*)Buffer + 1;
@@ -1230,7 +1230,7 @@ PciExpressReadBuffer (
//
// Read a word if StartAddress is word aligned
//
*(UINT16*)Buffer = PciExpressRead16 (StartAddress);
*(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);
StartAddress += sizeof (UINT16);
Size -= sizeof (UINT16);
Buffer = (UINT16*)Buffer + 1;
@@ -1240,7 +1240,7 @@ PciExpressReadBuffer (
//
// Read as many double words as possible
//
*(UINT32*)Buffer = PciExpressRead32 (StartAddress);
*(volatile UINT32 *)Buffer = PciExpressRead32 (StartAddress);
StartAddress += sizeof (UINT32);
Size -= sizeof (UINT32);
Buffer = (UINT32*)Buffer + 1;
@@ -1250,7 +1250,7 @@ PciExpressReadBuffer (
//
// Read the last remaining word if exist
//
*(UINT16*)Buffer = PciExpressRead16 (StartAddress);
*(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);
StartAddress += sizeof (UINT16);
Size -= sizeof (UINT16);
Buffer = (UINT16*)Buffer + 1;
@@ -1260,7 +1260,7 @@ PciExpressReadBuffer (
//
// Read the last remaining byte if exist
//
*(UINT8*)Buffer = PciExpressRead8 (StartAddress);
*(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);
}
return ReturnValue;

49
MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c
View File

@@ -40,26 +40,63 @@ PeCoffLoaderGetEntryPoint (
OUT VOID **EntryPoint
)
{
EFI_IMAGE_DOS_HEADER *DosHeader;
EFI_IMAGE_NT_HEADERS *PeHeader;
EFI_IMAGE_DOS_HEADER *DosHeader;
EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Header;
ASSERT (Pe32Data != NULL);
ASSERT (EntryPoint != NULL);
DosHeader = (EFI_IMAGE_DOS_HEADER *)Pe32Data;
if (DosHeader->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
//
// DOS image header is present, so read the PE header after the DOS image header.
//
PeHeader = (EFI_IMAGE_NT_HEADERS *) ((UINTN) Pe32Data + (UINTN) ((DosHeader->e_lfanew) & 0x0ffff));
Header.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN) Pe32Data + (UINTN) ((DosHeader->e_lfanew) & 0x0ffff));
} else {
//
// DOS image header is not present, so PE header is at the image base.
//
PeHeader = (EFI_IMAGE_NT_HEADERS *) Pe32Data;
Header.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)Pe32Data;
}
*EntryPoint = (VOID *) ((UINTN) Pe32Data + (UINTN) (PeHeader->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));
//
// Calculate the entry point relative to the start of the image.
// AddressOfEntryPoint is common for PE32 & PE32+
//
*EntryPoint = (VOID *)((UINTN)Pe32Data + (UINTN)(Header.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));
return RETURN_SUCCESS;
}
/**
Returns the machine type of PE/COFF image.
@param Image Pointer to a PE/COFF header
@return Machine type or zero if not a valid iamge
**/
UINT16
EFIAPI
PeCoffLoaderGetMachineType (
IN VOID *Pe32Data
)
{
EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
EFI_IMAGE_DOS_HEADER *DosHdr;
DosHdr = (EFI_IMAGE_DOS_HEADER *)Pe32Data;
if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)Pe32Data + DosHdr->e_lfanew);
} else {
Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)Pe32Data);
}
if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) {
return Hdr.Pe32->FileHeader.Machine;
}
return 0x0000;
}

720
MdePkg/Library/BasePeCoffLib/BasePeCoff.c
View File

File diff suppressed because it is too large Load Diff

25
MdePkg/Library/BasePeCoffLib/BasePeCoffLib.msa
View File

@@ -1,15 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?>
<!--
Copyright (c) 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-->
<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<MsaHeader>
<ModuleName>BasePeCoffLib</ModuleName>
<ModuleType>BASE</ModuleType>
@@ -18,11 +8,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
<Abstract>Component description file for Base PE/COFF Library</Abstract>
<Description>PE/COFF Loader Library implementation.</Description>
<Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
<License>All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
<License>All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
<Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
</MsaHeader>
@@ -41,6 +31,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
<LibraryClass Usage="ALWAYS_CONSUMED">
<Keyword>DebugLib</Keyword>
</LibraryClass>
<LibraryClass Usage="ALWAYS_CONSUMED">
<Keyword>PcdLib</Keyword>
</LibraryClass>
</LibraryClassDefinitions>
<SourceFiles>
<Filename>BasePeCoff.c</Filename>

53
MdePkg/Library/BasePeCoffLib/Ebc/PeCoffLoaderEx.c
View File

@@ -38,3 +38,56 @@ PeCoffLoaderRelocateImageEx (
{
return RETURN_UNSUPPORTED;
}
/**
Returns TRUE if the machine type of PE/COFF image is supported. Supported
does not mean the image can be executed it means the PE/COFF loader supports
loading and relocating of the image type. It's up to the caller to support
the entry point.
This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
& X64 images. Calling the entry point in a correct mannor is up to the
consumer of this library.
@param Machine Machine type from the PE Header.
@return TRUE if this PE/COFF loader can load the image
**/
BOOLEAN
PeCoffLoaderImageFormatSupported (
IN UINT16 Machine
)
{
if ((Machine == EFI_IMAGE_MACHINE_IA32) || (Machine == EFI_IMAGE_MACHINE_X64) ||
(Machine == EFI_IMAGE_MACHINE_EBC)) {
return TRUE;
}
return FALSE;
}
/**
Performs an Itanium-based specific re-relocation fixup and is a no-op on other
instruction sets. This is used to re-relocated the image into the EFI virtual
space for runtime calls.
@param Reloc Pointer to the relocation record.
@param Fixup Pointer to the address to fix up.
@param FixupData Pointer to a buffer to log the fixups.
@param Adjust The offset to adjust the fixup.
@return Status code.
**/
RETURN_STATUS
PeHotRelocateImageEx (
IN UINT16 *Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
)
{
return RETURN_UNSUPPORTED;
}

53
MdePkg/Library/BasePeCoffLib/Ia32/PeCoffLoaderEx.c
View File

@@ -39,3 +39,56 @@ PeCoffLoaderRelocateImageEx (
{
return RETURN_UNSUPPORTED;
}
/**
Returns TRUE if the machine type of PE/COFF image is supported. Supported
does not mean the image can be executed it means the PE/COFF loader supports
loading and relocating of the image type. It's up to the caller to support
the entry point.
This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
& X64 images. Calling the entry point in a correct mannor is up to the
consumer of this library.
@param Machine Machine type from the PE Header.
@return TRUE if this PE/COFF loader can load the image
**/
BOOLEAN
PeCoffLoaderImageFormatSupported (
IN UINT16 Machine
)
{
if ((Machine == EFI_IMAGE_MACHINE_IA32) || (Machine == EFI_IMAGE_MACHINE_X64) ||
(Machine == EFI_IMAGE_MACHINE_EBC)) {
return TRUE;
}
return FALSE;
}
/**
Performs an Itanium-based specific re-relocation fixup and is a no-op on other
instruction sets. This is used to re-relocated the image into the EFI virtual
space for runtime calls.
@param Reloc Pointer to the relocation record.
@param Fixup Pointer to the address to fix up.
@param FixupData Pointer to a buffer to log the fixups.
@param Adjust The offset to adjust the fixup.
@return Status code.
**/
RETURN_STATUS
PeHotRelocateImageEx (
IN UINT16 *Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
)
{
return RETURN_UNSUPPORTED;
}

240
MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c
View File

@@ -88,17 +88,6 @@ PeCoffLoaderRelocateImageEx (
UINT64 FixupVal;
switch ((*Reloc) >> 12) {
case EFI_IMAGE_REL_BASED_DIR64:
F64 = (UINT64 *) Fixup;
*F64 = *F64 + (UINT64) Adjust;
if (*FixupData != NULL) {
*FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
*(UINT64 *)(*FixupData) = *F64;
*FixupData = *FixupData + sizeof(UINT64);
}
break;
case EFI_IMAGE_REL_BASED_IA64_IMM64:
//
@@ -225,3 +214,232 @@ PeCoffLoaderRelocateImageEx (
return RETURN_SUCCESS;
}
/**
Returns TRUE if the machine type of PE/COFF image is supported. Supported
does not mean the image can be executed it means the PE/COFF loader supports
loading and relocating of the image type. It's up to the caller to support
the entry point.
This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
& X64 images. Calling the entry point in a correct mannor is up to the
consumer of this library. This version also supports the special relocations
for Itanium.
@param Machine Machine type from the PE Header.
@return TRUE if this PE/COFF loader can load the image
**/
BOOLEAN
PeCoffLoaderImageFormatSupported (
IN UINT16 Machine
)
{
if ((Machine == EFI_IMAGE_MACHINE_IPF) || (Machine == EFI_IMAGE_MACHINE_IA32) ||
(Machine == EFI_IMAGE_MACHINE_EBC) || (Machine == EFI_IMAGE_MACHINE_X64)) {
return TRUE;
}
return FALSE;
}
/**
ImageRead function that operates on a memory buffer whos base is passed into
FileHandle.
@param Reloc Ponter to baes of the input stream
@param Fixup Offset to the start of the buffer
@param FixupData Number of bytes to copy into the buffer
@param Adjust Location to place results of read
@retval RETURN_SUCCESS Data is read from FileOffset from the Handle into
the buffer.
**/
RETURN_STATUS
PeHotRelocateImageEx (
IN UINT16 *Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
)
/*++
Routine Description:
Performs an IPF specific relocation fixup
Arguments:
Reloc - Pointer to the relocation record
Fixup - Pointer to the address to fix up
FixupData - Pointer to a buffer to log the fixups
Adjust - The offset to adjust the fixup
Returns:
None
--*/
{
UINT64 *F64;
UINT64 FixupVal;
switch ((*Reloc) >> 12) {
case EFI_IMAGE_REL_BASED_DIR64:
F64 = (UINT64 *) Fixup;
*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));
if (*(UINT64 *) (*FixupData) == *F64) {
*F64 = *F64 + (UINT64) Adjust;
}
*FixupData = *FixupData + sizeof (UINT64);
break;
case EFI_IMAGE_REL_BASED_IA64_IMM64:
F64 = (UINT64 *) Fixup;
*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));
if (*(UINT64 *) (*FixupData) == *F64) {
//
// Align it to bundle address before fixing up the
// 64-bit immediate value of the movl instruction.
//
//
Fixup = (CHAR8 *) ((UINT64) Fixup & (UINT64)~(15));
FixupVal = (UINT64) 0;
//
// Extract the lower 32 bits of IMM64 from bundle
//
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X,
IMM64_IMM7B_SIZE_X,
IMM64_IMM7B_INST_WORD_POS_X,
IMM64_IMM7B_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X,
IMM64_IMM9D_SIZE_X,
IMM64_IMM9D_INST_WORD_POS_X,
IMM64_IMM9D_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X,
IMM64_IMM5C_SIZE_X,
IMM64_IMM5C_INST_WORD_POS_X,
IMM64_IMM5C_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IC_INST_WORD_X,
IMM64_IC_SIZE_X,
IMM64_IC_INST_WORD_POS_X,
IMM64_IC_VAL_POS_X
);
EXT_IMM64 (
FixupVal,
(UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X,
IMM64_IMM41a_SIZE_X,
IMM64_IMM41a_INST_WORD_POS_X,
IMM64_IMM41a_VAL_POS_X
);
//
// Update 64-bit address
//
FixupVal += Adjust;
//
// Insert IMM64 into bundle
//
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X),
IMM64_IMM7B_SIZE_X,
IMM64_IMM7B_INST_WORD_POS_X,
IMM64_IMM7B_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X),
IMM64_IMM9D_SIZE_X,
IMM64_IMM9D_INST_WORD_POS_X,
IMM64_IMM9D_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X),
IMM64_IMM5C_SIZE_X,
IMM64_IMM5C_INST_WORD_POS_X,
IMM64_IMM5C_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IC_INST_WORD_X),
IMM64_IC_SIZE_X,
IMM64_IC_INST_WORD_POS_X,
IMM64_IC_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X),
IMM64_IMM41a_SIZE_X,
IMM64_IMM41a_INST_WORD_POS_X,
IMM64_IMM41a_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM41b_INST_WORD_X),
IMM64_IMM41b_SIZE_X,
IMM64_IMM41b_INST_WORD_POS_X,
IMM64_IMM41b_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_IMM41c_INST_WORD_X),
IMM64_IMM41c_SIZE_X,
IMM64_IMM41c_INST_WORD_POS_X,
IMM64_IMM41c_VAL_POS_X
);
INS_IMM64 (
FixupVal,
((UINT32 *) Fixup + IMM64_SIGN_INST_WORD_X),
IMM64_SIGN_SIZE_X,
IMM64_SIGN_INST_WORD_POS_X,
IMM64_SIGN_VAL_POS_X
);
*(UINT64 *) (*FixupData) = *F64;
}
*FixupData = *FixupData + sizeof (UINT64);
break;
default:
DEBUG ((EFI_D_ERROR, "PeHotRelocateEx:unknown fixed type\n"));
return RETURN_UNSUPPORTED;
}
return RETURN_SUCCESS;
}

63
MdePkg/Library/BasePeCoffLib/x64/PeCoffLoaderEx.c
View File

@@ -31,23 +31,58 @@ PeCoffLoaderRelocateImageEx (
IN UINT64 Adjust
)
{
UINT64 *F64;
return RETURN_UNSUPPORTED;
}
switch ((*Reloc) >> 12) {
/**
Returns TRUE if the machine type of PE/COFF image is supported. Supported
does not mean the image can be executed it means the PE/COFF loader supports
loading and relocating of the image type. It's up to the caller to support
the entry point.
case EFI_IMAGE_REL_BASED_DIR64:
F64 = (UINT64 *) Fixup;
*F64 = *F64 + (UINT64) Adjust;
if (*FixupData != NULL) {
*FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
*(UINT64 *)(*FixupData) = *F64;
*FixupData = *FixupData + sizeof(UINT64);
}
break;
This function implies the basic PE/COFF loader/relocator supports IA32, EBC,
& X64 images. Calling the entry point in a correct mannor is up to the
consumer of this library.
default:
return RETURN_UNSUPPORTED;
@param Machine Machine type from the PE Header.
@return TRUE if this PE/COFF loader can load the image
**/
BOOLEAN
PeCoffLoaderImageFormatSupported (
IN UINT16 Machine
)
{
if ((Machine == EFI_IMAGE_MACHINE_IA32) || (Machine == EFI_IMAGE_MACHINE_X64) ||
(Machine == EFI_IMAGE_MACHINE_EBC)) {
return TRUE;
}
return RETURN_SUCCESS;
return FALSE;
}
/**
Performs an Itanium-based specific re-relocation fixup and is a no-op on other
instruction sets. This is used to re-relocated the image into the EFI virtual
space for runtime calls.
@param Reloc Pointer to the relocation record.
@param Fixup Pointer to the address to fix up.
@param FixupData Pointer to a buffer to log the fixups.
@param Adjust The offset to adjust the fixup.
@return Status code.
**/
RETURN_STATUS
PeHotRelocateImageEx (
IN UINT16 *Reloc,
IN OUT CHAR8 *Fixup,
IN OUT CHAR8 **FixupData,
IN UINT64 Adjust
)
{
return RETURN_UNSUPPORTED;
}