Adding support for BeagleBoard.
ArmPkg - Supoprt for ARM specific things that can change as the architecture changes. Plus semihosting JTAG drivers. EmbeddedPkg - Generic support for an embeddded platform. Including a light weight command line shell. BeagleBoardPkg - Platform specifics for BeagleBoard. SD Card works, but USB has issues. Looks like a bug in the open source USB stack (Our internal stack works fine). git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9518 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
AJFISH
294
ArmPkg/Include/Library/ArmLib.h
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294
ArmPkg/Include/Library/ArmLib.h
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/** @file
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Copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __ARM_LIB__
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#define __ARM_LIB__
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typedef enum {
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ARM_CACHE_TYPE_WRITE_BACK,
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ARM_CACHE_TYPE_UNKNOWN
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} ARM_CACHE_TYPE;
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typedef enum {
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ARM_CACHE_ARCHITECTURE_UNIFIED,
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ARM_CACHE_ARCHITECTURE_SEPARATE,
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ARM_CACHE_ARCHITECTURE_UNKNOWN
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} ARM_CACHE_ARCHITECTURE;
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typedef struct {
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ARM_CACHE_TYPE Type;
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ARM_CACHE_ARCHITECTURE Architecture;
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BOOLEAN DataCachePresent;
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UINTN DataCacheSize;
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UINTN DataCacheAssociativity;
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UINTN DataCacheLineLength;
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BOOLEAN InstructionCachePresent;
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UINTN InstructionCacheSize;
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UINTN InstructionCacheAssociativity;
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UINTN InstructionCacheLineLength;
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} ARM_CACHE_INFO;
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typedef enum {
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ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED,
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ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
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ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,
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ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
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} ARM_MEMORY_REGION_ATTRIBUTES;
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typedef struct {
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UINT32 PhysicalBase;
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UINT32 VirtualBase;
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UINT32 Length;
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ARM_MEMORY_REGION_ATTRIBUTES Attributes;
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} ARM_MEMORY_REGION_DESCRIPTOR;
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typedef VOID (*CACHE_OPERATION)(VOID);
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typedef VOID (*LINE_OPERATION)(UINTN);
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typedef enum {
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ARM_PROCESSOR_MODE_USER = 0x10,
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ARM_PROCESSOR_MODE_FIQ = 0x11,
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ARM_PROCESSOR_MODE_IRQ = 0x12,
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ARM_PROCESSOR_MODE_SUPERVISOR = 0x13,
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ARM_PROCESSOR_MODE_ABORT = 0x17,
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ARM_PROCESSOR_MODE_UNDEFINED = 0x1B,
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ARM_PROCESSOR_MODE_SYSTEM = 0x1F,
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ARM_PROCESSOR_MODE_MASK = 0x1F
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} ARM_PROCESSOR_MODE;
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ARM_CACHE_TYPE
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EFIAPI
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ArmCacheType (
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VOID
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);
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ARM_CACHE_ARCHITECTURE
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EFIAPI
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ArmCacheArchitecture (
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VOID
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);
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VOID
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EFIAPI
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ArmCacheInformation (
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OUT ARM_CACHE_INFO *CacheInfo
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);
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BOOLEAN
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EFIAPI
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ArmDataCachePresent (
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VOID
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);
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UINTN
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EFIAPI
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ArmDataCacheSize (
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VOID
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);
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UINTN
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EFIAPI
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ArmDataCacheAssociativity (
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VOID
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);
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UINTN
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EFIAPI
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ArmDataCacheLineLength (
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VOID
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);
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BOOLEAN
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EFIAPI
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ArmInstructionCachePresent (
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VOID
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);
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UINTN
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EFIAPI
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ArmInstructionCacheSize (
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VOID
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);
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UINTN
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EFIAPI
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ArmInstructionCacheAssociativity (
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VOID
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);
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UINTN
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EFIAPI
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ArmInstructionCacheLineLength (
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VOID
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);
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UINT32
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EFIAPI
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Cp15IdCode (
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VOID
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);
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UINT32
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EFIAPI
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Cp15CacheInfo (
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VOID
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);
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VOID
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EFIAPI
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ArmInvalidateDataCache (
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VOID
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);
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VOID
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EFIAPI
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ArmCleanInvalidateDataCache (
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VOID
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);
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VOID
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EFIAPI
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ArmCleanDataCache (
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VOID
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);
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VOID
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EFIAPI
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ArmInvalidateInstructionCache (
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VOID
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);
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VOID
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EFIAPI
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ArmInvalidateDataCacheEntryByMVA (
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IN UINTN Address
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);
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VOID
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EFIAPI
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ArmCleanDataCacheEntryByMVA (
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IN UINTN Address
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);
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VOID
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EFIAPI
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ArmCleanInvalidateDataCacheEntryByMVA (
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IN UINTN Address
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);
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VOID
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EFIAPI
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ArmEnableDataCache (
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VOID
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);
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VOID
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EFIAPI
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ArmDisableDataCache (
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VOID
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);
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VOID
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EFIAPI
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ArmEnableInstructionCache (
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VOID
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);
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VOID
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EFIAPI
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ArmDisableInstructionCache (
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VOID
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);
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VOID
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EFIAPI
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ArmEnableMmu (
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VOID
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);
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VOID
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EFIAPI
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ArmDisableMmu (
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VOID
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);
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VOID
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EFIAPI
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ArmEnableInterrupts (
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VOID
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);
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UINTN
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EFIAPI
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ArmDisableInterrupts (
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VOID
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);
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BOOLEAN
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EFIAPI
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ArmGetInterruptState (
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VOID
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);
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VOID
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EFIAPI
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ArmInvalidateTlb (
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VOID
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);
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VOID
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EFIAPI
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ArmSetDomainAccessControl (
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IN UINT32 Domain
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);
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VOID
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EFIAPI
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ArmSetTranslationTableBaseAddress (
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IN VOID *TranslationTableBase
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);
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VOID
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EFIAPI
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ArmConfigureMmu (
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT UINTN *TranslationTableSize OPTIONAL
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);
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VOID
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EFIAPI
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ArmSwitchProcessorMode (
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IN ARM_PROCESSOR_MODE Mode
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);
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ARM_PROCESSOR_MODE
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EFIAPI
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ArmProcessorMode (
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VOID
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);
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VOID
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EFIAPI
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ArmEnableBranchPrediction (
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VOID
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);
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VOID
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EFIAPI
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ArmDisableBranchPrediction (
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VOID
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);
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#endif // __ARM_LIB__
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