Adding support for BeagleBoard.
ArmPkg - Supoprt for ARM specific things that can change as the architecture changes. Plus semihosting JTAG drivers. EmbeddedPkg - Generic support for an embeddded platform. Including a light weight command line shell. BeagleBoardPkg - Platform specifics for BeagleBoard. SD Card works, but USB has issues. Looks like a bug in the open source USB stack (Our internal stack works fine). git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9518 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
AJFISH
165
BeagleBoardPkg/Sec/Sec.c
Executable file
165
BeagleBoardPkg/Sec/Sec.c
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/** @file
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C Entry point for the SEC. First C code after the reset vector.
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Copyright (c) 2008-2009, Apple Inc. All rights reserved.
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <PiPei.h>
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#include <Library/DebugLib.h>
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#include <Library/PrePiLib.h>
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#include <Library/PcdLib.h>
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#include <Library/IoLib.h>
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#include <Library/OmapLib.h>
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#include <Library/ArmLib.h>
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#include <Ppi/GuidedSectionExtraction.h>
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#include <Omap3530/Omap3530.h>
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VOID
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PadConfiguration (
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VOID
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);
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VOID
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ClockInit (
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VOID
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);
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VOID
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TimerInit (
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VOID
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)
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{
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UINTN Timer = FixedPcdGet32(PcdBeagleFreeTimer);
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UINT32 TimerBaseAddress = TimerBase(Timer);
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// Set source clock for GPT3 & GPT4 to SYS_CLK
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MmioOr32(CM_CLKSEL_PER, CM_CLKSEL_PER_CLKSEL_GPT3_SYS
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| CM_CLKSEL_PER_CLKSEL_GPT4_SYS);
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// Set count & reload registers
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MmioWrite32(TimerBaseAddress + GPTIMER_TCRR, 0x00000000);
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MmioWrite32(TimerBaseAddress + GPTIMER_TLDR, 0x00000000);
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// Disable interrupts
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MmioWrite32(TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);
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// Start Timer
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MmioWrite32(TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
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//Disable OMAP Watchdog timer (WDT2)
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MmioWrite32(WDTIMER2_BASE + WSPR, 0xAAAA);
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DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));
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MmioWrite32(WDTIMER2_BASE + WSPR, 0x5555);
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}
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VOID
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UartInit (
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VOID
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)
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{
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UINTN Uart = FixedPcdGet32(PcdBeagleConsoleUart);
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UINT32 UartBaseAddress = UartBase(Uart);
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// Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.
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MmioWrite32(UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);
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// Put device in configuration mode.
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MmioWrite32(UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);
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// Programmable divisor N = 48Mhz/16/115200 = 26
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MmioWrite32(UartBaseAddress + UART_DLL_REG, 26); // low divisor
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MmioWrite32(UartBaseAddress + UART_DLH_REG, 0); // high divisor
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// Enter into UART operational mode.
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MmioWrite32(UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);
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// Force DTR and RTS output to active
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MmioWrite32(UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);
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// Clear & enable fifos
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MmioWrite32(UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE);
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// Restore MODE_SELECT
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MmioWrite32(UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);
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}
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VOID
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InitCache (
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IN UINT32 MemoryBase,
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IN UINT32 MemoryLength
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);
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EFI_STATUS
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EFIAPI
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ExtractGuidedSectionLibConstructor (
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VOID
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);
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EFI_STATUS
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EFIAPI
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LzmaDecompressLibConstructor (
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VOID
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);
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VOID
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CEntryPoint (
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IN VOID *MemoryBase,
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IN UINTN MemorySize,
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IN VOID *StackBase,
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IN UINTN StackSize
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)
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{
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VOID *HobBase;
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//Set up Pin muxing.
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PadConfiguration();
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// Set up system clocking
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ClockInit();
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// Build a basic HOB list
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HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));
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CreateHobList(MemoryBase, MemorySize, HobBase, StackBase);
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// Enable program flow prediction, if supported.
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ArmEnableBranchPrediction();
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// Initialize CPU cache
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InitCache((UINT32)MemoryBase, (UINT32)MemorySize);
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// Add memory allocation hob for relocated FD
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BuildMemoryAllocationHob(FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
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// Add the FVs to the hob list
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BuildFvHob(PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
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// Start talking
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UartInit();
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DEBUG((EFI_D_ERROR, "UART Test Line\n"));
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// Start up a free running time so that the timer lib will work
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TimerInit();
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// SEC phase needs to run library constructors by hand.
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ExtractGuidedSectionLibConstructor();
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LzmaDecompressLibConstructor();
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// Load the DXE Core and transfer control to it
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LoadDxeCoreFromFv(NULL, 0);
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// DXE Core should always load and never return
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ASSERT(FALSE);
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}
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