MdePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Michael Kubacki
committed by
mergify[bot]
mergify[bot]
parent
1436aea4d5
commit
2f88bd3a12
@@ -18,7 +18,7 @@
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0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \
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}
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typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;
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typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;
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///
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/// *******************************************************
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@@ -26,7 +26,7 @@ typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;
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/// *******************************************************
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///
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typedef enum {
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EfiPciIoWidthUint8 = 0,
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EfiPciIoWidthUint8 = 0,
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EfiPciIoWidthUint16,
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EfiPciIoWidthUint32,
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EfiPciIoWidthUint64,
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@@ -44,30 +44,30 @@ typedef enum {
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//
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// Complete PCI address generater
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//
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#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or I/O cycle through unchanged
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#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cycles
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#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are combined
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#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 ///< Clear for an add-in PCI Device
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 ///< Clear for a physical PCI Option ROM accessed through ROM BAR
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#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
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#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or I/O cycle through unchanged
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#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cycles
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#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are combined
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#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 ///< Clear for an add-in PCI Device
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 ///< Clear for a physical PCI Option ROM accessed through ROM BAR
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#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
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#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
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#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
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#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
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#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
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///
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/// *******************************************************
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@@ -190,11 +190,11 @@ typedef struct {
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///
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/// Read PCI controller registers in the PCI memory or I/O space.
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///
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EFI_PCI_IO_PROTOCOL_IO_MEM Read;
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EFI_PCI_IO_PROTOCOL_IO_MEM Read;
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///
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/// Write PCI controller registers in the PCI memory or I/O space.
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///
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EFI_PCI_IO_PROTOCOL_IO_MEM Write;
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EFI_PCI_IO_PROTOCOL_IO_MEM Write;
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} EFI_PCI_IO_PROTOCOL_ACCESS;
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/**
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@@ -229,11 +229,11 @@ typedef struct {
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///
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/// Read PCI controller registers in PCI configuration space.
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///
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EFI_PCI_IO_PROTOCOL_CONFIG Read;
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EFI_PCI_IO_PROTOCOL_CONFIG Read;
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///
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/// Write PCI controller registers in PCI configuration space.
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///
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EFI_PCI_IO_PROTOCOL_CONFIG Write;
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EFI_PCI_IO_PROTOCOL_CONFIG Write;
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} EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
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/**
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@@ -514,26 +514,26 @@ EFI_STATUS
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/// retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller.
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///
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struct _EFI_PCI_IO_PROTOCOL {
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EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem;
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EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo;
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EFI_PCI_IO_PROTOCOL_ACCESS Mem;
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EFI_PCI_IO_PROTOCOL_ACCESS Io;
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EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;
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EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem;
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EFI_PCI_IO_PROTOCOL_MAP Map;
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EFI_PCI_IO_PROTOCOL_UNMAP Unmap;
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EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
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EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
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EFI_PCI_IO_PROTOCOL_FLUSH Flush;
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EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation;
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EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes;
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EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes;
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EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes;
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EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem;
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EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo;
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EFI_PCI_IO_PROTOCOL_ACCESS Mem;
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EFI_PCI_IO_PROTOCOL_ACCESS Io;
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EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;
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EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem;
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EFI_PCI_IO_PROTOCOL_MAP Map;
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EFI_PCI_IO_PROTOCOL_UNMAP Unmap;
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EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
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EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
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EFI_PCI_IO_PROTOCOL_FLUSH Flush;
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EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation;
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EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes;
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EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes;
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EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes;
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///
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/// The size, in bytes, of the ROM image.
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///
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UINT64 RomSize;
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UINT64 RomSize;
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///
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/// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
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@@ -543,9 +543,9 @@ struct _EFI_PCI_IO_PROTOCOL {
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/// The Attributes() function can be used to determine from which of these two sources
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/// the RomImage buffer was initialized.
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///
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VOID *RomImage;
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VOID *RomImage;
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};
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extern EFI_GUID gEfiPciIoProtocolGuid;
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extern EFI_GUID gEfiPciIoProtocolGuid;
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#endif
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