MdePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Michael Kubacki
committed by
mergify[bot]
mergify[bot]
parent
1436aea4d5
commit
2f88bd3a12
@@ -7,7 +7,6 @@
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**/
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#include <Base.h>
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#include <Library/BaseLib.h>
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@@ -51,7 +50,7 @@
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@param M Additional bits to assert to be zero.
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**/
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#define ASSERT_INVALID_PCI_ADDRESS(A,M) \
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#define ASSERT_INVALID_PCI_ADDRESS(A, M) \
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ASSERT (((A) & (~0xffff0ff | (M))) == 0)
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/**
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@@ -105,7 +104,7 @@ PciCf8RegisterForRuntimeAccess (
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UINT8
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EFIAPI
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PciCf8Read8 (
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IN UINTN Address
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IN UINTN Address
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)
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{
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BOOLEAN InterruptState;
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@@ -114,7 +113,7 @@ PciCf8Read8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3));
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
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@@ -142,8 +141,8 @@ PciCf8Read8 (
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UINT8
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EFIAPI
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PciCf8Write8 (
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IN UINTN Address,
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IN UINT8 Value
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IN UINTN Address,
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IN UINT8 Value
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)
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{
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BOOLEAN InterruptState;
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@@ -152,7 +151,7 @@ PciCf8Write8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoWrite8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -187,8 +186,8 @@ PciCf8Write8 (
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UINT8
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EFIAPI
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PciCf8Or8 (
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IN UINTN Address,
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IN UINT8 OrData
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IN UINTN Address,
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IN UINT8 OrData
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)
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{
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BOOLEAN InterruptState;
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@@ -197,7 +196,7 @@ PciCf8Or8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoOr8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -232,8 +231,8 @@ PciCf8Or8 (
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UINT8
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EFIAPI
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PciCf8And8 (
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IN UINTN Address,
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IN UINT8 AndData
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IN UINTN Address,
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IN UINT8 AndData
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)
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{
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BOOLEAN InterruptState;
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@@ -242,7 +241,7 @@ PciCf8And8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoAnd8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -279,9 +278,9 @@ PciCf8And8 (
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UINT8
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EFIAPI
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PciCf8AndThenOr8 (
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IN UINTN Address,
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IN UINT8 AndData,
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IN UINT8 OrData
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IN UINTN Address,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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BOOLEAN InterruptState;
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@@ -290,7 +289,7 @@ PciCf8AndThenOr8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoAndThenOr8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -327,9 +326,9 @@ PciCf8AndThenOr8 (
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UINT8
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EFIAPI
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PciCf8BitFieldRead8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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)
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{
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BOOLEAN InterruptState;
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@@ -338,7 +337,7 @@ PciCf8BitFieldRead8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldRead8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -378,10 +377,10 @@ PciCf8BitFieldRead8 (
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UINT8
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EFIAPI
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PciCf8BitFieldWrite8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 Value
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 Value
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)
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{
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BOOLEAN InterruptState;
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@@ -390,7 +389,7 @@ PciCf8BitFieldWrite8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldWrite8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -434,10 +433,10 @@ PciCf8BitFieldWrite8 (
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UINT8
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EFIAPI
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PciCf8BitFieldOr8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 OrData
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 OrData
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)
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{
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BOOLEAN InterruptState;
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@@ -446,7 +445,7 @@ PciCf8BitFieldOr8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldOr8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -490,10 +489,10 @@ PciCf8BitFieldOr8 (
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UINT8
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EFIAPI
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PciCf8BitFieldAnd8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData
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)
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{
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BOOLEAN InterruptState;
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@@ -502,7 +501,7 @@ PciCf8BitFieldAnd8 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldAnd8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -549,12 +548,12 @@ PciCf8BitFieldAnd8 (
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**/
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UINT8
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EFIAPI
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PciCf8BitFieldAndThenOr8(
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData,
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IN UINT8 OrData
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PciCf8BitFieldAndThenOr8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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BOOLEAN InterruptState;
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@@ -563,7 +562,7 @@ PciCf8BitFieldAndThenOr8(
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ASSERT_INVALID_PCI_ADDRESS (Address, 0);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldAndThenOr8 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
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@@ -597,7 +596,7 @@ PciCf8BitFieldAndThenOr8(
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UINT16
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EFIAPI
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PciCf8Read16 (
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IN UINTN Address
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IN UINTN Address
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)
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{
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BOOLEAN InterruptState;
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@@ -606,7 +605,7 @@ PciCf8Read16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2));
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
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@@ -635,8 +634,8 @@ PciCf8Read16 (
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UINT16
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EFIAPI
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PciCf8Write16 (
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IN UINTN Address,
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IN UINT16 Value
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IN UINTN Address,
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IN UINT16 Value
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)
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{
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BOOLEAN InterruptState;
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@@ -645,7 +644,7 @@ PciCf8Write16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoWrite16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -681,8 +680,8 @@ PciCf8Write16 (
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UINT16
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EFIAPI
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PciCf8Or16 (
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IN UINTN Address,
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IN UINT16 OrData
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IN UINTN Address,
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IN UINT16 OrData
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)
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{
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BOOLEAN InterruptState;
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@@ -691,7 +690,7 @@ PciCf8Or16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoOr16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -727,8 +726,8 @@ PciCf8Or16 (
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UINT16
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EFIAPI
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PciCf8And16 (
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IN UINTN Address,
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IN UINT16 AndData
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IN UINTN Address,
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IN UINT16 AndData
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)
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{
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BOOLEAN InterruptState;
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@@ -737,7 +736,7 @@ PciCf8And16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoAnd16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -775,9 +774,9 @@ PciCf8And16 (
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UINT16
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EFIAPI
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PciCf8AndThenOr16 (
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IN UINTN Address,
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IN UINT16 AndData,
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IN UINT16 OrData
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IN UINTN Address,
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IN UINT16 AndData,
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IN UINT16 OrData
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)
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{
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BOOLEAN InterruptState;
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@@ -786,7 +785,7 @@ PciCf8AndThenOr16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoAndThenOr16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -824,9 +823,9 @@ PciCf8AndThenOr16 (
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UINT16
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EFIAPI
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PciCf8BitFieldRead16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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)
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{
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BOOLEAN InterruptState;
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@@ -835,7 +834,7 @@ PciCf8BitFieldRead16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldRead16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -876,10 +875,10 @@ PciCf8BitFieldRead16 (
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UINT16
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EFIAPI
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PciCf8BitFieldWrite16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 Value
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 Value
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)
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{
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BOOLEAN InterruptState;
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@@ -888,7 +887,7 @@ PciCf8BitFieldWrite16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldWrite16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -933,10 +932,10 @@ PciCf8BitFieldWrite16 (
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UINT16
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EFIAPI
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PciCf8BitFieldOr16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 OrData
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 OrData
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)
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{
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BOOLEAN InterruptState;
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@@ -945,7 +944,7 @@ PciCf8BitFieldOr16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldOr16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -990,10 +989,10 @@ PciCf8BitFieldOr16 (
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UINT16
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EFIAPI
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PciCf8BitFieldAnd16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData
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)
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{
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BOOLEAN InterruptState;
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@@ -1002,7 +1001,7 @@ PciCf8BitFieldAnd16 (
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ASSERT_INVALID_PCI_ADDRESS (Address, 1);
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InterruptState = SaveAndDisableInterrupts ();
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
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IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
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Result = IoBitFieldAnd16 (
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PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
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@@ -1050,12 +1049,12 @@ PciCf8BitFieldAnd16 (
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**/
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UINT16
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EFIAPI
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PciCf8BitFieldAndThenOr16(
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData,
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IN UINT16 OrData
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PciCf8BitFieldAndThenOr16 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT16 AndData,
|
||||
IN UINT16 OrData
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1064,7 +1063,7 @@ PciCf8BitFieldAndThenOr16(
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoBitFieldAndThenOr16 (
|
||||
PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
|
||||
@@ -1098,7 +1097,7 @@ PciCf8BitFieldAndThenOr16(
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8Read32 (
|
||||
IN UINTN Address
|
||||
IN UINTN Address
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1107,7 +1106,7 @@ PciCf8Read32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoRead32 (PCI_CONFIGURATION_DATA_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
|
||||
@@ -1136,8 +1135,8 @@ PciCf8Read32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8Write32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 Value
|
||||
IN UINTN Address,
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1146,7 +1145,7 @@ PciCf8Write32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoWrite32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1182,8 +1181,8 @@ PciCf8Write32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8Or32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 OrData
|
||||
IN UINTN Address,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1192,7 +1191,7 @@ PciCf8Or32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoOr32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1228,8 +1227,8 @@ PciCf8Or32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8And32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1238,7 +1237,7 @@ PciCf8And32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoAnd32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1276,9 +1275,9 @@ PciCf8And32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8AndThenOr32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1287,7 +1286,7 @@ PciCf8AndThenOr32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoAndThenOr32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1325,9 +1324,9 @@ PciCf8AndThenOr32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8BitFieldRead32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1336,7 +1335,7 @@ PciCf8BitFieldRead32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoBitFieldRead32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1377,10 +1376,10 @@ PciCf8BitFieldRead32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8BitFieldWrite32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 Value
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1389,7 +1388,7 @@ PciCf8BitFieldWrite32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoBitFieldWrite32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1434,10 +1433,10 @@ PciCf8BitFieldWrite32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8BitFieldOr32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 OrData
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1446,7 +1445,7 @@ PciCf8BitFieldOr32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoBitFieldOr32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1491,10 +1490,10 @@ PciCf8BitFieldOr32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8BitFieldAnd32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1503,7 +1502,7 @@ PciCf8BitFieldAnd32 (
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoBitFieldAnd32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
@@ -1551,12 +1550,12 @@ PciCf8BitFieldAnd32 (
|
||||
**/
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciCf8BitFieldAndThenOr32(
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
PciCf8BitFieldAndThenOr32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
BOOLEAN InterruptState;
|
||||
@@ -1565,15 +1564,15 @@ PciCf8BitFieldAndThenOr32(
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
|
||||
InterruptState = SaveAndDisableInterrupts ();
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
|
||||
Result = IoBitFieldAndThenOr32 (
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
StartBit,
|
||||
EndBit,
|
||||
AndData,
|
||||
OrData
|
||||
);
|
||||
PCI_CONFIGURATION_DATA_PORT,
|
||||
StartBit,
|
||||
EndBit,
|
||||
AndData,
|
||||
OrData
|
||||
);
|
||||
IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
|
||||
SetInterruptState (InterruptState);
|
||||
return Result;
|
||||
@@ -1606,12 +1605,12 @@ PciCf8BitFieldAndThenOr32(
|
||||
UINTN
|
||||
EFIAPI
|
||||
PciCf8ReadBuffer (
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
OUT VOID *Buffer
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
OUT VOID *Buffer
|
||||
)
|
||||
{
|
||||
UINTN ReturnValue;
|
||||
UINTN ReturnValue;
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);
|
||||
@@ -1632,40 +1631,40 @@ PciCf8ReadBuffer (
|
||||
// Read a byte if StartAddress is byte aligned
|
||||
//
|
||||
*(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8*)Buffer + 1;
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
|
||||
if ((Size >= sizeof (UINT16)) && ((StartAddress & 2) != 0)) {
|
||||
//
|
||||
// Read a word if StartAddress is word aligned
|
||||
//
|
||||
WriteUnaligned16 ((UINT16 *)Buffer, (UINT16) PciCf8Read16 (StartAddress));
|
||||
WriteUnaligned16 ((UINT16 *)Buffer, (UINT16)PciCf8Read16 (StartAddress));
|
||||
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
while (Size >= sizeof (UINT32)) {
|
||||
//
|
||||
// Read as many double words as possible
|
||||
//
|
||||
WriteUnaligned32 ((UINT32 *)Buffer, (UINT32) PciCf8Read32 (StartAddress));
|
||||
WriteUnaligned32 ((UINT32 *)Buffer, (UINT32)PciCf8Read32 (StartAddress));
|
||||
StartAddress += sizeof (UINT32);
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32*)Buffer + 1;
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16)) {
|
||||
//
|
||||
// Read the last remaining word if exist
|
||||
//
|
||||
WriteUnaligned16 ((UINT16 *)Buffer, (UINT16) PciCf8Read16 (StartAddress));
|
||||
WriteUnaligned16 ((UINT16 *)Buffer, (UINT16)PciCf8Read16 (StartAddress));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT8)) {
|
||||
@@ -1706,12 +1705,12 @@ PciCf8ReadBuffer (
|
||||
UINTN
|
||||
EFIAPI
|
||||
PciCf8WriteBuffer (
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
IN VOID *Buffer
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
IN VOID *Buffer
|
||||
)
|
||||
{
|
||||
UINTN ReturnValue;
|
||||
UINTN ReturnValue;
|
||||
|
||||
ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);
|
||||
@@ -1731,47 +1730,47 @@ PciCf8WriteBuffer (
|
||||
//
|
||||
// Write a byte if StartAddress is byte aligned
|
||||
//
|
||||
PciCf8Write8 (StartAddress, *(UINT8*)Buffer);
|
||||
PciCf8Write8 (StartAddress, *(UINT8 *)Buffer);
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8*)Buffer + 1;
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
|
||||
if ((Size >= sizeof (UINT16)) && ((StartAddress & 2) != 0)) {
|
||||
//
|
||||
// Write a word if StartAddress is word aligned
|
||||
//
|
||||
PciCf8Write16 (StartAddress, ReadUnaligned16 ((UINT16*)Buffer));
|
||||
PciCf8Write16 (StartAddress, ReadUnaligned16 ((UINT16 *)Buffer));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
while (Size >= sizeof (UINT32)) {
|
||||
//
|
||||
// Write as many double words as possible
|
||||
//
|
||||
PciCf8Write32 (StartAddress, ReadUnaligned32 ((UINT32*)Buffer));
|
||||
PciCf8Write32 (StartAddress, ReadUnaligned32 ((UINT32 *)Buffer));
|
||||
StartAddress += sizeof (UINT32);
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32*)Buffer + 1;
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16)) {
|
||||
//
|
||||
// Write the last remaining word if exist
|
||||
//
|
||||
PciCf8Write16 (StartAddress, ReadUnaligned16 ((UINT16*)Buffer));
|
||||
PciCf8Write16 (StartAddress, ReadUnaligned16 ((UINT16 *)Buffer));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT8)) {
|
||||
//
|
||||
// Write the last remaining byte if exist
|
||||
//
|
||||
PciCf8Write8 (StartAddress, *(UINT8*)Buffer);
|
||||
PciCf8Write8 (StartAddress, *(UINT8 *)Buffer);
|
||||
}
|
||||
|
||||
return ReturnValue;
|
||||
|
||||
Reference in New Issue
Block a user