MdePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Michael Kubacki
committed by
mergify[bot]
mergify[bot]
parent
1436aea4d5
commit
2f88bd3a12
@@ -10,7 +10,6 @@
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**/
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#include <PiDxe.h>
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#include <Guid/EventGroup.h>
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@@ -39,25 +38,25 @@
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/// Define table for mapping PCI Express MMIO physical addresses to virtual addresses at OS runtime
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///
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typedef struct {
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UINTN PhysicalAddress;
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UINTN VirtualAddress;
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UINTN PhysicalAddress;
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UINTN VirtualAddress;
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} PCI_EXPRESS_RUNTIME_REGISTRATION_TABLE;
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///
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/// Set Virtual Address Map Event
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///
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EFI_EVENT mDxeRuntimePciExpressLibVirtualNotifyEvent = NULL;
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EFI_EVENT mDxeRuntimePciExpressLibVirtualNotifyEvent = NULL;
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///
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/// Module global that contains the base physical address and size of the PCI Express MMIO range.
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///
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UINTN mDxeRuntimePciExpressLibPciExpressBaseAddress = 0;
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UINTN mDxeRuntimePciExpressLibPciExpressBaseSize = 0;
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UINTN mDxeRuntimePciExpressLibPciExpressBaseAddress = 0;
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UINTN mDxeRuntimePciExpressLibPciExpressBaseSize = 0;
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///
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/// The number of PCI devices that have been registered for runtime access.
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///
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UINTN mDxeRuntimePciExpressLibNumberOfRuntimeRanges = 0;
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UINTN mDxeRuntimePciExpressLibNumberOfRuntimeRanges = 0;
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///
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/// The table of PCI devices that have been registered for runtime access.
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@@ -67,8 +66,7 @@ PCI_EXPRESS_RUNTIME_REGISTRATION_TABLE *mDxeRuntimePciExpressLibRegistrationTab
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///
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/// The table index of the most recent virtual address lookup.
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///
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UINTN mDxeRuntimePciExpressLibLastRuntimeRange = 0;
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UINTN mDxeRuntimePciExpressLibLastRuntimeRange = 0;
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/**
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Convert the physical PCI Express MMIO addresses for all registered PCI devices
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@@ -98,13 +96,13 @@ DxeRuntimePciExpressLibVirtualNotify (
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// virtual addresses.
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//
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for (Index = 0; Index < mDxeRuntimePciExpressLibNumberOfRuntimeRanges; Index++) {
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EfiConvertPointer (0, (VOID **) &(mDxeRuntimePciExpressLibRegistrationTable[Index].VirtualAddress));
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EfiConvertPointer (0, (VOID **)&(mDxeRuntimePciExpressLibRegistrationTable[Index].VirtualAddress));
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}
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//
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// Convert table pointer that is allocated from EfiRuntimeServicesData to a virtual address.
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//
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EfiConvertPointer (0, (VOID **) &mDxeRuntimePciExpressLibRegistrationTable);
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EfiConvertPointer (0, (VOID **)&mDxeRuntimePciExpressLibRegistrationTable);
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}
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/**
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@@ -130,8 +128,8 @@ DxeRuntimePciExpressLibConstructor (
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//
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// Cache the physical address of the PCI Express MMIO range into a module global variable
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//
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mDxeRuntimePciExpressLibPciExpressBaseAddress = (UINTN) PcdGet64 (PcdPciExpressBaseAddress);
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mDxeRuntimePciExpressLibPciExpressBaseSize = (UINTN) PcdGet64 (PcdPciExpressBaseSize);
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mDxeRuntimePciExpressLibPciExpressBaseAddress = (UINTN)PcdGet64 (PcdPciExpressBaseAddress);
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mDxeRuntimePciExpressLibPciExpressBaseSize = (UINTN)PcdGet64 (PcdPciExpressBaseSize);
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//
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// Register SetVirtualAddressMap () notify function
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@@ -215,7 +213,7 @@ GetPciExpressAddress (
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// Make sure the Address is in MMCONF address space
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//
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINTN) -1;
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return (UINTN)-1;
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}
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//
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@@ -259,7 +257,7 @@ GetPciExpressAddress (
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//
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// No match was found. This is a critical error at OS runtime, so ASSERT() and force a breakpoint.
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//
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CpuBreakpoint();
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CpuBreakpoint ();
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//
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// Return the physical address
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@@ -310,7 +308,7 @@ PciExpressRegisterForRuntimeAccess (
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//
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// Make sure Address is valid
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//
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ASSERT_INVALID_PCI_ADDRESS (Address);
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ASSERT_INVALID_PCI_ADDRESS (Address);
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//
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// Make sure the Address is in MMCONF address space
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@@ -363,7 +361,8 @@ PciExpressRegisterForRuntimeAccess (
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if (NewTable == NULL) {
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return RETURN_OUT_OF_RESOURCES;
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}
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mDxeRuntimePciExpressLibRegistrationTable = NewTable;
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mDxeRuntimePciExpressLibRegistrationTable = NewTable;
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mDxeRuntimePciExpressLibRegistrationTable[mDxeRuntimePciExpressLibNumberOfRuntimeRanges].PhysicalAddress = Address;
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mDxeRuntimePciExpressLibRegistrationTable[mDxeRuntimePciExpressLibNumberOfRuntimeRanges].VirtualAddress = Address;
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mDxeRuntimePciExpressLibNumberOfRuntimeRanges++;
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@@ -371,7 +370,6 @@ PciExpressRegisterForRuntimeAccess (
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return RETURN_SUCCESS;
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}
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/**
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Reads an 8-bit PCI configuration register.
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@@ -390,13 +388,14 @@ PciExpressRegisterForRuntimeAccess (
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UINT8
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EFIAPI
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PciExpressRead8 (
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IN UINTN Address
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IN UINTN Address
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)
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{
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ASSERT_INVALID_PCI_ADDRESS (Address);
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioRead8 (GetPciExpressAddress (Address));
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}
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@@ -420,13 +419,14 @@ PciExpressRead8 (
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UINT8
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EFIAPI
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PciExpressWrite8 (
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IN UINTN Address,
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IN UINT8 Value
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IN UINTN Address,
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IN UINT8 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioWrite8 (GetPciExpressAddress (Address), Value);
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}
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@@ -454,13 +454,14 @@ PciExpressWrite8 (
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UINT8
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EFIAPI
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PciExpressOr8 (
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IN UINTN Address,
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IN UINT8 OrData
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IN UINTN Address,
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioOr8 (GetPciExpressAddress (Address), OrData);
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}
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@@ -488,13 +489,14 @@ PciExpressOr8 (
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UINT8
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EFIAPI
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PciExpressAnd8 (
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IN UINTN Address,
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IN UINT8 AndData
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IN UINTN Address,
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IN UINT8 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioAnd8 (GetPciExpressAddress (Address), AndData);
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}
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@@ -524,14 +526,15 @@ PciExpressAnd8 (
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UINT8
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EFIAPI
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PciExpressAndThenOr8 (
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IN UINTN Address,
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IN UINT8 AndData,
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IN UINT8 OrData
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IN UINTN Address,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioAndThenOr8 (
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GetPciExpressAddress (Address),
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AndData,
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@@ -564,14 +567,15 @@ PciExpressAndThenOr8 (
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UINT8
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EFIAPI
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PciExpressBitFieldRead8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioBitFieldRead8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -607,15 +611,16 @@ PciExpressBitFieldRead8 (
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UINT8
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EFIAPI
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PciExpressBitFieldWrite8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 Value
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioBitFieldWrite8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -655,15 +660,16 @@ PciExpressBitFieldWrite8 (
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UINT8
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EFIAPI
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PciExpressBitFieldOr8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 OrData
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioBitFieldOr8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -703,15 +709,16 @@ PciExpressBitFieldOr8 (
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UINT8
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EFIAPI
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PciExpressBitFieldAnd8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioBitFieldAnd8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -755,16 +762,17 @@ PciExpressBitFieldAnd8 (
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UINT8
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EFIAPI
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PciExpressBitFieldAndThenOr8 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData,
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IN UINT8 OrData
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT8) -1;
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return (UINT8)-1;
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}
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return MmioBitFieldAndThenOr8 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -794,12 +802,13 @@ PciExpressBitFieldAndThenOr8 (
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UINT16
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EFIAPI
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PciExpressRead16 (
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IN UINTN Address
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IN UINTN Address
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioRead16 (GetPciExpressAddress (Address));
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}
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@@ -824,13 +833,14 @@ PciExpressRead16 (
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UINT16
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EFIAPI
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PciExpressWrite16 (
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IN UINTN Address,
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IN UINT16 Value
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IN UINTN Address,
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IN UINT16 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioWrite16 (GetPciExpressAddress (Address), Value);
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}
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@@ -859,13 +869,14 @@ PciExpressWrite16 (
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UINT16
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EFIAPI
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PciExpressOr16 (
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IN UINTN Address,
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IN UINT16 OrData
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IN UINTN Address,
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IN UINT16 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioOr16 (GetPciExpressAddress (Address), OrData);
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}
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@@ -894,13 +905,14 @@ PciExpressOr16 (
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UINT16
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EFIAPI
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PciExpressAnd16 (
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IN UINTN Address,
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IN UINT16 AndData
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IN UINTN Address,
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IN UINT16 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioAnd16 (GetPciExpressAddress (Address), AndData);
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}
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@@ -931,14 +943,15 @@ PciExpressAnd16 (
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UINT16
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EFIAPI
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PciExpressAndThenOr16 (
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IN UINTN Address,
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IN UINT16 AndData,
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IN UINT16 OrData
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IN UINTN Address,
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IN UINT16 AndData,
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IN UINT16 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioAndThenOr16 (
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GetPciExpressAddress (Address),
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AndData,
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@@ -972,14 +985,15 @@ PciExpressAndThenOr16 (
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UINT16
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EFIAPI
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PciExpressBitFieldRead16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioBitFieldRead16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -1016,15 +1030,16 @@ PciExpressBitFieldRead16 (
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UINT16
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EFIAPI
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PciExpressBitFieldWrite16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 Value
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 Value
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioBitFieldWrite16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -1065,15 +1080,16 @@ PciExpressBitFieldWrite16 (
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UINT16
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EFIAPI
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PciExpressBitFieldOr16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 OrData
|
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 OrData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioBitFieldOr16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -1114,15 +1130,16 @@ PciExpressBitFieldOr16 (
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UINT16
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EFIAPI
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PciExpressBitFieldAnd16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData
|
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData
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)
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{
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if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
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return (UINT16) -1;
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return (UINT16)-1;
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}
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return MmioBitFieldAnd16 (
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GetPciExpressAddress (Address),
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StartBit,
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@@ -1167,16 +1184,17 @@ PciExpressBitFieldAnd16 (
|
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UINT16
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EFIAPI
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PciExpressBitFieldAndThenOr16 (
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData,
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IN UINT16 OrData
|
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IN UINTN Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData,
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IN UINT16 OrData
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)
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{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT16) -1;
|
||||
return (UINT16)-1;
|
||||
}
|
||||
|
||||
return MmioBitFieldAndThenOr16 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1206,12 +1224,13 @@ PciExpressBitFieldAndThenOr16 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressRead32 (
|
||||
IN UINTN Address
|
||||
IN UINTN Address
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioRead32 (GetPciExpressAddress (Address));
|
||||
}
|
||||
|
||||
@@ -1236,13 +1255,14 @@ PciExpressRead32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressWrite32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 Value
|
||||
IN UINTN Address,
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioWrite32 (GetPciExpressAddress (Address), Value);
|
||||
}
|
||||
|
||||
@@ -1271,13 +1291,14 @@ PciExpressWrite32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressOr32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 OrData
|
||||
IN UINTN Address,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioOr32 (GetPciExpressAddress (Address), OrData);
|
||||
}
|
||||
|
||||
@@ -1306,13 +1327,14 @@ PciExpressOr32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressAnd32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioAnd32 (GetPciExpressAddress (Address), AndData);
|
||||
}
|
||||
|
||||
@@ -1343,14 +1365,15 @@ PciExpressAnd32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressAndThenOr32 (
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
IN UINTN Address,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioAndThenOr32 (
|
||||
GetPciExpressAddress (Address),
|
||||
AndData,
|
||||
@@ -1384,14 +1407,15 @@ PciExpressAndThenOr32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressBitFieldRead32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioBitFieldRead32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1428,15 +1452,16 @@ PciExpressBitFieldRead32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressBitFieldWrite32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 Value
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioBitFieldWrite32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1477,15 +1502,16 @@ PciExpressBitFieldWrite32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressBitFieldOr32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 OrData
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioBitFieldOr32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1526,15 +1552,16 @@ PciExpressBitFieldOr32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressBitFieldAnd32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioBitFieldAnd32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1579,16 +1606,17 @@ PciExpressBitFieldAnd32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciExpressBitFieldAndThenOr32 (
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
IN UINTN Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINT32) -1;
|
||||
return (UINT32)-1;
|
||||
}
|
||||
|
||||
return MmioBitFieldAndThenOr32 (
|
||||
GetPciExpressAddress (Address),
|
||||
StartBit,
|
||||
@@ -1625,12 +1653,12 @@ PciExpressBitFieldAndThenOr32 (
|
||||
UINTN
|
||||
EFIAPI
|
||||
PciExpressReadBuffer (
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
OUT VOID *Buffer
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
OUT VOID *Buffer
|
||||
)
|
||||
{
|
||||
UINTN ReturnValue;
|
||||
UINTN ReturnValue;
|
||||
|
||||
//
|
||||
// Make sure Address is valid
|
||||
@@ -1642,7 +1670,7 @@ PciExpressReadBuffer (
|
||||
// Make sure the Address is in MMCONF address space
|
||||
//
|
||||
if (StartAddress >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINTN) -1;
|
||||
return (UINTN)-1;
|
||||
}
|
||||
|
||||
if (Size == 0) {
|
||||
@@ -1661,41 +1689,41 @@ PciExpressReadBuffer (
|
||||
// Read a byte if StartAddress is byte aligned
|
||||
//
|
||||
*(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8*)Buffer + 1;
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
|
||||
if ((Size >= sizeof (UINT16)) && ((StartAddress & 2) != 0)) {
|
||||
//
|
||||
// Read a word if StartAddress is word aligned
|
||||
//
|
||||
WriteUnaligned16 ((UINT16 *) Buffer, (UINT16) PciExpressRead16 (StartAddress));
|
||||
WriteUnaligned16 ((UINT16 *)Buffer, (UINT16)PciExpressRead16 (StartAddress));
|
||||
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
while (Size >= sizeof (UINT32)) {
|
||||
//
|
||||
// Read as many double words as possible
|
||||
//
|
||||
WriteUnaligned32 ((UINT32 *) Buffer, (UINT32) PciExpressRead32 (StartAddress));
|
||||
WriteUnaligned32 ((UINT32 *)Buffer, (UINT32)PciExpressRead32 (StartAddress));
|
||||
|
||||
StartAddress += sizeof (UINT32);
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32*)Buffer + 1;
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16)) {
|
||||
//
|
||||
// Read the last remaining word if exist
|
||||
//
|
||||
WriteUnaligned16 ((UINT16 *) Buffer, (UINT16) PciExpressRead16 (StartAddress));
|
||||
WriteUnaligned16 ((UINT16 *)Buffer, (UINT16)PciExpressRead16 (StartAddress));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT8)) {
|
||||
@@ -1736,12 +1764,12 @@ PciExpressReadBuffer (
|
||||
UINTN
|
||||
EFIAPI
|
||||
PciExpressWriteBuffer (
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
IN VOID *Buffer
|
||||
IN UINTN StartAddress,
|
||||
IN UINTN Size,
|
||||
IN VOID *Buffer
|
||||
)
|
||||
{
|
||||
UINTN ReturnValue;
|
||||
UINTN ReturnValue;
|
||||
|
||||
//
|
||||
// Make sure Address is valid
|
||||
@@ -1753,7 +1781,7 @@ PciExpressWriteBuffer (
|
||||
// Make sure the Address is in MMCONF address space
|
||||
//
|
||||
if (StartAddress >= mDxeRuntimePciExpressLibPciExpressBaseSize) {
|
||||
return (UINTN) -1;
|
||||
return (UINTN)-1;
|
||||
}
|
||||
|
||||
if (Size == 0) {
|
||||
@@ -1771,47 +1799,47 @@ PciExpressWriteBuffer (
|
||||
//
|
||||
// Write a byte if StartAddress is byte aligned
|
||||
//
|
||||
PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);
|
||||
PciExpressWrite8 (StartAddress, *(UINT8 *)Buffer);
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8*)Buffer + 1;
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
|
||||
if ((Size >= sizeof (UINT16)) && ((StartAddress & 2) != 0)) {
|
||||
//
|
||||
// Write a word if StartAddress is word aligned
|
||||
//
|
||||
PciExpressWrite16 (StartAddress, ReadUnaligned16 ((UINT16*)Buffer));
|
||||
PciExpressWrite16 (StartAddress, ReadUnaligned16 ((UINT16 *)Buffer));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
while (Size >= sizeof (UINT32)) {
|
||||
//
|
||||
// Write as many double words as possible
|
||||
//
|
||||
PciExpressWrite32 (StartAddress, ReadUnaligned32 ((UINT32*)Buffer));
|
||||
PciExpressWrite32 (StartAddress, ReadUnaligned32 ((UINT32 *)Buffer));
|
||||
StartAddress += sizeof (UINT32);
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32*)Buffer + 1;
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16)) {
|
||||
//
|
||||
// Write the last remaining word if exist
|
||||
//
|
||||
PciExpressWrite16 (StartAddress, ReadUnaligned16 ((UINT16*)Buffer));
|
||||
PciExpressWrite16 (StartAddress, ReadUnaligned16 ((UINT16 *)Buffer));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT8)) {
|
||||
//
|
||||
// Write the last remaining byte if exist
|
||||
//
|
||||
PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);
|
||||
PciExpressWrite8 (StartAddress, *(UINT8 *)Buffer);
|
||||
}
|
||||
|
||||
return ReturnValue;
|
||||
|
||||
Reference in New Issue
Block a user