MdePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
committed by
mergify[bot]
parent
1436aea4d5
commit
2f88bd3a12
@@ -11,8 +11,8 @@
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//
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// Global variable to record data of PCI Root Bridge I/O Protocol instances
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//
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PCI_ROOT_BRIDGE_DATA *mPciRootBridgeData = NULL;
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UINTN mNumberOfPciRootBridges = 0;
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PCI_ROOT_BRIDGE_DATA *mPciRootBridgeData = NULL;
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UINTN mNumberOfPciRootBridges = 0;
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/**
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The constructor function caches data of PCI Root Bridge I/O Protocol instances.
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@@ -30,16 +30,16 @@ UINTN mNumberOfPciRootBridges = 0;
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EFI_STATUS
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EFIAPI
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PciSegmentLibConstructor (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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UINTN Index;
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UINTN HandleCount;
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EFI_HANDLE *HandleBuffer;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
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EFI_STATUS Status;
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UINTN Index;
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UINTN HandleCount;
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EFI_HANDLE *HandleBuffer;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
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HandleCount = 0;
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HandleBuffer = NULL;
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@@ -68,14 +68,14 @@ PciSegmentLibConstructor (
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Status = gBS->HandleProtocol (
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HandleBuffer[Index],
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&gEfiPciRootBridgeIoProtocolGuid,
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(VOID **) &PciRootBridgeIo
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(VOID **)&PciRootBridgeIo
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);
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ASSERT_EFI_ERROR (Status);
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mPciRootBridgeData[Index].PciRootBridgeIo = PciRootBridgeIo;
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mPciRootBridgeData[Index].SegmentNumber = PciRootBridgeIo->SegmentNumber;
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Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **) &Descriptors);
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Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **)&Descriptors);
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ASSERT_EFI_ERROR (Status);
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while (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR) {
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@@ -84,12 +84,14 @@ PciSegmentLibConstructor (
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mPciRootBridgeData[Index].MaxBusNumber = Descriptors->AddrRangeMax;
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break;
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}
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Descriptors++;
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}
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ASSERT (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR);
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}
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FreePool(HandleBuffer);
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FreePool (HandleBuffer);
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return EFI_SUCCESS;
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}
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@@ -109,8 +111,8 @@ PciSegmentLibConstructor (
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EFI_STATUS
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EFIAPI
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PciSegmentLibDestructor (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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FreePool (mPciRootBridgeData);
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@@ -132,12 +134,12 @@ PciSegmentLibDestructor (
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**/
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *
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PciSegmentLibSearchForRootBridge (
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IN UINT64 Address
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IN UINT64 Address
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)
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{
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UINTN Index;
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UINT64 SegmentNumber;
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UINT64 BusNumber;
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UINTN Index;
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UINT64 SegmentNumber;
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UINT64 BusNumber;
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for (Index = 0; Index < mNumberOfPciRootBridges; Index++) {
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//
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@@ -149,11 +151,12 @@ PciSegmentLibSearchForRootBridge (
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// Matches the bus number of address with bus number range of protocol instance.
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//
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BusNumber = BitFieldRead64 (Address, 20, 27);
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if (BusNumber >= mPciRootBridgeData[Index].MinBusNumber && BusNumber <= mPciRootBridgeData[Index].MaxBusNumber) {
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if ((BusNumber >= mPciRootBridgeData[Index].MinBusNumber) && (BusNumber <= mPciRootBridgeData[Index].MaxBusNumber)) {
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return mPciRootBridgeData[Index].PciRootBridgeIo;
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}
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}
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}
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return NULL;
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}
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@@ -177,8 +180,8 @@ DxePciSegmentLibPciRootBridgeIoReadWorker (
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
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)
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{
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UINT32 Data;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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UINT32 Data;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
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ASSERT (PciRootBridgeIo != NULL);
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@@ -217,7 +220,7 @@ DxePciSegmentLibPciRootBridgeIoWriteWorker (
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IN UINT32 Data
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)
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{
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
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ASSERT (PciRootBridgeIo != NULL);
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@@ -277,12 +280,12 @@ PciSegmentRegisterForRuntimeAccess (
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UINT8
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EFIAPI
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PciSegmentRead8 (
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IN UINT64 Address
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IN UINT64 Address
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)
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{
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ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);
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return (UINT8) DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);
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return (UINT8)DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);
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}
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/**
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@@ -302,13 +305,13 @@ PciSegmentRead8 (
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UINT8
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EFIAPI
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PciSegmentWrite8 (
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IN UINT64 Address,
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IN UINT8 Value
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IN UINT64 Address,
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IN UINT8 Value
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)
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{
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ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);
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return (UINT8) DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);
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return (UINT8)DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);
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}
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/**
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@@ -331,11 +334,11 @@ PciSegmentWrite8 (
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UINT8
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EFIAPI
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PciSegmentOr8 (
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IN UINT64 Address,
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IN UINT8 OrData
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IN UINT64 Address,
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IN UINT8 OrData
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)
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{
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return PciSegmentWrite8 (Address, (UINT8) (PciSegmentRead8 (Address) | OrData));
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return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) | OrData));
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}
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/**
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@@ -357,11 +360,11 @@ PciSegmentOr8 (
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UINT8
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EFIAPI
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PciSegmentAnd8 (
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IN UINT64 Address,
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IN UINT8 AndData
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IN UINT64 Address,
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IN UINT8 AndData
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)
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{
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return PciSegmentWrite8 (Address, (UINT8) (PciSegmentRead8 (Address) & AndData));
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return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) & AndData));
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}
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/**
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@@ -387,12 +390,12 @@ PciSegmentAnd8 (
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UINT8
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EFIAPI
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PciSegmentAndThenOr8 (
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IN UINT64 Address,
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IN UINT8 AndData,
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IN UINT8 OrData
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IN UINT64 Address,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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return PciSegmentWrite8 (Address, (UINT8) ((PciSegmentRead8 (Address) & AndData) | OrData));
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return PciSegmentWrite8 (Address, (UINT8)((PciSegmentRead8 (Address) & AndData) | OrData));
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}
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/**
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@@ -419,9 +422,9 @@ PciSegmentAndThenOr8 (
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UINT8
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EFIAPI
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PciSegmentBitFieldRead8 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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)
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{
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return BitFieldRead8 (PciSegmentRead8 (Address), StartBit, EndBit);
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@@ -454,10 +457,10 @@ PciSegmentBitFieldRead8 (
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UINT8
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EFIAPI
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PciSegmentBitFieldWrite8 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 Value
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 Value
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)
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{
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return PciSegmentWrite8 (
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@@ -496,10 +499,10 @@ PciSegmentBitFieldWrite8 (
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UINT8
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EFIAPI
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PciSegmentBitFieldOr8 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 OrData
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 OrData
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)
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{
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return PciSegmentWrite8 (
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@@ -538,10 +541,10 @@ PciSegmentBitFieldOr8 (
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UINT8
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EFIAPI
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PciSegmentBitFieldAnd8 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData
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)
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{
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return PciSegmentWrite8 (
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@@ -583,11 +586,11 @@ PciSegmentBitFieldAnd8 (
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UINT8
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EFIAPI
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PciSegmentBitFieldAndThenOr8 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData,
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IN UINT8 OrData
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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return PciSegmentWrite8 (
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@@ -613,12 +616,12 @@ PciSegmentBitFieldAndThenOr8 (
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UINT16
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EFIAPI
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PciSegmentRead16 (
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IN UINT64 Address
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IN UINT64 Address
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)
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{
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ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1);
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return (UINT16) DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);
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return (UINT16)DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);
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}
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/**
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@@ -639,13 +642,13 @@ PciSegmentRead16 (
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UINT16
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EFIAPI
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PciSegmentWrite16 (
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IN UINT64 Address,
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IN UINT16 Value
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IN UINT64 Address,
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IN UINT16 Value
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)
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{
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ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1);
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return (UINT16) DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);
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return (UINT16)DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);
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}
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/**
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@@ -671,11 +674,11 @@ PciSegmentWrite16 (
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UINT16
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EFIAPI
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PciSegmentOr16 (
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IN UINT64 Address,
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IN UINT16 OrData
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IN UINT64 Address,
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IN UINT16 OrData
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)
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{
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return PciSegmentWrite16 (Address, (UINT16) (PciSegmentRead16 (Address) | OrData));
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return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) | OrData));
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}
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/**
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@@ -699,11 +702,11 @@ PciSegmentOr16 (
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UINT16
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EFIAPI
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PciSegmentAnd16 (
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IN UINT64 Address,
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IN UINT16 AndData
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IN UINT64 Address,
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IN UINT16 AndData
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)
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{
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return PciSegmentWrite16 (Address, (UINT16) (PciSegmentRead16 (Address) & AndData));
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return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) & AndData));
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}
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/**
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@@ -730,12 +733,12 @@ PciSegmentAnd16 (
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UINT16
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EFIAPI
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PciSegmentAndThenOr16 (
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IN UINT64 Address,
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IN UINT16 AndData,
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IN UINT16 OrData
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IN UINT64 Address,
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IN UINT16 AndData,
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IN UINT16 OrData
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)
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{
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return PciSegmentWrite16 (Address, (UINT16) ((PciSegmentRead16 (Address) & AndData) | OrData));
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return PciSegmentWrite16 (Address, (UINT16)((PciSegmentRead16 (Address) & AndData) | OrData));
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}
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/**
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@@ -763,9 +766,9 @@ PciSegmentAndThenOr16 (
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UINT16
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EFIAPI
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PciSegmentBitFieldRead16 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit
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)
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{
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return BitFieldRead16 (PciSegmentRead16 (Address), StartBit, EndBit);
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@@ -799,10 +802,10 @@ PciSegmentBitFieldRead16 (
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UINT16
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EFIAPI
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PciSegmentBitFieldWrite16 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 Value
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 Value
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)
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{
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return PciSegmentWrite16 (
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@@ -842,10 +845,10 @@ PciSegmentBitFieldWrite16 (
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UINT16
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EFIAPI
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PciSegmentBitFieldOr16 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 OrData
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 OrData
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)
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{
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return PciSegmentWrite16 (
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@@ -885,10 +888,10 @@ PciSegmentBitFieldOr16 (
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UINT16
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EFIAPI
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PciSegmentBitFieldAnd16 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData
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)
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{
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return PciSegmentWrite16 (
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@@ -931,11 +934,11 @@ PciSegmentBitFieldAnd16 (
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UINT16
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EFIAPI
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PciSegmentBitFieldAndThenOr16 (
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
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IN UINT16 AndData,
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IN UINT16 OrData
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IN UINT64 Address,
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IN UINTN StartBit,
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IN UINTN EndBit,
|
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IN UINT16 AndData,
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IN UINT16 OrData
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)
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{
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return PciSegmentWrite16 (
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@@ -961,7 +964,7 @@ PciSegmentBitFieldAndThenOr16 (
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UINT32
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EFIAPI
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PciSegmentRead32 (
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IN UINT64 Address
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IN UINT64 Address
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)
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{
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ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3);
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@@ -987,8 +990,8 @@ PciSegmentRead32 (
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UINT32
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EFIAPI
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PciSegmentWrite32 (
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IN UINT64 Address,
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IN UINT32 Value
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IN UINT64 Address,
|
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IN UINT32 Value
|
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)
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{
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ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3);
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@@ -1017,8 +1020,8 @@ PciSegmentWrite32 (
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UINT32
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EFIAPI
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PciSegmentOr32 (
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IN UINT64 Address,
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IN UINT32 OrData
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IN UINT64 Address,
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IN UINT32 OrData
|
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)
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{
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return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) | OrData);
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@@ -1045,8 +1048,8 @@ PciSegmentOr32 (
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UINT32
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EFIAPI
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PciSegmentAnd32 (
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IN UINT64 Address,
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IN UINT32 AndData
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IN UINT64 Address,
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IN UINT32 AndData
|
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)
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{
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return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) & AndData);
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@@ -1076,9 +1079,9 @@ PciSegmentAnd32 (
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UINT32
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EFIAPI
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PciSegmentAndThenOr32 (
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IN UINT64 Address,
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IN UINT32 AndData,
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IN UINT32 OrData
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IN UINT64 Address,
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IN UINT32 AndData,
|
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IN UINT32 OrData
|
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)
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{
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return PciSegmentWrite32 (Address, (PciSegmentRead32 (Address) & AndData) | OrData);
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@@ -1109,9 +1112,9 @@ PciSegmentAndThenOr32 (
|
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UINT32
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EFIAPI
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PciSegmentBitFieldRead32 (
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit
|
||||
)
|
||||
{
|
||||
return BitFieldRead32 (PciSegmentRead32 (Address), StartBit, EndBit);
|
||||
@@ -1145,10 +1148,10 @@ PciSegmentBitFieldRead32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciSegmentBitFieldWrite32 (
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 Value
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 Value
|
||||
)
|
||||
{
|
||||
return PciSegmentWrite32 (
|
||||
@@ -1187,10 +1190,10 @@ PciSegmentBitFieldWrite32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciSegmentBitFieldOr32 (
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 OrData
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
return PciSegmentWrite32 (
|
||||
@@ -1229,10 +1232,10 @@ PciSegmentBitFieldOr32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciSegmentBitFieldAnd32 (
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData
|
||||
)
|
||||
{
|
||||
return PciSegmentWrite32 (
|
||||
@@ -1275,11 +1278,11 @@ PciSegmentBitFieldAnd32 (
|
||||
UINT32
|
||||
EFIAPI
|
||||
PciSegmentBitFieldAndThenOr32 (
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
IN UINT64 Address,
|
||||
IN UINTN StartBit,
|
||||
IN UINTN EndBit,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
return PciSegmentWrite32 (
|
||||
@@ -1314,12 +1317,12 @@ PciSegmentBitFieldAndThenOr32 (
|
||||
UINTN
|
||||
EFIAPI
|
||||
PciSegmentReadBuffer (
|
||||
IN UINT64 StartAddress,
|
||||
IN UINTN Size,
|
||||
OUT VOID *Buffer
|
||||
IN UINT64 StartAddress,
|
||||
IN UINTN Size,
|
||||
OUT VOID *Buffer
|
||||
)
|
||||
{
|
||||
UINTN ReturnValue;
|
||||
UINTN ReturnValue;
|
||||
|
||||
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
|
||||
@@ -1340,19 +1343,19 @@ PciSegmentReadBuffer (
|
||||
// Read a byte if StartAddress is byte aligned
|
||||
//
|
||||
*(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress);
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8*)Buffer + 1;
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {
|
||||
if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
|
||||
//
|
||||
// Read a word if StartAddress is word aligned
|
||||
//
|
||||
WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
while (Size >= sizeof (UINT32)) {
|
||||
@@ -1361,8 +1364,8 @@ PciSegmentReadBuffer (
|
||||
//
|
||||
WriteUnaligned32 (Buffer, PciSegmentRead32 (StartAddress));
|
||||
StartAddress += sizeof (UINT32);
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32*)Buffer + 1;
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16)) {
|
||||
@@ -1371,8 +1374,8 @@ PciSegmentReadBuffer (
|
||||
//
|
||||
WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT8)) {
|
||||
@@ -1412,12 +1415,12 @@ PciSegmentReadBuffer (
|
||||
UINTN
|
||||
EFIAPI
|
||||
PciSegmentWriteBuffer (
|
||||
IN UINT64 StartAddress,
|
||||
IN UINTN Size,
|
||||
IN VOID *Buffer
|
||||
IN UINT64 StartAddress,
|
||||
IN UINTN Size,
|
||||
IN VOID *Buffer
|
||||
)
|
||||
{
|
||||
UINTN ReturnValue;
|
||||
UINTN ReturnValue;
|
||||
|
||||
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
|
||||
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
|
||||
@@ -1437,20 +1440,20 @@ PciSegmentWriteBuffer (
|
||||
//
|
||||
// Write a byte if StartAddress is byte aligned
|
||||
//
|
||||
PciSegmentWrite8 (StartAddress, *(UINT8*)Buffer);
|
||||
PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer);
|
||||
StartAddress += sizeof (UINT8);
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8*)Buffer + 1;
|
||||
Size -= sizeof (UINT8);
|
||||
Buffer = (UINT8 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {
|
||||
if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
|
||||
//
|
||||
// Write a word if StartAddress is word aligned
|
||||
//
|
||||
PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
while (Size >= sizeof (UINT32)) {
|
||||
@@ -1459,8 +1462,8 @@ PciSegmentWriteBuffer (
|
||||
//
|
||||
PciSegmentWrite32 (StartAddress, ReadUnaligned32 (Buffer));
|
||||
StartAddress += sizeof (UINT32);
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32*)Buffer + 1;
|
||||
Size -= sizeof (UINT32);
|
||||
Buffer = (UINT32 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT16)) {
|
||||
@@ -1469,15 +1472,15 @@ PciSegmentWriteBuffer (
|
||||
//
|
||||
PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
|
||||
StartAddress += sizeof (UINT16);
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16*)Buffer + 1;
|
||||
Size -= sizeof (UINT16);
|
||||
Buffer = (UINT16 *)Buffer + 1;
|
||||
}
|
||||
|
||||
if (Size >= sizeof (UINT8)) {
|
||||
//
|
||||
// Write the last remaining byte if exist
|
||||
//
|
||||
PciSegmentWrite8 (StartAddress, *(UINT8*)Buffer);
|
||||
PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer);
|
||||
}
|
||||
|
||||
return ReturnValue;
|
||||
|
Reference in New Issue
Block a user