Minor grammatical work--mostly adding periods. Items with ONLY period added did not have the heading date changed, but Items with content changes had heading copyright dates updated. Sending separately a list of files missing Doxygen @param and @return information. (PENDING)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10604 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
@@ -5,11 +5,11 @@
|
||||
All assertions for I/O operations are handled in MMIO functions in the IoLib
|
||||
Library.
|
||||
|
||||
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
@@ -46,7 +46,7 @@
|
||||
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
|
||||
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
|
||||
@@ -94,7 +94,7 @@ GetPciExpressBaseAddress (
|
||||
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
|
||||
@return The read value from the PCI configuration register.
|
||||
@@ -119,7 +119,7 @@ PciExpressRead8 (
|
||||
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@@ -150,7 +150,7 @@ PciExpressWrite8 (
|
||||
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@@ -181,7 +181,7 @@ PciExpressOr8 (
|
||||
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@@ -213,7 +213,7 @@ PciExpressAnd8 (
|
||||
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the result of the AND operation.
|
||||
@@ -249,7 +249,7 @@ PciExpressAndThenOr8 (
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to read.
|
||||
@param Address The PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -287,12 +287,12 @@ PciExpressBitFieldRead8 (
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param Value New value of the bit field.
|
||||
@param Value The new value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@@ -331,7 +331,7 @@ PciExpressBitFieldWrite8 (
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -375,7 +375,7 @@ PciExpressBitFieldOr8 (
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -421,7 +421,7 @@ PciExpressBitFieldAnd8 (
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -462,7 +462,7 @@ PciExpressBitFieldAndThenOr8 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
|
||||
@return The read value from the PCI configuration register.
|
||||
@@ -488,7 +488,7 @@ PciExpressRead16 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@@ -520,7 +520,7 @@ PciExpressWrite16 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@@ -552,7 +552,7 @@ PciExpressOr16 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@@ -585,7 +585,7 @@ PciExpressAnd16 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the result of the AND operation.
|
||||
@@ -622,7 +622,7 @@ PciExpressAndThenOr16 (
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to read.
|
||||
@param Address The PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -661,12 +661,12 @@ PciExpressBitFieldRead16 (
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param Value New value of the bit field.
|
||||
@param Value The new value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@@ -706,7 +706,7 @@ PciExpressBitFieldWrite16 (
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -751,7 +751,7 @@ PciExpressBitFieldOr16 (
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -798,7 +798,7 @@ PciExpressBitFieldAnd16 (
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -839,7 +839,7 @@ PciExpressBitFieldAndThenOr16 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
|
||||
@return The read value from the PCI configuration register.
|
||||
@@ -865,7 +865,7 @@ PciExpressRead32 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@@ -897,7 +897,7 @@ PciExpressWrite32 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@@ -929,7 +929,7 @@ PciExpressOr32 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@@ -962,7 +962,7 @@ PciExpressAnd32 (
|
||||
If Address > 0x0FFFFFFF, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the result of the AND operation.
|
||||
@@ -999,7 +999,7 @@ PciExpressAndThenOr32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to read.
|
||||
@param Address The PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1038,12 +1038,12 @@ PciExpressBitFieldRead32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param Value New value of the bit field.
|
||||
@param Value The new value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@@ -1083,7 +1083,7 @@ PciExpressBitFieldWrite32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1128,7 +1128,7 @@ PciExpressBitFieldOr32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1175,7 +1175,7 @@ PciExpressBitFieldAnd32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address PCI configuration register to write.
|
||||
@param Address The PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1221,10 +1221,10 @@ PciExpressBitFieldAndThenOr32 (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress Starting address that encodes the PCI Bus, Device,
|
||||
@param StartAddress The starting address that encodes the PCI Bus, Device,
|
||||
Function and Register.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer receiving the data read.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer receiving the data read.
|
||||
|
||||
@return Size read data from StartAddress.
|
||||
|
||||
@@ -1321,10 +1321,10 @@ PciExpressReadBuffer (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress Starting address that encodes the PCI Bus, Device,
|
||||
@param StartAddress The starting address that encodes the PCI Bus, Device,
|
||||
Function and Register.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer containing the data to write.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer containing the data to write.
|
||||
|
||||
@return Size written to StartAddress.
|
||||
|
||||
|
Reference in New Issue
Block a user