MdeModulePkg PciBusDxe: The PCI Bus Driver is updated to support multiple PCI bus ranges for a PCI root bridge.
Signed-off-by: rsun3 Reviewed-by: vanjeff git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12600 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -158,10 +158,16 @@ PciRootBridgeEnumerator (
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{
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EFI_STATUS Status;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration1;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration2;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration3;
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UINT8 SubBusNumber;
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UINT8 StartBusNumber;
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UINT8 PaddedBusRange;
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EFI_HANDLE RootBridgeHandle;
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UINT8 Desc;
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UINT64 AddrLen;
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UINT64 AddrRangeMin;
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SubBusNumber = 0;
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StartBusNumber = 0;
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@@ -191,11 +197,40 @@ PciRootBridgeEnumerator (
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return Status;
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}
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if (Configuration == NULL || Configuration->Desc == ACPI_END_TAG_DESCRIPTOR) {
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return EFI_INVALID_PARAMETER;
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}
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RootBridgeDev->BusNumberRanges = Configuration;
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//
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// Sort the descriptors in ascending order
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//
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for (Configuration1 = Configuration; Configuration1->Desc != ACPI_END_TAG_DESCRIPTOR; Configuration1++) {
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Configuration2 = Configuration1;
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for (Configuration3 = Configuration1 + 1; Configuration3->Desc != ACPI_END_TAG_DESCRIPTOR; Configuration3++) {
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if (Configuration2->AddrRangeMin > Configuration3->AddrRangeMin) {
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Configuration2 = Configuration3;
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}
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}
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//
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// All other fields other than AddrRangeMin and AddrLen are ignored in a descriptor,
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// so only need to swap these two fields.
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//
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if (Configuration2 != Configuration1) {
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AddrRangeMin = Configuration1->AddrRangeMin;
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Configuration1->AddrRangeMin = Configuration2->AddrRangeMin;
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Configuration2->AddrRangeMin = AddrRangeMin;
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AddrLen = Configuration1->AddrLen;
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Configuration1->AddrLen = Configuration2->AddrLen;
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Configuration2->AddrLen = AddrLen;
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}
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}
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//
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// Get the bus number to start with
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//
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StartBusNumber = (UINT8) (Configuration->AddrRangeMin);
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PaddedBusRange = (UINT8) (Configuration->AddrRangeMax);
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//
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// Initialize the subordinate bus number
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@@ -215,7 +250,7 @@ PciRootBridgeEnumerator (
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//
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Status = PciScanBus (
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RootBridgeDev,
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(UINT8) (Configuration->AddrRangeMin),
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StartBusNumber,
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&SubBusNumber,
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&PaddedBusRange
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);
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@@ -228,24 +263,45 @@ PciRootBridgeEnumerator (
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//
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// Assign max bus number scanned
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//
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Configuration->AddrLen = SubBusNumber - StartBusNumber + 1 + PaddedBusRange;
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Status = PciAllocateBusNumber (RootBridgeDev, SubBusNumber, PaddedBusRange, &SubBusNumber);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Find the bus range which contains the higest bus number, then returns the number of buses
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// that should be decoded.
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//
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while (Configuration->AddrRangeMin + Configuration->AddrLen - 1 < SubBusNumber) {
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Configuration++;
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}
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AddrLen = Configuration->AddrLen;
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Configuration->AddrLen = SubBusNumber - Configuration->AddrRangeMin + 1;
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//
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// Save the Desc field of the next descriptor. Mark the next descriptor as an END descriptor.
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//
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Configuration++;
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Desc = Configuration->Desc;
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Configuration->Desc = ACPI_END_TAG_DESCRIPTOR;
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//
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// Set bus number
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//
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Status = PciResAlloc->SetBusNumbers (
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PciResAlloc,
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RootBridgeHandle,
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Configuration
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RootBridgeDev->BusNumberRanges
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);
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FreePool (Configuration);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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return EFI_SUCCESS;
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//
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// Restore changed fields
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//
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Configuration->Desc = Desc;
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(Configuration - 1)->AddrLen = AddrLen;
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return Status;
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}
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/**
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@@ -351,7 +407,11 @@ PciAssignBusNumber (
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//
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// Reserved one bus for cardbus bridge
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//
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SecondBus = ++(*SubBusNumber);
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Status = PciAllocateBusNumber (Bridge, *SubBusNumber, 1, SubBusNumber);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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SecondBus = *SubBusNumber;
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Register = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);
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