DynamicTablesPkg/AmlLib: Enumerate memory attributes
AmlCodeGenRdQWordMemory's and AmlCodeGenRdDWordMemory's Cacheable and MemoryRangeType parameters treat specific values as having specific meanings as defined by the spec. This change adds enums to map those meanings to their corresponding values. Signed-off-by: Jeshua Smith <jeshuas@nvidia.com> Acked-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
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@@ -566,7 +566,7 @@ GeneratePciCrs (
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IsPosDecode,
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TRUE,
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TRUE,
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TRUE,
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AmlMemoryCacheable,
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TRUE,
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0,
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AddrMapInfo->PciAddress,
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@@ -575,7 +575,7 @@ GeneratePciCrs (
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AddrMapInfo->AddressSize,
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0,
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NULL,
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0,
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AmlAddressRangeMemory,
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TRUE,
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CrsNode,
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NULL
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@@ -588,7 +588,7 @@ GeneratePciCrs (
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IsPosDecode,
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TRUE,
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TRUE,
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TRUE,
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AmlMemoryCacheable,
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TRUE,
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0,
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AddrMapInfo->PciAddress,
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@@ -597,7 +597,7 @@ GeneratePciCrs (
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AddrMapInfo->AddressSize,
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0,
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NULL,
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0,
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AmlAddressRangeMemory,
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TRUE,
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CrsNode,
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NULL
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@@ -718,7 +718,7 @@ ReserveEcamSpace (
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TRUE,
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TRUE,
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TRUE,
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FALSE, // non-cacheable
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AmlMemoryNonCacheable,
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TRUE,
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0,
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AddressMinimum,
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@@ -727,7 +727,7 @@ ReserveEcamSpace (
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AddressMaximum - AddressMinimum + 1,
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0,
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NULL,
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0,
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AmlAddressRangeMemory,
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TRUE,
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CrsNode,
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NULL
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