DynamicTablesPkg/AmlLib: Enumerate memory attributes

AmlCodeGenRdQWordMemory's and AmlCodeGenRdDWordMemory's Cacheable
and MemoryRangeType parameters treat specific values as having
specific meanings as defined by the spec. This change adds enums to map
those meanings to their corresponding values.

Signed-off-by: Jeshua Smith <jeshuas@nvidia.com>
Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
Jeshua Smith
2023-10-05 16:38:49 +00:00
committed by mergify[bot]
parent ec7f734366
commit 309450db26
4 changed files with 56 additions and 14 deletions

View File

@@ -566,7 +566,7 @@ GeneratePciCrs (
IsPosDecode,
TRUE,
TRUE,
TRUE,
AmlMemoryCacheable,
TRUE,
0,
AddrMapInfo->PciAddress,
@@ -575,7 +575,7 @@ GeneratePciCrs (
AddrMapInfo->AddressSize,
0,
NULL,
0,
AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL
@@ -588,7 +588,7 @@ GeneratePciCrs (
IsPosDecode,
TRUE,
TRUE,
TRUE,
AmlMemoryCacheable,
TRUE,
0,
AddrMapInfo->PciAddress,
@@ -597,7 +597,7 @@ GeneratePciCrs (
AddrMapInfo->AddressSize,
0,
NULL,
0,
AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL
@@ -718,7 +718,7 @@ ReserveEcamSpace (
TRUE,
TRUE,
TRUE,
FALSE, // non-cacheable
AmlMemoryNonCacheable,
TRUE,
0,
AddressMinimum,
@@ -727,7 +727,7 @@ ReserveEcamSpace (
AddressMaximum - AddressMinimum + 1,
0,
NULL,
0,
AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL