Check In tool source code based on Build tool project revision r1655.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8964 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
125
BaseTools/Source/C/Include/IndustryStandard/Acpi.h
Normal file
125
BaseTools/Source/C/Include/IndustryStandard/Acpi.h
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@@ -0,0 +1,125 @@
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/** @file
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This file contains some basic ACPI definitions that are consumed by drivers
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that do not care about ACPI versions.
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Copyright (c) 2006, Intel Corporation All rights reserved.
|
||||
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||||
This program and the accompanying materials are licensed and made available
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under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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File Name: Acpi.h
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**/
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#ifndef _ACPI_H_
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#define _ACPI_H_
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//
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// Common table header, this prefaces all ACPI tables, including FACS, but
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// excluding the RSD PTR structure
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//
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typedef struct {
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UINT32 Signature;
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UINT32 Length;
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} EFI_ACPI_COMMON_HEADER;
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//
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// Common ACPI description table header. This structure prefaces most ACPI tables.
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//
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#pragma pack(1)
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typedef struct {
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UINT32 Signature;
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UINT32 Length;
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UINT8 Revision;
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UINT8 Checksum;
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UINT8 OemId[6];
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UINT64 OemTableId;
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UINT32 OemRevision;
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UINT32 CreatorId;
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UINT32 CreatorRevision;
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} EFI_ACPI_DESCRIPTION_HEADER;
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#pragma pack()
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//
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// Define for Pci Host Bridge Resource Allocation
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//
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#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
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#define ACPI_END_TAG_DESCRIPTOR 0x79
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#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
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#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
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#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
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//
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// Power Management Timer frequency is fixed at 3.579545MHz
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//
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#define ACPI_TIMER_FREQUENCY 3579545
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//
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// Make sure structures match spec
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//
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#pragma pack(1)
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typedef struct {
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UINT8 Desc;
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UINT16 Len;
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UINT8 ResType;
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UINT8 GenFlag;
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UINT8 SpecificFlag;
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UINT64 AddrSpaceGranularity;
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UINT64 AddrRangeMin;
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UINT64 AddrRangeMax;
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UINT64 AddrTranslationOffset;
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UINT64 AddrLen;
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} EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;
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typedef struct {
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UINT8 Desc;
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UINT8 Checksum;
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} EFI_ACPI_END_TAG_DESCRIPTOR;
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//
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// General use definitions
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//
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#define EFI_ACPI_RESERVED_BYTE 0x00
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#define EFI_ACPI_RESERVED_WORD 0x0000
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#define EFI_ACPI_RESERVED_DWORD 0x00000000
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#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
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//
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// Resource Type Specific Flags
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// Ref ACPI specification 6.4.3.5.5
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//
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// Bit [0] : Write Status, _RW
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//
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)
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//
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// Bit [2:1] : Memory Attributes, _MEM
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//
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)
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//
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// Bit [4:3] : Memory Attributes, _MTP
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//
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)
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#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)
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//
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// Bit [5] : Memory to I/O Translation, _TTP
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//
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)
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#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)
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#pragma pack()
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#endif
|
292
BaseTools/Source/C/Include/IndustryStandard/Acpi1_0.h
Normal file
292
BaseTools/Source/C/Include/IndustryStandard/Acpi1_0.h
Normal file
@@ -0,0 +1,292 @@
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/** @file
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ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
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Copyright (c) 2006 - 2007 Intel Corporation. All rights reserved.
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This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
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||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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||||
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||||
File Name: Acpi1_0.h
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**/
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#ifndef _ACPI_1_0_H_
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#define _ACPI_1_0_H_
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#include "IndustryStandard/Acpi.h"
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//
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// Ensure proper structure formats
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//
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#pragma pack(1)
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//
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// ACPI 1.0b table structures
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//
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//
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// Root System Description Pointer Structure
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//
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typedef struct {
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UINT64 Signature;
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UINT8 Checksum;
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UINT8 OemId[6];
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UINT8 Reserved;
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UINT32 RsdtAddress;
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} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
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//
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// Root System Description Table
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// No definition needed as it is a common description table header followed by a
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// variable number of UINT32 table pointers.
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//
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//
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// RSDT Revision (as defined in ACPI 1.0b spec.)
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//
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#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
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//
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// Fixed ACPI Description Table Structure (FADT)
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//
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typedef struct {
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 FirmwareCtrl;
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UINT32 Dsdt;
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UINT8 IntModel;
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UINT8 Reserved1;
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UINT16 SciInt;
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UINT32 SmiCmd;
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UINT8 AcpiEnable;
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UINT8 AcpiDisable;
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UINT8 S4BiosReq;
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UINT8 Reserved2;
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UINT32 Pm1aEvtBlk;
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UINT32 Pm1bEvtBlk;
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UINT32 Pm1aCntBlk;
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UINT32 Pm1bCntBlk;
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UINT32 Pm2CntBlk;
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UINT32 PmTmrBlk;
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UINT32 Gpe0Blk;
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UINT32 Gpe1Blk;
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UINT8 Pm1EvtLen;
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UINT8 Pm1CntLen;
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UINT8 Pm2CntLen;
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UINT8 PmTmLen;
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UINT8 Gpe0BlkLen;
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UINT8 Gpe1BlkLen;
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||||
UINT8 Gpe1Base;
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UINT8 Reserved3;
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||||
UINT16 PLvl2Lat;
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||||
UINT16 PLvl3Lat;
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UINT16 FlushSize;
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||||
UINT16 FlushStride;
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||||
UINT8 DutyOffset;
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||||
UINT8 DutyWidth;
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||||
UINT8 DayAlrm;
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UINT8 MonAlrm;
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UINT8 Century;
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UINT8 Reserved4;
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UINT8 Reserved5;
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UINT8 Reserved6;
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UINT32 Flags;
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} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;
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//
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// FADT Version (as defined in ACPI 1.0b spec.)
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//
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#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01
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//
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// Fixed ACPI Description Table Fixed Feature Flags
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// All other bits are reserved and must be set to 0.
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//
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||||
#define EFI_ACPI_1_0_WBINVD (1 << 0)
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#define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)
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#define EFI_ACPI_1_0_PROC_C1 (1 << 2)
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#define EFI_ACPI_1_0_P_LVL2_UP (1 << 3)
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#define EFI_ACPI_1_0_PWR_BUTTON (1 << 4)
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#define EFI_ACPI_1_0_SLP_BUTTON (1 << 5)
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#define EFI_ACPI_1_0_FIX_RTC (1 << 6)
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#define EFI_ACPI_1_0_RTC_S4 (1 << 7)
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||||
#define EFI_ACPI_1_0_TMR_VAL_EXT (1 << 8)
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#define EFI_ACPI_1_0_DCK_CAP (1 << 9)
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||||
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||||
//
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||||
// Firmware ACPI Control Structure
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||||
//
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||||
typedef struct {
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||||
UINT32 Signature;
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UINT32 Length;
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UINT32 HardwareSignature;
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||||
UINT32 FirmwareWakingVector;
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||||
UINT32 GlobalLock;
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UINT32 Flags;
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UINT8 Reserved[40];
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||||
} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
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||||
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//
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// Firmware Control Structure Feature Flags
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// All other bits are reserved and must be set to 0.
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||||
//
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||||
#define EFI_ACPI_1_0_S4BIOS_F (1 << 0)
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||||
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||||
//
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||||
// Multiple APIC Description Table header definition. The rest of the table
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||||
// must be defined in a platform specific manner.
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||||
//
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||||
typedef struct {
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EFI_ACPI_DESCRIPTION_HEADER Header;
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||||
UINT32 LocalApicAddress;
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||||
UINT32 Flags;
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||||
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
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||||
|
||||
//
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||||
// MADT Revision (as defined in ACPI 1.0b spec.)
|
||||
//
|
||||
#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
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||||
|
||||
//
|
||||
// Multiple APIC Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
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||||
#define EFI_ACPI_1_0_PCAT_COMPAT (1 << 0)
|
||||
|
||||
//
|
||||
// Multiple APIC Description Table APIC structure types
|
||||
// All other values between 0x09 an 0xFF are reserved and
|
||||
// will be ignored by OSPM.
|
||||
//
|
||||
#define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00
|
||||
#define EFI_ACPI_1_0_IO_APIC 0x01
|
||||
#define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02
|
||||
#define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
|
||||
#define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04
|
||||
|
||||
//
|
||||
// APIC Structure Definitions
|
||||
//
|
||||
//
|
||||
// Processor Local APIC Structure Definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT8 ApicId;
|
||||
UINT32 Flags;
|
||||
} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC Flags. All other bits are reserved and must be 0.
|
||||
//
|
||||
#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)
|
||||
|
||||
//
|
||||
// IO APIC Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 IoApicId;
|
||||
UINT8 Reserved;
|
||||
UINT32 IoApicAddress;
|
||||
UINT32 SystemVectorBase;
|
||||
} EFI_ACPI_1_0_IO_APIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Interrupt Source Override Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 Bus;
|
||||
UINT8 Source;
|
||||
UINT32 GlobalSystemInterruptVector;
|
||||
UINT16 Flags;
|
||||
} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
|
||||
|
||||
//
|
||||
// Non-Maskable Interrupt Source Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Flags;
|
||||
UINT32 GlobalSystemInterruptVector;
|
||||
} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC NMI Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT16 Flags;
|
||||
UINT8 LocalApicInti;
|
||||
} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;
|
||||
|
||||
//
|
||||
// Smart Battery Description Table (SBST)
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 WarningEnergyLevel;
|
||||
UINT32 LowEnergyLevel;
|
||||
UINT32 CriticalEnergyLevel;
|
||||
} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;
|
||||
|
||||
//
|
||||
// Known table signatures
|
||||
//
|
||||
//
|
||||
// "RSD PTR " Root System Description Pointer
|
||||
//
|
||||
#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL
|
||||
|
||||
//
|
||||
// "APIC" Multiple APIC Description Table
|
||||
//
|
||||
#define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041
|
||||
|
||||
//
|
||||
// "DSDT" Differentiated System Description Table
|
||||
//
|
||||
#define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
|
||||
|
||||
//
|
||||
// "FACS" Firmware ACPI Control Structure
|
||||
//
|
||||
#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
|
||||
|
||||
//
|
||||
// "FACP" Fixed ACPI Description Table
|
||||
//
|
||||
#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
|
||||
|
||||
//
|
||||
// "PSDT" Persistent System Description Table
|
||||
//
|
||||
#define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
|
||||
|
||||
//
|
||||
// "RSDT" Root System Description Table
|
||||
//
|
||||
#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
|
||||
|
||||
//
|
||||
// "SBST" Smart Battery Specification Table
|
||||
//
|
||||
#define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
|
||||
|
||||
//
|
||||
// "SSDT" Secondary System Description Table
|
||||
//
|
||||
#define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
528
BaseTools/Source/C/Include/IndustryStandard/Acpi2_0.h
Normal file
528
BaseTools/Source/C/Include/IndustryStandard/Acpi2_0.h
Normal file
@@ -0,0 +1,528 @@
|
||||
/** @file
|
||||
ACPI 2.0 definitions from the ACPI Specification, revision 2.0
|
||||
|
||||
Copyright (c) 2006 - 2007 Intel Corporation. All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: Acpi2_0.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _ACPI_2_0_H_
|
||||
#define _ACPI_2_0_H_
|
||||
|
||||
#include "IndustryStandard/Acpi.h"
|
||||
|
||||
//
|
||||
// Ensure proper structure formats
|
||||
//
|
||||
#pragma pack(1)
|
||||
//
|
||||
// ACPI Specification Revision
|
||||
//
|
||||
#define EFI_ACPI_2_0_REVISION 0x02
|
||||
|
||||
//
|
||||
// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
|
||||
// and produced by a platform specific driver.
|
||||
//
|
||||
//
|
||||
// ACPI OEM ID
|
||||
//
|
||||
#define EFI_ACPI_2_0_OEM_ID "INTEL "
|
||||
#define EFI_ACPI_2_0_OEM_TABLE_ID 0x5034303738543245 // "E2T8704P"
|
||||
//
|
||||
// ACPI OEM Revision
|
||||
//
|
||||
#define EFI_ACPI_2_0_OEM_REVISION 0x00000002
|
||||
|
||||
//
|
||||
// ACPI table creator ID
|
||||
//
|
||||
#define EFI_ACPI_2_0_CREATOR_ID 0x5446534D // TBD "MSFT"
|
||||
//
|
||||
// ACPI table creator revision
|
||||
//
|
||||
#define EFI_ACPI_2_0_CREATOR_REVISION 0x01000013 // TBD
|
||||
//
|
||||
// ACPI 2.0 Generic Address Space definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 AddressSpaceId;
|
||||
UINT8 RegisterBitWidth;
|
||||
UINT8 RegisterBitOffset;
|
||||
UINT8 Reserved;
|
||||
UINT64 Address;
|
||||
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
|
||||
|
||||
//
|
||||
// Generic Address Space Address IDs
|
||||
//
|
||||
#define EFI_ACPI_2_0_SYSTEM_MEMORY 0
|
||||
#define EFI_ACPI_2_0_SYSTEM_IO 1
|
||||
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2
|
||||
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3
|
||||
#define EFI_ACPI_2_0_SMBUS 4
|
||||
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
|
||||
|
||||
//
|
||||
// ACPI 2.0 table structures
|
||||
//
|
||||
//
|
||||
// Root System Description Pointer Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT64 Signature;
|
||||
UINT8 Checksum;
|
||||
UINT8 OemId[6];
|
||||
UINT8 Revision;
|
||||
UINT32 RsdtAddress;
|
||||
UINT32 Length;
|
||||
UINT64 XsdtAddress;
|
||||
UINT8 ExtendedChecksum;
|
||||
UINT8 Reserved[3];
|
||||
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
|
||||
|
||||
//
|
||||
// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
|
||||
|
||||
//
|
||||
// Common table header, this prefaces all ACPI tables, including FACS, but
|
||||
// excluding the RSD PTR structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT32 Signature;
|
||||
UINT32 Length;
|
||||
} EFI_ACPI_2_0_COMMON_HEADER;
|
||||
|
||||
//
|
||||
// Root System Description Table
|
||||
// No definition needed as it is a common description table header followed by a
|
||||
// variable number of UINT32 table pointers.
|
||||
//
|
||||
//
|
||||
// RSDT Revision (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Extended System Description Table
|
||||
// No definition needed as it is a common description table header followed by a
|
||||
// variable number of UINT64 table pointers.
|
||||
//
|
||||
//
|
||||
// XSDT Revision (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Fixed ACPI Description Table Structure (FADT)
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 FirmwareCtrl;
|
||||
UINT32 Dsdt;
|
||||
UINT8 Reserved0;
|
||||
UINT8 PreferredPmProfile;
|
||||
UINT16 SciInt;
|
||||
UINT32 SmiCmd;
|
||||
UINT8 AcpiEnable;
|
||||
UINT8 AcpiDisable;
|
||||
UINT8 S4BiosReq;
|
||||
UINT8 PstateCnt;
|
||||
UINT32 Pm1aEvtBlk;
|
||||
UINT32 Pm1bEvtBlk;
|
||||
UINT32 Pm1aCntBlk;
|
||||
UINT32 Pm1bCntBlk;
|
||||
UINT32 Pm2CntBlk;
|
||||
UINT32 PmTmrBlk;
|
||||
UINT32 Gpe0Blk;
|
||||
UINT32 Gpe1Blk;
|
||||
UINT8 Pm1EvtLen;
|
||||
UINT8 Pm1CntLen;
|
||||
UINT8 Pm2CntLen;
|
||||
UINT8 PmTmrLen;
|
||||
UINT8 Gpe0BlkLen;
|
||||
UINT8 Gpe1BlkLen;
|
||||
UINT8 Gpe1Base;
|
||||
UINT8 CstCnt;
|
||||
UINT16 PLvl2Lat;
|
||||
UINT16 PLvl3Lat;
|
||||
UINT16 FlushSize;
|
||||
UINT16 FlushStride;
|
||||
UINT8 DutyOffset;
|
||||
UINT8 DutyWidth;
|
||||
UINT8 DayAlrm;
|
||||
UINT8 MonAlrm;
|
||||
UINT8 Century;
|
||||
UINT16 IaPcBootArch;
|
||||
UINT8 Reserved1;
|
||||
UINT32 Flags;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
|
||||
UINT8 ResetValue;
|
||||
UINT8 Reserved2[3];
|
||||
UINT64 XFirmwareCtrl;
|
||||
UINT64 XDsdt;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
|
||||
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
|
||||
|
||||
//
|
||||
// FADT Version (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03
|
||||
|
||||
//
|
||||
// Fixed ACPI Description Table Boot Architecture Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)
|
||||
#define EFI_ACPI_2_0_8042 (1 << 1)
|
||||
|
||||
//
|
||||
// Fixed ACPI Description Table Fixed Feature Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_2_0_WBINVD (1 << 0)
|
||||
#define EFI_ACPI_2_0_WBINVD_FLUSH (1 << 1)
|
||||
#define EFI_ACPI_2_0_PROC_C1 (1 << 2)
|
||||
#define EFI_ACPI_2_0_P_LVL2_UP (1 << 3)
|
||||
#define EFI_ACPI_2_0_PWR_BUTTON (1 << 4)
|
||||
#define EFI_ACPI_2_0_SLP_BUTTON (1 << 5)
|
||||
#define EFI_ACPI_2_0_FIX_RTC (1 << 6)
|
||||
#define EFI_ACPI_2_0_RTC_S4 (1 << 7)
|
||||
#define EFI_ACPI_2_0_TMR_VAL_EXT (1 << 8)
|
||||
#define EFI_ACPI_2_0_DCK_CAP (1 << 9)
|
||||
#define EFI_ACPI_2_0_RESET_REG_SUP (1 << 10)
|
||||
#define EFI_ACPI_2_0_SEALED_CASE (1 << 11)
|
||||
#define EFI_ACPI_2_0_HEADLESS (1 << 12)
|
||||
#define EFI_ACPI_2_0_CPU_SW_SLP (1 << 13)
|
||||
|
||||
//
|
||||
// Firmware ACPI Control Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT32 Signature;
|
||||
UINT32 Length;
|
||||
UINT32 HardwareSignature;
|
||||
UINT32 FirmwareWakingVector;
|
||||
UINT32 GlobalLock;
|
||||
UINT32 Flags;
|
||||
UINT64 XFirmwareWakingVector;
|
||||
UINT8 Version;
|
||||
UINT8 Reserved[31];
|
||||
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
|
||||
|
||||
//
|
||||
// FACS Version (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
|
||||
|
||||
//
|
||||
// Firmware Control Structure Feature Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)
|
||||
|
||||
//
|
||||
// Multiple APIC Description Table header definition. The rest of the table
|
||||
// must be defined in a platform specific manner.
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 LocalApicAddress;
|
||||
UINT32 Flags;
|
||||
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
|
||||
|
||||
//
|
||||
// MADT Revision (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Multiple APIC Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_2_0_PCAT_COMPAT (1 << 0)
|
||||
|
||||
//
|
||||
// Multiple APIC Description Table APIC structure types
|
||||
// All other values between 0x09 an 0xFF are reserved and
|
||||
// will be ignored by OSPM.
|
||||
//
|
||||
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00
|
||||
#define EFI_ACPI_2_0_IO_APIC 0x01
|
||||
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02
|
||||
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
|
||||
#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04
|
||||
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
|
||||
#define EFI_ACPI_2_0_IO_SAPIC 0x06
|
||||
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07
|
||||
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08
|
||||
|
||||
//
|
||||
// APIC Structure Definitions
|
||||
//
|
||||
//
|
||||
// Processor Local APIC Structure Definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT8 ApicId;
|
||||
UINT32 Flags;
|
||||
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC Flags. All other bits are reserved and must be 0.
|
||||
//
|
||||
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)
|
||||
|
||||
//
|
||||
// IO APIC Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 IoApicId;
|
||||
UINT8 Reserved;
|
||||
UINT32 IoApicAddress;
|
||||
UINT32 GlobalSystemInterruptBase;
|
||||
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Interrupt Source Override Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 Bus;
|
||||
UINT8 Source;
|
||||
UINT32 GlobalSystemInterrupt;
|
||||
UINT16 Flags;
|
||||
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
|
||||
|
||||
//
|
||||
// Non-Maskable Interrupt Source Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Flags;
|
||||
UINT32 GlobalSystemInterrupt;
|
||||
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC NMI Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT16 Flags;
|
||||
UINT8 LocalApicLint;
|
||||
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC Address Override Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Reserved;
|
||||
UINT64 LocalApicAddress;
|
||||
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
|
||||
|
||||
//
|
||||
// IO SAPIC Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 IoApicId;
|
||||
UINT8 Reserved;
|
||||
UINT32 GlobalSystemInterruptBase;
|
||||
UINT64 IoSapicAddress;
|
||||
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local SAPIC Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT8 LocalSapicId;
|
||||
UINT8 LocalSapicEid;
|
||||
UINT8 Reserved[3];
|
||||
UINT32 Flags;
|
||||
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Platform Interrupt Sources Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Flags;
|
||||
UINT8 InterruptType;
|
||||
UINT8 ProcessorId;
|
||||
UINT8 ProcessorEid;
|
||||
UINT8 IoSapicVector;
|
||||
UINT32 GlobalSystemInterrupt;
|
||||
UINT32 Reserved;
|
||||
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
|
||||
|
||||
//
|
||||
// Smart Battery Description Table (SBST)
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 WarningEnergyLevel;
|
||||
UINT32 LowEnergyLevel;
|
||||
UINT32 CriticalEnergyLevel;
|
||||
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
|
||||
|
||||
//
|
||||
// SBST Version (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Embedded Controller Boot Resources Table (ECDT)
|
||||
// The table is followed by a null terminated ASCII string that contains
|
||||
// a fully qualified reference to the name space object.
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
|
||||
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
|
||||
UINT32 Uid;
|
||||
UINT8 GpeBit;
|
||||
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
|
||||
|
||||
//
|
||||
// ECDT Version (as defined in ACPI 2.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Known table signatures
|
||||
//
|
||||
//
|
||||
// "RSD PTR " Root System Description Pointer
|
||||
//
|
||||
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352
|
||||
|
||||
//
|
||||
// "SPIC" Multiple SAPIC Description Table
|
||||
//
|
||||
// BUGBUG: Don't know where this came from except SR870BN4 uses it.
|
||||
// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
|
||||
//
|
||||
#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
|
||||
|
||||
//
|
||||
// "BOOT" MS Simple Boot Spec
|
||||
//
|
||||
#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
|
||||
|
||||
//
|
||||
// "DBGP" MS Bebug Port Spec
|
||||
//
|
||||
#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
|
||||
|
||||
//
|
||||
// "DSDT" Differentiated System Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
|
||||
|
||||
//
|
||||
// "ECDT" Embedded Controller Boot Resources Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
|
||||
|
||||
//
|
||||
// "ETDT" Event Timer Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445
|
||||
|
||||
//
|
||||
// "FACS" Firmware ACPI Control Structure
|
||||
//
|
||||
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
|
||||
|
||||
//
|
||||
// "FACP" Fixed ACPI Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
|
||||
|
||||
//
|
||||
// "APIC" Multiple APIC Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
|
||||
|
||||
//
|
||||
// "PSDT" Persistent System Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
|
||||
|
||||
//
|
||||
// "RSDT" Root System Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
|
||||
|
||||
//
|
||||
// "SBST" Smart Battery Specification Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
|
||||
|
||||
//
|
||||
// "SLIT" System Locality Information Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53
|
||||
|
||||
//
|
||||
// "SPCR" Serial Port Concole Redirection Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053
|
||||
|
||||
//
|
||||
// "SRAT" Static Resource Affinity Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
|
||||
|
||||
//
|
||||
// "SSDT" Secondary System Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
|
||||
|
||||
//
|
||||
// "SPMI" Server Platform Management Interface Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053
|
||||
|
||||
//
|
||||
// "XSDT" Extended System Description Table
|
||||
//
|
||||
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
676
BaseTools/Source/C/Include/IndustryStandard/Acpi3_0.h
Normal file
676
BaseTools/Source/C/Include/IndustryStandard/Acpi3_0.h
Normal file
@@ -0,0 +1,676 @@
|
||||
/** @file
|
||||
ACPI 3.0 definitions from the ACPI Specification Revision 3.0 September 2, 2004
|
||||
|
||||
Copyright (c) 2006 - 2007 Intel Corporation. All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: Acpi3_0.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _ACPI_3_0_H_
|
||||
#define _ACPI_3_0_H_
|
||||
|
||||
#include "IndustryStandard/Acpi.h"
|
||||
|
||||
//
|
||||
// Ensure proper structure formats
|
||||
//
|
||||
#pragma pack(1)
|
||||
//
|
||||
// ACPI Specification Revision
|
||||
//
|
||||
#define EFI_ACPI_3_0_REVISION 0x03 // BUGBUG: Not in spec yet.
|
||||
//
|
||||
// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
|
||||
// and produced by a platform specific driver.
|
||||
//
|
||||
//
|
||||
// ACPI 3.0 Generic Address Space definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 AddressSpaceId;
|
||||
UINT8 RegisterBitWidth;
|
||||
UINT8 RegisterBitOffset;
|
||||
UINT8 AccessSize;
|
||||
UINT64 Address;
|
||||
} EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE;
|
||||
|
||||
//
|
||||
// Generic Address Space Address IDs
|
||||
//
|
||||
#define EFI_ACPI_3_0_SYSTEM_MEMORY 0
|
||||
#define EFI_ACPI_3_0_SYSTEM_IO 1
|
||||
#define EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE 2
|
||||
#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER 3
|
||||
#define EFI_ACPI_3_0_SMBUS 4
|
||||
#define EFI_ACPI_3_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
|
||||
|
||||
//
|
||||
// Generic Address Space Access Sizes
|
||||
//
|
||||
#define EFI_ACPI_3_0_UNDEFINED 0
|
||||
#define EFI_ACPI_3_0_BYTE 1
|
||||
#define EFI_ACPI_3_0_WORD 2
|
||||
#define EFI_ACPI_3_0_DWORD 3
|
||||
#define EFI_ACPI_3_0_QWORD 4
|
||||
|
||||
//
|
||||
// ACPI 3.0 table structures
|
||||
//
|
||||
//
|
||||
// Root System Description Pointer Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT64 Signature;
|
||||
UINT8 Checksum;
|
||||
UINT8 OemId[6];
|
||||
UINT8 Revision;
|
||||
UINT32 RsdtAddress;
|
||||
UINT32 Length;
|
||||
UINT64 XsdtAddress;
|
||||
UINT8 ExtendedChecksum;
|
||||
UINT8 Reserved[3];
|
||||
} EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
|
||||
|
||||
//
|
||||
// RSD_PTR Revision (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 // ACPISpec30 (Revision 3.0 September 2, 2004) says current value is 2
|
||||
//
|
||||
// Common table header, this prefaces all ACPI tables, including FACS, but
|
||||
// excluding the RSD PTR structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT32 Signature;
|
||||
UINT32 Length;
|
||||
} EFI_ACPI_3_0_COMMON_HEADER;
|
||||
|
||||
//
|
||||
// Root System Description Table
|
||||
// No definition needed as it is a common description table header followed by a
|
||||
// variable number of UINT32 table pointers.
|
||||
//
|
||||
//
|
||||
// RSDT Revision (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Extended System Description Table
|
||||
// No definition needed as it is a common description table header followed by a
|
||||
// variable number of UINT64 table pointers.
|
||||
//
|
||||
//
|
||||
// XSDT Revision (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Fixed ACPI Description Table Structure (FADT)
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 FirmwareCtrl;
|
||||
UINT32 Dsdt;
|
||||
UINT8 Reserved0;
|
||||
UINT8 PreferredPmProfile;
|
||||
UINT16 SciInt;
|
||||
UINT32 SmiCmd;
|
||||
UINT8 AcpiEnable;
|
||||
UINT8 AcpiDisable;
|
||||
UINT8 S4BiosReq;
|
||||
UINT8 PstateCnt;
|
||||
UINT32 Pm1aEvtBlk;
|
||||
UINT32 Pm1bEvtBlk;
|
||||
UINT32 Pm1aCntBlk;
|
||||
UINT32 Pm1bCntBlk;
|
||||
UINT32 Pm2CntBlk;
|
||||
UINT32 PmTmrBlk;
|
||||
UINT32 Gpe0Blk;
|
||||
UINT32 Gpe1Blk;
|
||||
UINT8 Pm1EvtLen;
|
||||
UINT8 Pm1CntLen;
|
||||
UINT8 Pm2CntLen;
|
||||
UINT8 PmTmrLen;
|
||||
UINT8 Gpe0BlkLen;
|
||||
UINT8 Gpe1BlkLen;
|
||||
UINT8 Gpe1Base;
|
||||
UINT8 CstCnt;
|
||||
UINT16 PLvl2Lat;
|
||||
UINT16 PLvl3Lat;
|
||||
UINT16 FlushSize;
|
||||
UINT16 FlushStride;
|
||||
UINT8 DutyOffset;
|
||||
UINT8 DutyWidth;
|
||||
UINT8 DayAlrm;
|
||||
UINT8 MonAlrm;
|
||||
UINT8 Century;
|
||||
UINT16 IaPcBootArch;
|
||||
UINT8 Reserved1;
|
||||
UINT32 Flags;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
|
||||
UINT8 ResetValue;
|
||||
UINT8 Reserved2[3];
|
||||
UINT64 XFirmwareCtrl;
|
||||
UINT64 XDsdt;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
|
||||
} EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE;
|
||||
|
||||
//
|
||||
// FADT Version (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x04
|
||||
|
||||
//
|
||||
// Fixed ACPI Description Table Preferred Power Management Profile
|
||||
//
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_UNSPECIFIED 0
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_DESKTOP 1
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_MOBILE 2
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_WORKSTATION 3
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_ENTERPRISE_SERVER 4
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_SOHO_SERVER 5
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_APPLIANCE_PC 6
|
||||
#define EFI_ACPI_3_0_PM_PROFILE_PERFORMANCE_SERVER 7
|
||||
|
||||
//
|
||||
// Fixed ACPI Description Table Boot Architecture Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_LEGACY_DEVICES (1 << 0)
|
||||
#define EFI_ACPI_3_0_8042 (1 << 1)
|
||||
#define EFI_ACPI_3_0_VGA_NOT_PRESENT (1 << 2)
|
||||
#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED (1 << 3)
|
||||
//
|
||||
// Fixed ACPI Description Table Fixed Feature Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_WBINVD (1 << 0)
|
||||
#define EFI_ACPI_3_0_WBINVD_FLUSH (1 << 1)
|
||||
#define EFI_ACPI_3_0_PROC_C1 (1 << 2)
|
||||
#define EFI_ACPI_3_0_P_LVL2_UP (1 << 3)
|
||||
#define EFI_ACPI_3_0_PWR_BUTTON (1 << 4)
|
||||
#define EFI_ACPI_3_0_SLP_BUTTON (1 << 5)
|
||||
#define EFI_ACPI_3_0_FIX_RTC (1 << 6)
|
||||
#define EFI_ACPI_3_0_RTC_S4 (1 << 7)
|
||||
#define EFI_ACPI_3_0_TMR_VAL_EXT (1 << 8)
|
||||
#define EFI_ACPI_3_0_DCK_CAP (1 << 9)
|
||||
#define EFI_ACPI_3_0_RESET_REG_SUP (1 << 10)
|
||||
#define EFI_ACPI_3_0_SEALED_CASE (1 << 11)
|
||||
#define EFI_ACPI_3_0_HEADLESS (1 << 12)
|
||||
#define EFI_ACPI_3_0_CPU_SW_SLP (1 << 13)
|
||||
#define EFI_ACPI_3_0_PCI_EXP_WAK (1 << 14)
|
||||
#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK (1 << 15)
|
||||
#define EFI_ACPI_3_0_S4_RTC_STS_VALID (1 << 16)
|
||||
#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE (1 << 17)
|
||||
#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL (1 << 18)
|
||||
#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE (1 << 19)
|
||||
|
||||
//
|
||||
// Firmware ACPI Control Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT32 Signature;
|
||||
UINT32 Length;
|
||||
UINT32 HardwareSignature;
|
||||
UINT32 FirmwareWakingVector;
|
||||
UINT32 GlobalLock;
|
||||
UINT32 Flags;
|
||||
UINT64 XFirmwareWakingVector;
|
||||
UINT8 Version;
|
||||
UINT8 Reserved[31];
|
||||
} EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
|
||||
|
||||
//
|
||||
// FACS Version (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
|
||||
|
||||
//
|
||||
// Firmware Control Structure Feature Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_S4BIOS_F (1 << 0)
|
||||
|
||||
//
|
||||
// Differentiated System Description Table,
|
||||
// Secondary System Description Table
|
||||
// and Persistent System Description Table,
|
||||
// no definition needed as they are common description table header followed by a
|
||||
// definition block.
|
||||
//
|
||||
#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
|
||||
#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
|
||||
|
||||
//
|
||||
// Multiple APIC Description Table header definition. The rest of the table
|
||||
// must be defined in a platform specific manner.
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 LocalApicAddress;
|
||||
UINT32 Flags;
|
||||
} EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
|
||||
|
||||
//
|
||||
// MADT Revision (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
|
||||
|
||||
//
|
||||
// Multiple APIC Flags
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_PCAT_COMPAT (1 << 0)
|
||||
|
||||
//
|
||||
// Multiple APIC Description Table APIC structure types
|
||||
// All other values between 0x09 an 0xFF are reserved and
|
||||
// will be ignored by OSPM.
|
||||
//
|
||||
#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC 0x00
|
||||
#define EFI_ACPI_3_0_IO_APIC 0x01
|
||||
#define EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE 0x02
|
||||
#define EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
|
||||
#define EFI_ACPI_3_0_LOCAL_APIC_NMI 0x04
|
||||
#define EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
|
||||
#define EFI_ACPI_3_0_IO_SAPIC 0x06
|
||||
#define EFI_ACPI_3_0_LOCAL_SAPIC 0x07
|
||||
#define EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES 0x08
|
||||
|
||||
//
|
||||
// APIC Structure Definitions
|
||||
//
|
||||
//
|
||||
// Processor Local APIC Structure Definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT8 ApicId;
|
||||
UINT32 Flags;
|
||||
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC Flags. All other bits are reserved and must be 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED (1 << 0)
|
||||
|
||||
//
|
||||
// IO APIC Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 IoApicId;
|
||||
UINT8 Reserved;
|
||||
UINT32 IoApicAddress;
|
||||
UINT32 GlobalSystemInterruptBase;
|
||||
} EFI_ACPI_3_0_IO_APIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Interrupt Source Override Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 Bus;
|
||||
UINT8 Source;
|
||||
UINT32 GlobalSystemInterrupt;
|
||||
UINT16 Flags;
|
||||
} EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
|
||||
|
||||
//
|
||||
// Platform Interrupt Sources Structure Definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Flags;
|
||||
UINT8 InterruptType;
|
||||
UINT8 ProcessorId;
|
||||
UINT8 ProcessorEid;
|
||||
UINT8 IoSapicVector;
|
||||
UINT32 GlobalSystemInterrupt;
|
||||
UINT32 PlatformInterruptSourceFlags;
|
||||
UINT8 CpeiProcessorOverride;
|
||||
UINT8 Reserved[31];
|
||||
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// MPS INTI flags.
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_POLARITY (3 << 0)
|
||||
#define EFI_ACPI_3_0_TRIGGER_MODE (3 << 2)
|
||||
|
||||
//
|
||||
// Non-Maskable Interrupt Source Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Flags;
|
||||
UINT32 GlobalSystemInterrupt;
|
||||
} EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC NMI Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT16 Flags;
|
||||
UINT8 LocalApicLint;
|
||||
} EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC Address Override Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Reserved;
|
||||
UINT64 LocalApicAddress;
|
||||
} EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
|
||||
|
||||
//
|
||||
// IO SAPIC Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 IoApicId;
|
||||
UINT8 Reserved;
|
||||
UINT32 GlobalSystemInterruptBase;
|
||||
UINT64 IoSapicAddress;
|
||||
} EFI_ACPI_3_0_IO_SAPIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local SAPIC Structure
|
||||
// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 AcpiProcessorId;
|
||||
UINT8 LocalSapicId;
|
||||
UINT8 LocalSapicEid;
|
||||
UINT8 Reserved[3];
|
||||
UINT32 Flags;
|
||||
UINT32 ACPIProcessorUIDValue;
|
||||
} EFI_ACPI_3_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
|
||||
|
||||
//
|
||||
// Platform Interrupt Sources Structure
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT16 Flags;
|
||||
UINT8 InterruptType;
|
||||
UINT8 ProcessorId;
|
||||
UINT8 ProcessorEid;
|
||||
UINT8 IoSapicVector;
|
||||
UINT32 GlobalSystemInterrupt;
|
||||
UINT32 PlatformInterruptSourceFlags;
|
||||
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
|
||||
|
||||
//
|
||||
// Platform Interrupt Source Flags.
|
||||
// All other bits are reserved and must be set to 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE (1 << 0)
|
||||
|
||||
//
|
||||
// Smart Battery Description Table (SBST)
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 WarningEnergyLevel;
|
||||
UINT32 LowEnergyLevel;
|
||||
UINT32 CriticalEnergyLevel;
|
||||
} EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE;
|
||||
|
||||
//
|
||||
// SBST Version (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Embedded Controller Boot Resources Table (ECDT)
|
||||
// The table is followed by a null terminated ASCII string that contains
|
||||
// a fully qualified reference to the name space object.
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcControl;
|
||||
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcData;
|
||||
UINT32 Uid;
|
||||
UINT8 GpeBit;
|
||||
} EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
|
||||
|
||||
//
|
||||
// ECDT Version (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// System Resource Affinity Table (SRAT. The rest of the table
|
||||
// must be defined in a platform specific manner.
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT32 Reserved1; // Must be set to 1
|
||||
UINT64 Reserved2;
|
||||
} EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
|
||||
|
||||
//
|
||||
// SRAT Version (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x02
|
||||
|
||||
//
|
||||
// SRAT structure types.
|
||||
// All other values between 0x02 an 0xFF are reserved and
|
||||
// will be ignored by OSPM.
|
||||
//
|
||||
#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
|
||||
#define EFI_ACPI_3_0_MEMORY_AFFINITY 0x01
|
||||
|
||||
//
|
||||
// Processor Local APIC/SAPIC Affinity Structure Definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT8 ProximityDomain7To0;
|
||||
UINT8 ApicId;
|
||||
UINT32 Flags;
|
||||
UINT8 LocalSapicEid;
|
||||
UINT8 ProximityDomain31To8[3];
|
||||
UINT8 Reserved[4];
|
||||
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
|
||||
|
||||
//
|
||||
// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
|
||||
|
||||
//
|
||||
// Memory Affinity Structure Definition
|
||||
//
|
||||
typedef struct {
|
||||
UINT8 Type;
|
||||
UINT8 Length;
|
||||
UINT32 ProximityDomain;
|
||||
UINT16 Reserved1;
|
||||
UINT32 AddressBaseLow;
|
||||
UINT32 AddressBaseHigh;
|
||||
UINT32 LengthLow;
|
||||
UINT32 LengthHigh;
|
||||
UINT32 Reserved2;
|
||||
UINT32 Flags;
|
||||
UINT64 Reserved3;
|
||||
} EFI_ACPI_3_0_MEMORY_AFFINITY_STRUCTURE;
|
||||
|
||||
//
|
||||
// Memory Flags. All other bits are reserved and must be 0.
|
||||
//
|
||||
#define EFI_ACPI_3_0_MEMORY_ENABLED (1 << 0)
|
||||
#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
|
||||
#define EFI_ACPI_3_0_MEMORY_NONVOLATILE (1 << 2)
|
||||
|
||||
//
|
||||
// System Locality Distance Information Table (SLIT).
|
||||
// The rest of the table is a matrix.
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_DESCRIPTION_HEADER Header;
|
||||
UINT64 NumberOfSystemLocalities;
|
||||
} EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
|
||||
|
||||
//
|
||||
// SLIT Version (as defined in ACPI 3.0 spec.)
|
||||
//
|
||||
#define EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
|
||||
|
||||
//
|
||||
// Known table signatures
|
||||
//
|
||||
//
|
||||
// "RSD PTR " Root System Description Pointer
|
||||
//
|
||||
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL
|
||||
|
||||
//
|
||||
// "APIC" Multiple APIC Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
|
||||
|
||||
//
|
||||
// "DSDT" Differentiated System Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
|
||||
|
||||
//
|
||||
// "ECDT" Embedded Controller Boot Resources Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
|
||||
|
||||
//
|
||||
// "FACP" Fixed ACPI Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
|
||||
|
||||
//
|
||||
// "FACS" Firmware ACPI Control Structure
|
||||
//
|
||||
#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
|
||||
|
||||
//
|
||||
// "PSDT" Persistent System Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
|
||||
|
||||
//
|
||||
// "RSDT" Root System Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
|
||||
|
||||
//
|
||||
// "SBST" Smart Battery Specification Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
|
||||
|
||||
//
|
||||
// "SLIT" System Locality Information Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53
|
||||
|
||||
//
|
||||
// "SRAT" System Resource Affinity Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
|
||||
|
||||
//
|
||||
// "SSDT" Secondary System Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
|
||||
|
||||
//
|
||||
// "XSDT" Extended System Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358
|
||||
|
||||
//
|
||||
// "BOOT" MS Simple Boot Spec
|
||||
//
|
||||
#define EFI_ACPI_3_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
|
||||
|
||||
//
|
||||
// "CPEP" Corrected Platform Error Polling Table
|
||||
// See
|
||||
//
|
||||
#define EFI_ACPI_3_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE 0x50455043
|
||||
|
||||
//
|
||||
// "DBGP" MS Debug Port Spec
|
||||
//
|
||||
#define EFI_ACPI_3_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
|
||||
|
||||
//
|
||||
// "ETDT" Event Timer Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445
|
||||
|
||||
//
|
||||
// "HPET" IA-PC High Precision Event Timer Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE 0x54455048
|
||||
|
||||
//
|
||||
// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE 0x4746434D
|
||||
|
||||
//
|
||||
// "SPCR" Serial Port Concole Redirection Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053
|
||||
|
||||
//
|
||||
// "SPMI" Server Platform Management Interface Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE 0x494D5053
|
||||
|
||||
//
|
||||
// "TCPA" Trusted Computing Platform Alliance Capabilities Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE 0x41504354
|
||||
|
||||
//
|
||||
// "WDRT" Watchdog Resource Table
|
||||
//
|
||||
#define EFI_ACPI_3_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE 0x54524457
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
59
BaseTools/Source/C/Include/IndustryStandard/EfiPci.h
Normal file
59
BaseTools/Source/C/Include/IndustryStandard/EfiPci.h
Normal file
@@ -0,0 +1,59 @@
|
||||
/** @file
|
||||
Support for EFI PCI specification.
|
||||
|
||||
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: EfiPci.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _EFI_PCI_H_
|
||||
#define _EFI_PCI_H_
|
||||
|
||||
//#include "pci22.h"
|
||||
//#include "pci23.h"
|
||||
//#include "pci30.h"
|
||||
|
||||
#pragma pack(push, 1)
|
||||
|
||||
typedef struct {
|
||||
UINT8 Register;
|
||||
UINT8 Function;
|
||||
UINT8 Device;
|
||||
UINT8 Bus;
|
||||
UINT8 Reserved[4];
|
||||
} DEFIO_PCI_ADDR;
|
||||
|
||||
#define EFI_ROOT_BRIDGE_LIST 'eprb'
|
||||
#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE 0x0EF1
|
||||
|
||||
typedef struct {
|
||||
UINT16 Signature; // 0xaa55
|
||||
UINT16 InitializationSize;
|
||||
UINT32 EfiSignature; // 0x0EF1
|
||||
UINT16 EfiSubsystem;
|
||||
UINT16 EfiMachineType;
|
||||
UINT16 CompressionType;
|
||||
UINT8 Reserved[8];
|
||||
UINT16 EfiImageHeaderOffset;
|
||||
UINT16 PcirOffset;
|
||||
} EFI_PCI_EXPANSION_ROM_HEADER;
|
||||
|
||||
typedef union {
|
||||
UINT8 *Raw;
|
||||
PCI_EXPANSION_ROM_HEADER *Generic;
|
||||
EFI_PCI_EXPANSION_ROM_HEADER *Efi;
|
||||
EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt;
|
||||
} EFI_PCI_ROM_HEADER;
|
||||
|
||||
#pragma pack(pop)
|
||||
|
||||
#endif
|
@@ -0,0 +1,47 @@
|
||||
/** @file
|
||||
ACPI memory mapped configuration space access table definition, defined at
|
||||
in the PCI Firmware Specification, version 3.0 draft version 0.5.
|
||||
Specification is available at http://www.pcisig.com.
|
||||
|
||||
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: MemoryMappedConfigurationSpaceAccessTable.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_H_
|
||||
#define _MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_H_
|
||||
|
||||
//
|
||||
// Ensure proper structure formats
|
||||
//
|
||||
#pragma pack(1)
|
||||
//
|
||||
// Memory Mapped Configuration Space Access Table (MCFG)
|
||||
// This table is a basic description table header followed by
|
||||
// a number of base address allocation structures.
|
||||
//
|
||||
typedef struct {
|
||||
UINT64 BaseAddress;
|
||||
UINT16 PciSegmentGroupNumber;
|
||||
UINT8 StartBusNumber;
|
||||
UINT8 EndBusNumber;
|
||||
UINT32 Reserved;
|
||||
} EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE;
|
||||
|
||||
//
|
||||
// MCFG Revision (defined in spec)
|
||||
//
|
||||
#define EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION 0x01
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
699
BaseTools/Source/C/Include/IndustryStandard/PeImage.h
Normal file
699
BaseTools/Source/C/Include/IndustryStandard/PeImage.h
Normal file
@@ -0,0 +1,699 @@
|
||||
/** @file
|
||||
EFI image format for PE32+. Please note some data structures are different
|
||||
for IA-32 and Itanium-based images, look for UINTN and the #ifdef EFI_IA64
|
||||
|
||||
@bug Fix text - doc as defined in MSFT EFI specification.
|
||||
|
||||
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: PeImage.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef __PE_IMAGE_H__
|
||||
#define __PE_IMAGE_H__
|
||||
|
||||
//
|
||||
// PE32+ Subsystem type for EFI images
|
||||
//
|
||||
#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION 10
|
||||
#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
|
||||
#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12
|
||||
#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13
|
||||
|
||||
//
|
||||
// BugBug: Need to get a real answer for this problem. This is not in the
|
||||
// PE specification.
|
||||
//
|
||||
// A SAL runtime driver does not get fixed up when a transition to
|
||||
// virtual mode is made. In all other cases it should be treated
|
||||
// like a EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER image
|
||||
//
|
||||
#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13
|
||||
|
||||
//
|
||||
// PE32+ Machine type for EFI images
|
||||
//
|
||||
#define IMAGE_FILE_MACHINE_I386 0x014c
|
||||
#define IMAGE_FILE_MACHINE_IA64 0x0200
|
||||
#define IMAGE_FILE_MACHINE_EBC 0x0EBC
|
||||
#define IMAGE_FILE_MACHINE_X64 0x8664
|
||||
#define IMAGE_FILE_MACHINE_ARM 0x01c0 // Thumb only
|
||||
#define IMAGE_FILE_MACHINE_ARMT 0x01c2 // 32bit Mixed ARM and Thumb/Thumb 2 Little Endian
|
||||
|
||||
//
|
||||
// Support old names for backward compatible
|
||||
//
|
||||
#define EFI_IMAGE_MACHINE_IA32 IMAGE_FILE_MACHINE_I386
|
||||
#define EFI_IMAGE_MACHINE_IA64 IMAGE_FILE_MACHINE_IA64
|
||||
#define EFI_IMAGE_MACHINE_IPF IMAGE_FILE_MACHINE_IA64
|
||||
#define EFI_IMAGE_MACHINE_EBC IMAGE_FILE_MACHINE_EBC
|
||||
#define EFI_IMAGE_MACHINE_X64 IMAGE_FILE_MACHINE_X64
|
||||
#define EFI_IMAGE_MACHINE_ARMT IMAGE_FILE_MACHINE_ARMT
|
||||
|
||||
#define EFI_IMAGE_DOS_SIGNATURE 0x5A4D // MZ
|
||||
#define EFI_IMAGE_OS2_SIGNATURE 0x454E // NE
|
||||
#define EFI_IMAGE_OS2_SIGNATURE_LE 0x454C // LE
|
||||
#define EFI_IMAGE_NT_SIGNATURE 0x00004550 // PE00
|
||||
#define EFI_IMAGE_EDOS_SIGNATURE 0x44454550 // PEED
|
||||
|
||||
///
|
||||
/// PE images can start with an optional DOS header, so if an image is run
|
||||
/// under DOS it can print an error message.
|
||||
///
|
||||
typedef struct {
|
||||
UINT16 e_magic; // Magic number
|
||||
UINT16 e_cblp; // Bytes on last page of file
|
||||
UINT16 e_cp; // Pages in file
|
||||
UINT16 e_crlc; // Relocations
|
||||
UINT16 e_cparhdr; // Size of header in paragraphs
|
||||
UINT16 e_minalloc; // Minimum extra paragraphs needed
|
||||
UINT16 e_maxalloc; // Maximum extra paragraphs needed
|
||||
UINT16 e_ss; // Initial (relative) SS value
|
||||
UINT16 e_sp; // Initial SP value
|
||||
UINT16 e_csum; // Checksum
|
||||
UINT16 e_ip; // Initial IP value
|
||||
UINT16 e_cs; // Initial (relative) CS value
|
||||
UINT16 e_lfarlc; // File address of relocation table
|
||||
UINT16 e_ovno; // Overlay number
|
||||
UINT16 e_res[4]; // Reserved words
|
||||
UINT16 e_oemid; // OEM identifier (for e_oeminfo)
|
||||
UINT16 e_oeminfo; // OEM information; e_oemid specific
|
||||
UINT16 e_res2[10]; // Reserved words
|
||||
UINT32 e_lfanew; // File address of new exe header
|
||||
} EFI_IMAGE_DOS_HEADER;
|
||||
|
||||
///
|
||||
/// File header format.
|
||||
///
|
||||
typedef struct {
|
||||
UINT16 Machine;
|
||||
UINT16 NumberOfSections;
|
||||
UINT32 TimeDateStamp;
|
||||
UINT32 PointerToSymbolTable;
|
||||
UINT32 NumberOfSymbols;
|
||||
UINT16 SizeOfOptionalHeader;
|
||||
UINT16 Characteristics;
|
||||
} EFI_IMAGE_FILE_HEADER;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_FILE_HEADER 20
|
||||
|
||||
#define EFI_IMAGE_FILE_RELOCS_STRIPPED 0x0001 // Relocation info stripped from file.
|
||||
#define EFI_IMAGE_FILE_EXECUTABLE_IMAGE 0x0002 // File is executable (i.e. no unresolved externel references).
|
||||
#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004 // Line nunbers stripped from file.
|
||||
#define EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008 // Local symbols stripped from file.
|
||||
#define EFI_IMAGE_FILE_BYTES_REVERSED_LO 0x0080 // Bytes of machine word are reversed.
|
||||
#define EFI_IMAGE_FILE_32BIT_MACHINE 0x0100 // 32 bit word machine.
|
||||
#define EFI_IMAGE_FILE_DEBUG_STRIPPED 0x0200 // Debugging info stripped from file in .DBG file
|
||||
#define EFI_IMAGE_FILE_SYSTEM 0x1000 // System File.
|
||||
#define EFI_IMAGE_FILE_DLL 0x2000 // File is a DLL.
|
||||
#define EFI_IMAGE_FILE_BYTES_REVERSED_HI 0x8000 // Bytes of machine word are reversed.
|
||||
#define EFI_IMAGE_FILE_MACHINE_UNKNOWN 0
|
||||
#define EFI_IMAGE_FILE_MACHINE_I386 0x14c // Intel 386.
|
||||
#define EFI_IMAGE_FILE_MACHINE_R3000 0x162 // MIPS* little-endian, 0540 big-endian
|
||||
#define EFI_IMAGE_FILE_MACHINE_R4000 0x166 // MIPS* little-endian
|
||||
#define EFI_IMAGE_FILE_MACHINE_ALPHA 0x184 // Alpha_AXP*
|
||||
#define EFI_IMAGE_FILE_MACHINE_POWERPC 0x1F0 // IBM* PowerPC Little-Endian
|
||||
#define EFI_IMAGE_FILE_MACHINE_TAHOE 0x7cc // Intel EM machine
|
||||
//
|
||||
// * Other names and brands may be claimed as the property of others.
|
||||
//
|
||||
|
||||
///
|
||||
/// Directory format.
|
||||
///
|
||||
typedef struct {
|
||||
UINT32 VirtualAddress;
|
||||
UINT32 Size;
|
||||
} EFI_IMAGE_DATA_DIRECTORY;
|
||||
|
||||
#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16
|
||||
|
||||
typedef struct {
|
||||
UINT16 Magic;
|
||||
UINT8 MajorLinkerVersion;
|
||||
UINT8 MinorLinkerVersion;
|
||||
UINT32 SizeOfCode;
|
||||
UINT32 SizeOfInitializedData;
|
||||
UINT32 SizeOfUninitializedData;
|
||||
UINT32 AddressOfEntryPoint;
|
||||
UINT32 BaseOfCode;
|
||||
UINT32 BaseOfData;
|
||||
UINT32 BaseOfBss;
|
||||
UINT32 GprMask;
|
||||
UINT32 CprMask[4];
|
||||
UINT32 GpValue;
|
||||
} EFI_IMAGE_ROM_OPTIONAL_HEADER;
|
||||
|
||||
#define EFI_IMAGE_ROM_OPTIONAL_HDR_MAGIC 0x107
|
||||
#define EFI_IMAGE_SIZEOF_ROM_OPTIONAL_HEADER sizeof (EFI_IMAGE_ROM_OPTIONAL_HEADER)
|
||||
|
||||
typedef struct {
|
||||
EFI_IMAGE_FILE_HEADER FileHeader;
|
||||
EFI_IMAGE_ROM_OPTIONAL_HEADER OptionalHeader;
|
||||
} EFI_IMAGE_ROM_HEADERS;
|
||||
|
||||
///
|
||||
/// @attention
|
||||
/// EFI_IMAGE_OPTIONAL_HEADER32 and EFI_IMAGE_OPTIONAL_HEADER64
|
||||
/// are for use ONLY by tools. All proper EFI code MUST use
|
||||
/// EFI_IMAGE_OPTIONAL_HEADER ONLY!!!
|
||||
///
|
||||
#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b
|
||||
|
||||
typedef struct {
|
||||
//
|
||||
// Standard fields.
|
||||
//
|
||||
UINT16 Magic;
|
||||
UINT8 MajorLinkerVersion;
|
||||
UINT8 MinorLinkerVersion;
|
||||
UINT32 SizeOfCode;
|
||||
UINT32 SizeOfInitializedData;
|
||||
UINT32 SizeOfUninitializedData;
|
||||
UINT32 AddressOfEntryPoint;
|
||||
UINT32 BaseOfCode;
|
||||
UINT32 BaseOfData;
|
||||
//
|
||||
// NT additional fields.
|
||||
//
|
||||
UINT32 ImageBase;
|
||||
UINT32 SectionAlignment;
|
||||
UINT32 FileAlignment;
|
||||
UINT16 MajorOperatingSystemVersion;
|
||||
UINT16 MinorOperatingSystemVersion;
|
||||
UINT16 MajorImageVersion;
|
||||
UINT16 MinorImageVersion;
|
||||
UINT16 MajorSubsystemVersion;
|
||||
UINT16 MinorSubsystemVersion;
|
||||
UINT32 Win32VersionValue;
|
||||
UINT32 SizeOfImage;
|
||||
UINT32 SizeOfHeaders;
|
||||
UINT32 CheckSum;
|
||||
UINT16 Subsystem;
|
||||
UINT16 DllCharacteristics;
|
||||
UINT32 SizeOfStackReserve;
|
||||
UINT32 SizeOfStackCommit;
|
||||
UINT32 SizeOfHeapReserve;
|
||||
UINT32 SizeOfHeapCommit;
|
||||
UINT32 LoaderFlags;
|
||||
UINT32 NumberOfRvaAndSizes;
|
||||
EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
|
||||
} EFI_IMAGE_OPTIONAL_HEADER32;
|
||||
|
||||
///
|
||||
/// @attention
|
||||
/// EFI_IMAGE_OPTIONAL_HEADER32 and EFI_IMAGE_OPTIONAL_HEADER64
|
||||
/// are for use ONLY by tools. All proper EFI code MUST use
|
||||
/// EFI_IMAGE_OPTIONAL_HEADER ONLY!!!
|
||||
///
|
||||
#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
|
||||
|
||||
typedef struct {
|
||||
//
|
||||
// Standard fields.
|
||||
//
|
||||
UINT16 Magic;
|
||||
UINT8 MajorLinkerVersion;
|
||||
UINT8 MinorLinkerVersion;
|
||||
UINT32 SizeOfCode;
|
||||
UINT32 SizeOfInitializedData;
|
||||
UINT32 SizeOfUninitializedData;
|
||||
UINT32 AddressOfEntryPoint;
|
||||
UINT32 BaseOfCode;
|
||||
//
|
||||
// NT additional fields.
|
||||
//
|
||||
UINT64 ImageBase;
|
||||
UINT32 SectionAlignment;
|
||||
UINT32 FileAlignment;
|
||||
UINT16 MajorOperatingSystemVersion;
|
||||
UINT16 MinorOperatingSystemVersion;
|
||||
UINT16 MajorImageVersion;
|
||||
UINT16 MinorImageVersion;
|
||||
UINT16 MajorSubsystemVersion;
|
||||
UINT16 MinorSubsystemVersion;
|
||||
UINT32 Win32VersionValue;
|
||||
UINT32 SizeOfImage;
|
||||
UINT32 SizeOfHeaders;
|
||||
UINT32 CheckSum;
|
||||
UINT16 Subsystem;
|
||||
UINT16 DllCharacteristics;
|
||||
UINT64 SizeOfStackReserve;
|
||||
UINT64 SizeOfStackCommit;
|
||||
UINT64 SizeOfHeapReserve;
|
||||
UINT64 SizeOfHeapCommit;
|
||||
UINT32 LoaderFlags;
|
||||
UINT32 NumberOfRvaAndSizes;
|
||||
EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
|
||||
} EFI_IMAGE_OPTIONAL_HEADER64;
|
||||
|
||||
///
|
||||
/// @attention
|
||||
/// EFI_IMAGE_NT_HEADERS32 and EFI_IMAGE_HEADERS64 are for use ONLY
|
||||
/// by tools. All proper EFI code MUST use EFI_IMAGE_NT_HEADERS ONLY!!!
|
||||
///
|
||||
typedef struct {
|
||||
UINT32 Signature;
|
||||
EFI_IMAGE_FILE_HEADER FileHeader;
|
||||
EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader;
|
||||
} EFI_IMAGE_NT_HEADERS32;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32)
|
||||
|
||||
typedef struct {
|
||||
UINT32 Signature;
|
||||
EFI_IMAGE_FILE_HEADER FileHeader;
|
||||
EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader;
|
||||
} EFI_IMAGE_NT_HEADERS64;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64)
|
||||
|
||||
//
|
||||
// Subsystem Values
|
||||
//
|
||||
#define EFI_IMAGE_SUBSYSTEM_UNKNOWN 0
|
||||
#define EFI_IMAGE_SUBSYSTEM_NATIVE 1
|
||||
#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2
|
||||
#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3.
|
||||
#define EFI_IMAGE_SUBSYSTEM_OS2_CUI 5
|
||||
#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI 7
|
||||
|
||||
//
|
||||
// Directory Entries
|
||||
//
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT 0
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT 1
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE 2
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION 3
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY 4
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC 5
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_TLS 9
|
||||
#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10
|
||||
|
||||
//
|
||||
// Section header format.
|
||||
//
|
||||
#define EFI_IMAGE_SIZEOF_SHORT_NAME 8
|
||||
|
||||
typedef struct {
|
||||
UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME];
|
||||
union {
|
||||
UINT32 PhysicalAddress;
|
||||
UINT32 VirtualSize;
|
||||
} Misc;
|
||||
UINT32 VirtualAddress;
|
||||
UINT32 SizeOfRawData;
|
||||
UINT32 PointerToRawData;
|
||||
UINT32 PointerToRelocations;
|
||||
UINT32 PointerToLinenumbers;
|
||||
UINT16 NumberOfRelocations;
|
||||
UINT16 NumberOfLinenumbers;
|
||||
UINT32 Characteristics;
|
||||
} EFI_IMAGE_SECTION_HEADER;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_SECTION_HEADER 40
|
||||
|
||||
#define EFI_IMAGE_SCN_TYPE_NO_PAD 0x00000008 // Reserved.
|
||||
#define EFI_IMAGE_SCN_CNT_CODE 0x00000020
|
||||
#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA 0x00000040
|
||||
#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA 0x00000080
|
||||
|
||||
#define EFI_IMAGE_SCN_LNK_OTHER 0x00000100 // Reserved.
|
||||
#define EFI_IMAGE_SCN_LNK_INFO 0x00000200 // Section contains comments or some other type of information.
|
||||
#define EFI_IMAGE_SCN_LNK_REMOVE 0x00000800 // Section contents will not become part of image.
|
||||
#define EFI_IMAGE_SCN_LNK_COMDAT 0x00001000
|
||||
|
||||
#define EFI_IMAGE_SCN_ALIGN_1BYTES 0x00100000
|
||||
#define EFI_IMAGE_SCN_ALIGN_2BYTES 0x00200000
|
||||
#define EFI_IMAGE_SCN_ALIGN_4BYTES 0x00300000
|
||||
#define EFI_IMAGE_SCN_ALIGN_8BYTES 0x00400000
|
||||
#define EFI_IMAGE_SCN_ALIGN_16BYTES 0x00500000
|
||||
#define EFI_IMAGE_SCN_ALIGN_32BYTES 0x00600000
|
||||
#define EFI_IMAGE_SCN_ALIGN_64BYTES 0x00700000
|
||||
|
||||
#define EFI_IMAGE_SCN_MEM_DISCARDABLE 0x02000000
|
||||
#define EFI_IMAGE_SCN_MEM_NOT_CACHED 0x04000000
|
||||
#define EFI_IMAGE_SCN_MEM_NOT_PAGED 0x08000000
|
||||
#define EFI_IMAGE_SCN_MEM_SHARED 0x10000000
|
||||
#define EFI_IMAGE_SCN_MEM_EXECUTE 0x20000000
|
||||
#define EFI_IMAGE_SCN_MEM_READ 0x40000000
|
||||
#define EFI_IMAGE_SCN_MEM_WRITE 0x80000000
|
||||
|
||||
///
|
||||
/// Symbol format.
|
||||
///
|
||||
#define EFI_IMAGE_SIZEOF_SYMBOL 18
|
||||
|
||||
//
|
||||
// Section values.
|
||||
//
|
||||
// Symbols have a section number of the section in which they are
|
||||
// defined. Otherwise, section numbers have the following meanings:
|
||||
//
|
||||
#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0 // Symbol is undefined or is common.
|
||||
#define EFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 // Symbol is an absolute value.
|
||||
#define EFI_IMAGE_SYM_DEBUG (UINT16) -2 // Symbol is a special debug item.
|
||||
//
|
||||
// Type (fundamental) values.
|
||||
//
|
||||
#define EFI_IMAGE_SYM_TYPE_NULL 0 // no type.
|
||||
#define EFI_IMAGE_SYM_TYPE_VOID 1 //
|
||||
#define EFI_IMAGE_SYM_TYPE_CHAR 2 // type character.
|
||||
#define EFI_IMAGE_SYM_TYPE_SHORT 3 // type short integer.
|
||||
#define EFI_IMAGE_SYM_TYPE_INT 4
|
||||
#define EFI_IMAGE_SYM_TYPE_LONG 5
|
||||
#define EFI_IMAGE_SYM_TYPE_FLOAT 6
|
||||
#define EFI_IMAGE_SYM_TYPE_DOUBLE 7
|
||||
#define EFI_IMAGE_SYM_TYPE_STRUCT 8
|
||||
#define EFI_IMAGE_SYM_TYPE_UNION 9
|
||||
#define EFI_IMAGE_SYM_TYPE_ENUM 10 // enumeration.
|
||||
#define EFI_IMAGE_SYM_TYPE_MOE 11 // member of enumeration.
|
||||
#define EFI_IMAGE_SYM_TYPE_BYTE 12
|
||||
#define EFI_IMAGE_SYM_TYPE_WORD 13
|
||||
#define EFI_IMAGE_SYM_TYPE_UINT 14
|
||||
#define EFI_IMAGE_SYM_TYPE_DWORD 15
|
||||
|
||||
//
|
||||
// Type (derived) values.
|
||||
//
|
||||
#define EFI_IMAGE_SYM_DTYPE_NULL 0 // no derived type.
|
||||
#define EFI_IMAGE_SYM_DTYPE_POINTER 1
|
||||
#define EFI_IMAGE_SYM_DTYPE_FUNCTION 2
|
||||
#define EFI_IMAGE_SYM_DTYPE_ARRAY 3
|
||||
|
||||
//
|
||||
// Storage classes.
|
||||
//
|
||||
#define EFI_IMAGE_SYM_CLASS_END_OF_FUNCTION (UINT8) -1
|
||||
#define EFI_IMAGE_SYM_CLASS_NULL 0
|
||||
#define EFI_IMAGE_SYM_CLASS_AUTOMATIC 1
|
||||
#define EFI_IMAGE_SYM_CLASS_EXTERNAL 2
|
||||
#define EFI_IMAGE_SYM_CLASS_STATIC 3
|
||||
#define EFI_IMAGE_SYM_CLASS_REGISTER 4
|
||||
#define EFI_IMAGE_SYM_CLASS_EXTERNAL_DEF 5
|
||||
#define EFI_IMAGE_SYM_CLASS_LABEL 6
|
||||
#define EFI_IMAGE_SYM_CLASS_UNDEFINED_LABEL 7
|
||||
#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_STRUCT 8
|
||||
#define EFI_IMAGE_SYM_CLASS_ARGUMENT 9
|
||||
#define EFI_IMAGE_SYM_CLASS_STRUCT_TAG 10
|
||||
#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_UNION 11
|
||||
#define EFI_IMAGE_SYM_CLASS_UNION_TAG 12
|
||||
#define EFI_IMAGE_SYM_CLASS_TYPE_DEFINITION 13
|
||||
#define EFI_IMAGE_SYM_CLASS_UNDEFINED_STATIC 14
|
||||
#define EFI_IMAGE_SYM_CLASS_ENUM_TAG 15
|
||||
#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_ENUM 16
|
||||
#define EFI_IMAGE_SYM_CLASS_REGISTER_PARAM 17
|
||||
#define EFI_IMAGE_SYM_CLASS_BIT_FIELD 18
|
||||
#define EFI_IMAGE_SYM_CLASS_BLOCK 100
|
||||
#define EFI_IMAGE_SYM_CLASS_FUNCTION 101
|
||||
#define EFI_IMAGE_SYM_CLASS_END_OF_STRUCT 102
|
||||
#define EFI_IMAGE_SYM_CLASS_FILE 103
|
||||
#define EFI_IMAGE_SYM_CLASS_SECTION 104
|
||||
#define EFI_IMAGE_SYM_CLASS_WEAK_EXTERNAL 105
|
||||
|
||||
//
|
||||
// type packing constants
|
||||
//
|
||||
#define EFI_IMAGE_N_BTMASK 017
|
||||
#define EFI_IMAGE_N_TMASK 060
|
||||
#define EFI_IMAGE_N_TMASK1 0300
|
||||
#define EFI_IMAGE_N_TMASK2 0360
|
||||
#define EFI_IMAGE_N_BTSHFT 4
|
||||
#define EFI_IMAGE_N_TSHIFT 2
|
||||
|
||||
//
|
||||
// Communal selection types.
|
||||
//
|
||||
#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES 1
|
||||
#define EFI_IMAGE_COMDAT_SELECT_ANY 2
|
||||
#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE 3
|
||||
#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH 4
|
||||
#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE 5
|
||||
|
||||
#define EFI_IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY 1
|
||||
#define EFI_IMAGE_WEAK_EXTERN_SEARCH_LIBRARY 2
|
||||
#define EFI_IMAGE_WEAK_EXTERN_SEARCH_ALIAS 3
|
||||
|
||||
///
|
||||
/// Relocation format.
|
||||
///
|
||||
typedef struct {
|
||||
UINT32 VirtualAddress;
|
||||
UINT32 SymbolTableIndex;
|
||||
UINT16 Type;
|
||||
} EFI_IMAGE_RELOCATION;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_RELOCATION 10
|
||||
|
||||
//
|
||||
// I386 relocation types.
|
||||
//
|
||||
#define EFI_IMAGE_REL_I386_ABSOLUTE 0 // Reference is absolute, no relocation is necessary
|
||||
#define EFI_IMAGE_REL_I386_DIR16 01 // Direct 16-bit reference to the symbols virtual address
|
||||
#define EFI_IMAGE_REL_I386_REL16 02 // PC-relative 16-bit reference to the symbols virtual address
|
||||
#define EFI_IMAGE_REL_I386_DIR32 06 // Direct 32-bit reference to the symbols virtual address
|
||||
#define EFI_IMAGE_REL_I386_DIR32NB 07 // Direct 32-bit reference to the symbols virtual address, base not included
|
||||
#define EFI_IMAGE_REL_I386_SEG12 09 // Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address
|
||||
#define EFI_IMAGE_REL_I386_SECTION 010
|
||||
#define EFI_IMAGE_REL_I386_SECREL 011
|
||||
#define EFI_IMAGE_REL_I386_REL32 020 // PC-relative 32-bit reference to the symbols virtual address
|
||||
|
||||
//
|
||||
// x64 processor relocation types.
|
||||
//
|
||||
#define IMAGE_REL_AMD64_ABSOLUTE 0x0000
|
||||
#define IMAGE_REL_AMD64_ADDR64 0x0001
|
||||
#define IMAGE_REL_AMD64_ADDR32 0x0002
|
||||
#define IMAGE_REL_AMD64_ADDR32NB 0x0003
|
||||
#define IMAGE_REL_AMD64_REL32 0x0004
|
||||
#define IMAGE_REL_AMD64_REL32_1 0x0005
|
||||
#define IMAGE_REL_AMD64_REL32_2 0x0006
|
||||
#define IMAGE_REL_AMD64_REL32_3 0x0007
|
||||
#define IMAGE_REL_AMD64_REL32_4 0x0008
|
||||
#define IMAGE_REL_AMD64_REL32_5 0x0009
|
||||
#define IMAGE_REL_AMD64_SECTION 0x000A
|
||||
#define IMAGE_REL_AMD64_SECREL 0x000B
|
||||
#define IMAGE_REL_AMD64_SECREL7 0x000C
|
||||
#define IMAGE_REL_AMD64_TOKEN 0x000D
|
||||
#define IMAGE_REL_AMD64_SREL32 0x000E
|
||||
#define IMAGE_REL_AMD64_PAIR 0x000F
|
||||
#define IMAGE_REL_AMD64_SSPAN32 0x0010
|
||||
|
||||
///
|
||||
/// Based relocation format.
|
||||
///
|
||||
typedef struct {
|
||||
UINT32 VirtualAddress;
|
||||
UINT32 SizeOfBlock;
|
||||
} EFI_IMAGE_BASE_RELOCATION;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_BASE_RELOCATION 8
|
||||
|
||||
//
|
||||
// Based relocation types.
|
||||
//
|
||||
#define EFI_IMAGE_REL_BASED_ABSOLUTE 0
|
||||
#define EFI_IMAGE_REL_BASED_HIGH 1
|
||||
#define EFI_IMAGE_REL_BASED_LOW 2
|
||||
#define EFI_IMAGE_REL_BASED_HIGHLOW 3
|
||||
#define EFI_IMAGE_REL_BASED_HIGHADJ 4
|
||||
#define EFI_IMAGE_REL_BASED_MIPS_JMPADDR 5
|
||||
#define EFI_IMAGE_REL_BASED_IA64_IMM64 9
|
||||
#define EFI_IMAGE_REL_BASED_DIR64 10
|
||||
|
||||
///
|
||||
/// Line number format.
|
||||
///
|
||||
typedef struct {
|
||||
union {
|
||||
UINT32 SymbolTableIndex; // Symbol table index of function name if Linenumber is 0.
|
||||
UINT32 VirtualAddress; // Virtual address of line number.
|
||||
} Type;
|
||||
UINT16 Linenumber; // Line number.
|
||||
} EFI_IMAGE_LINENUMBER;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_LINENUMBER 6
|
||||
|
||||
//
|
||||
// Archive format.
|
||||
//
|
||||
#define EFI_IMAGE_ARCHIVE_START_SIZE 8
|
||||
#define EFI_IMAGE_ARCHIVE_START "!<arch>\n"
|
||||
#define EFI_IMAGE_ARCHIVE_END "`\n"
|
||||
#define EFI_IMAGE_ARCHIVE_PAD "\n"
|
||||
#define EFI_IMAGE_ARCHIVE_LINKER_MEMBER "/ "
|
||||
#define EFI_IMAGE_ARCHIVE_LONGNAMES_MEMBER "// "
|
||||
|
||||
typedef struct {
|
||||
UINT8 Name[16]; // File member name - `/' terminated.
|
||||
UINT8 Date[12]; // File member date - decimal.
|
||||
UINT8 UserID[6]; // File member user id - decimal.
|
||||
UINT8 GroupID[6]; // File member group id - decimal.
|
||||
UINT8 Mode[8]; // File member mode - octal.
|
||||
UINT8 Size[10]; // File member size - decimal.
|
||||
UINT8 EndHeader[2]; // String to end header.
|
||||
} EFI_IMAGE_ARCHIVE_MEMBER_HEADER;
|
||||
|
||||
#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
|
||||
|
||||
//
|
||||
// DLL support.
|
||||
//
|
||||
|
||||
///
|
||||
/// DLL Export Format
|
||||
///
|
||||
typedef struct {
|
||||
UINT32 Characteristics;
|
||||
UINT32 TimeDateStamp;
|
||||
UINT16 MajorVersion;
|
||||
UINT16 MinorVersion;
|
||||
UINT32 Name;
|
||||
UINT32 Base;
|
||||
UINT32 NumberOfFunctions;
|
||||
UINT32 NumberOfNames;
|
||||
UINT32 AddressOfFunctions;
|
||||
UINT32 AddressOfNames;
|
||||
UINT32 AddressOfNameOrdinals;
|
||||
} EFI_IMAGE_EXPORT_DIRECTORY;
|
||||
|
||||
///
|
||||
/// DLL support.
|
||||
/// Import Format
|
||||
///
|
||||
typedef struct {
|
||||
UINT16 Hint;
|
||||
UINT8 Name[1];
|
||||
} EFI_IMAGE_IMPORT_BY_NAME;
|
||||
|
||||
typedef struct {
|
||||
union {
|
||||
UINT32 Function;
|
||||
UINT32 Ordinal;
|
||||
EFI_IMAGE_IMPORT_BY_NAME *AddressOfData;
|
||||
} u1;
|
||||
} EFI_IMAGE_THUNK_DATA;
|
||||
|
||||
#define EFI_IMAGE_ORDINAL_FLAG 0x80000000
|
||||
#define EFI_IMAGE_SNAP_BY_ORDINAL(Ordinal) ((Ordinal & EFI_IMAGE_ORDINAL_FLAG) != 0)
|
||||
#define EFI_IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff)
|
||||
|
||||
typedef struct {
|
||||
UINT32 Characteristics;
|
||||
UINT32 TimeDateStamp;
|
||||
UINT32 ForwarderChain;
|
||||
UINT32 Name;
|
||||
EFI_IMAGE_THUNK_DATA *FirstThunk;
|
||||
} EFI_IMAGE_IMPORT_DESCRIPTOR;
|
||||
|
||||
///
|
||||
/// Debug Format
|
||||
///
|
||||
#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW 2
|
||||
|
||||
typedef struct {
|
||||
UINT32 Characteristics;
|
||||
UINT32 TimeDateStamp;
|
||||
UINT16 MajorVersion;
|
||||
UINT16 MinorVersion;
|
||||
UINT32 Type;
|
||||
UINT32 SizeOfData;
|
||||
UINT32 RVA;
|
||||
UINT32 FileOffset;
|
||||
} EFI_IMAGE_DEBUG_DIRECTORY_ENTRY;
|
||||
|
||||
#define CODEVIEW_SIGNATURE_NB10 0x3031424E // "NB10"
|
||||
typedef struct {
|
||||
UINT32 Signature; // "NB10"
|
||||
UINT32 Unknown;
|
||||
UINT32 Unknown2;
|
||||
UINT32 Unknown3;
|
||||
//
|
||||
// Filename of .PDB goes here
|
||||
//
|
||||
} EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY;
|
||||
|
||||
#define CODEVIEW_SIGNATURE_RSDS 0x53445352 // "RSDS"
|
||||
typedef struct {
|
||||
UINT32 Signature; // "RSDS"
|
||||
UINT32 Unknown;
|
||||
UINT32 Unknown2;
|
||||
UINT32 Unknown3;
|
||||
UINT32 Unknown4;
|
||||
UINT32 Unknown5;
|
||||
//
|
||||
// Filename of .PDB goes here
|
||||
//
|
||||
} EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY;
|
||||
|
||||
//
|
||||
// .pdata entries for X64
|
||||
//
|
||||
typedef struct {
|
||||
UINT32 FunctionStartAddress;
|
||||
UINT32 FunctionEndAddress;
|
||||
UINT32 UnwindInfoAddress;
|
||||
} RUNTIME_FUNCTION;
|
||||
|
||||
typedef struct {
|
||||
UINT8 Version:3;
|
||||
UINT8 Flags:5;
|
||||
UINT8 SizeOfProlog;
|
||||
UINT8 CountOfUnwindCodes;
|
||||
UINT8 FrameRegister:4;
|
||||
UINT8 FrameRegisterOffset:4;
|
||||
} UNWIND_INFO;
|
||||
|
||||
///
|
||||
/// Header format for TE images
|
||||
///
|
||||
typedef struct {
|
||||
UINT16 Signature; // signature for TE format = "VZ"
|
||||
UINT16 Machine; // from the original file header
|
||||
UINT8 NumberOfSections; // from the original file header
|
||||
UINT8 Subsystem; // from original optional header
|
||||
UINT16 StrippedSize; // how many bytes we removed from the header
|
||||
UINT32 AddressOfEntryPoint; // offset to entry point -- from original optional header
|
||||
UINT32 BaseOfCode; // from original image -- required for ITP debug
|
||||
UINT64 ImageBase; // from original file header
|
||||
EFI_IMAGE_DATA_DIRECTORY DataDirectory[2]; // only base relocation and debug directory
|
||||
} EFI_TE_IMAGE_HEADER;
|
||||
|
||||
#define EFI_TE_IMAGE_HEADER_SIGNATURE 0x5A56 // "VZ"
|
||||
|
||||
//
|
||||
// Data directory indexes in our TE image header
|
||||
//
|
||||
#define EFI_TE_IMAGE_DIRECTORY_ENTRY_BASERELOC 0
|
||||
#define EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG 1
|
||||
|
||||
|
||||
//
|
||||
// Union of PE32, PE32+, and TE headers
|
||||
//
|
||||
typedef union {
|
||||
EFI_IMAGE_NT_HEADERS32 Pe32;
|
||||
EFI_IMAGE_NT_HEADERS64 Pe32Plus;
|
||||
EFI_TE_IMAGE_HEADER Te;
|
||||
} EFI_IMAGE_OPTIONAL_HEADER_UNION;
|
||||
|
||||
typedef union {
|
||||
EFI_IMAGE_NT_HEADERS32 *Pe32;
|
||||
EFI_IMAGE_NT_HEADERS64 *Pe32Plus;
|
||||
EFI_TE_IMAGE_HEADER *Te;
|
||||
EFI_IMAGE_OPTIONAL_HEADER_UNION *Union;
|
||||
} EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION;
|
||||
|
||||
#endif
|
544
BaseTools/Source/C/Include/IndustryStandard/pci22.h
Normal file
544
BaseTools/Source/C/Include/IndustryStandard/pci22.h
Normal file
@@ -0,0 +1,544 @@
|
||||
/** @file
|
||||
Support for PCI 2.2 standard.
|
||||
|
||||
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: pci22.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _PCI22_H
|
||||
#define _PCI22_H
|
||||
|
||||
#define PCI_MAX_SEGMENT 0
|
||||
|
||||
#define PCI_MAX_BUS 255
|
||||
|
||||
#define PCI_MAX_DEVICE 31
|
||||
#define PCI_MAX_FUNC 7
|
||||
|
||||
//
|
||||
// Command
|
||||
//
|
||||
#define PCI_VGA_PALETTE_SNOOP_DISABLED 0x20
|
||||
|
||||
#pragma pack(push, 1)
|
||||
typedef struct {
|
||||
UINT16 VendorId;
|
||||
UINT16 DeviceId;
|
||||
UINT16 Command;
|
||||
UINT16 Status;
|
||||
UINT8 RevisionID;
|
||||
UINT8 ClassCode[3];
|
||||
UINT8 CacheLineSize;
|
||||
UINT8 LatencyTimer;
|
||||
UINT8 HeaderType;
|
||||
UINT8 BIST;
|
||||
} PCI_DEVICE_INDEPENDENT_REGION;
|
||||
|
||||
typedef struct {
|
||||
UINT32 Bar[6];
|
||||
UINT32 CISPtr;
|
||||
UINT16 SubsystemVendorID;
|
||||
UINT16 SubsystemID;
|
||||
UINT32 ExpansionRomBar;
|
||||
UINT8 CapabilityPtr;
|
||||
UINT8 Reserved1[3];
|
||||
UINT32 Reserved2;
|
||||
UINT8 InterruptLine;
|
||||
UINT8 InterruptPin;
|
||||
UINT8 MinGnt;
|
||||
UINT8 MaxLat;
|
||||
} PCI_DEVICE_HEADER_TYPE_REGION;
|
||||
|
||||
typedef struct {
|
||||
PCI_DEVICE_INDEPENDENT_REGION Hdr;
|
||||
PCI_DEVICE_HEADER_TYPE_REGION Device;
|
||||
} PCI_TYPE00;
|
||||
|
||||
typedef struct {
|
||||
UINT32 Bar[2];
|
||||
UINT8 PrimaryBus;
|
||||
UINT8 SecondaryBus;
|
||||
UINT8 SubordinateBus;
|
||||
UINT8 SecondaryLatencyTimer;
|
||||
UINT8 IoBase;
|
||||
UINT8 IoLimit;
|
||||
UINT16 SecondaryStatus;
|
||||
UINT16 MemoryBase;
|
||||
UINT16 MemoryLimit;
|
||||
UINT16 PrefetchableMemoryBase;
|
||||
UINT16 PrefetchableMemoryLimit;
|
||||
UINT32 PrefetchableBaseUpper32;
|
||||
UINT32 PrefetchableLimitUpper32;
|
||||
UINT16 IoBaseUpper16;
|
||||
UINT16 IoLimitUpper16;
|
||||
UINT8 CapabilityPtr;
|
||||
UINT8 Reserved[3];
|
||||
UINT32 ExpansionRomBAR;
|
||||
UINT8 InterruptLine;
|
||||
UINT8 InterruptPin;
|
||||
UINT16 BridgeControl;
|
||||
} PCI_BRIDGE_CONTROL_REGISTER;
|
||||
|
||||
typedef struct {
|
||||
PCI_DEVICE_INDEPENDENT_REGION Hdr;
|
||||
PCI_BRIDGE_CONTROL_REGISTER Bridge;
|
||||
} PCI_TYPE01;
|
||||
|
||||
typedef union {
|
||||
PCI_TYPE00 Device;
|
||||
PCI_TYPE01 Bridge;
|
||||
} PCI_TYPE_GENERIC;
|
||||
|
||||
typedef struct {
|
||||
UINT32 CardBusSocketReg; // Cardus Socket/ExCA Base
|
||||
// Address Register
|
||||
//
|
||||
UINT16 Reserved;
|
||||
UINT16 SecondaryStatus; // Secondary Status
|
||||
UINT8 PciBusNumber; // PCI Bus Number
|
||||
UINT8 CardBusBusNumber; // CardBus Bus Number
|
||||
UINT8 SubordinateBusNumber; // Subordinate Bus Number
|
||||
UINT8 CardBusLatencyTimer; // CardBus Latency Timer
|
||||
UINT32 MemoryBase0; // Memory Base Register 0
|
||||
UINT32 MemoryLimit0; // Memory Limit Register 0
|
||||
UINT32 MemoryBase1;
|
||||
UINT32 MemoryLimit1;
|
||||
UINT32 IoBase0;
|
||||
UINT32 IoLimit0; // I/O Base Register 0
|
||||
UINT32 IoBase1; // I/O Limit Register 0
|
||||
UINT32 IoLimit1;
|
||||
UINT8 InterruptLine; // Interrupt Line
|
||||
UINT8 InterruptPin; // Interrupt Pin
|
||||
UINT16 BridgeControl; // Bridge Control
|
||||
} PCI_CARDBUS_CONTROL_REGISTER;
|
||||
|
||||
//
|
||||
// Definitions of PCI class bytes and manipulation macros.
|
||||
//
|
||||
#define PCI_CLASS_OLD 0x00
|
||||
#define PCI_CLASS_OLD_OTHER 0x00
|
||||
#define PCI_CLASS_OLD_VGA 0x01
|
||||
|
||||
#define PCI_CLASS_MASS_STORAGE 0x01
|
||||
#define PCI_CLASS_MASS_STORAGE_SCSI 0x00
|
||||
#define PCI_CLASS_MASS_STORAGE_IDE 0x01 // obsolete
|
||||
#define PCI_CLASS_IDE 0x01
|
||||
#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02
|
||||
#define PCI_CLASS_MASS_STORAGE_IPI 0x03
|
||||
#define PCI_CLASS_MASS_STORAGE_RAID 0x04
|
||||
#define PCI_CLASS_MASS_STORAGE_OTHER 0x80
|
||||
|
||||
#define PCI_CLASS_NETWORK 0x02
|
||||
#define PCI_CLASS_NETWORK_ETHERNET 0x00
|
||||
#define PCI_CLASS_ETHERNET 0x00 // obsolete
|
||||
#define PCI_CLASS_NETWORK_TOKENRING 0x01
|
||||
#define PCI_CLASS_NETWORK_FDDI 0x02
|
||||
#define PCI_CLASS_NETWORK_ATM 0x03
|
||||
#define PCI_CLASS_NETWORK_ISDN 0x04
|
||||
#define PCI_CLASS_NETWORK_OTHER 0x80
|
||||
|
||||
#define PCI_CLASS_DISPLAY 0x03
|
||||
#define PCI_CLASS_DISPLAY_CTRL 0x03 // obsolete
|
||||
#define PCI_CLASS_DISPLAY_VGA 0x00
|
||||
#define PCI_CLASS_VGA 0x00 // obsolete
|
||||
#define PCI_CLASS_DISPLAY_XGA 0x01
|
||||
#define PCI_CLASS_DISPLAY_3D 0x02
|
||||
#define PCI_CLASS_DISPLAY_OTHER 0x80
|
||||
#define PCI_CLASS_DISPLAY_GFX 0x80
|
||||
#define PCI_CLASS_GFX 0x80 // obsolete
|
||||
#define PCI_CLASS_BRIDGE 0x06
|
||||
#define PCI_CLASS_BRIDGE_HOST 0x00
|
||||
#define PCI_CLASS_BRIDGE_ISA 0x01
|
||||
#define PCI_CLASS_ISA 0x01 // obsolete
|
||||
#define PCI_CLASS_BRIDGE_EISA 0x02
|
||||
#define PCI_CLASS_BRIDGE_MCA 0x03
|
||||
#define PCI_CLASS_BRIDGE_P2P 0x04
|
||||
#define PCI_CLASS_BRIDGE_PCMCIA 0x05
|
||||
#define PCI_CLASS_BRIDGE_NUBUS 0x06
|
||||
#define PCI_CLASS_BRIDGE_CARDBUS 0x07
|
||||
#define PCI_CLASS_BRIDGE_RACEWAY 0x08
|
||||
#define PCI_CLASS_BRIDGE_ISA_PDECODE 0x80
|
||||
#define PCI_CLASS_ISA_POSITIVE_DECODE 0x80 // obsolete
|
||||
|
||||
#define PCI_CLASS_SCC 0x07 // Simple communications controllers
|
||||
#define PCI_SUBCLASS_SERIAL 0x00
|
||||
#define PCI_IF_GENERIC_XT 0x00
|
||||
#define PCI_IF_16450 0x01
|
||||
#define PCI_IF_16550 0x02
|
||||
#define PCI_IF_16650 0x03
|
||||
#define PCI_IF_16750 0x04
|
||||
#define PCI_IF_16850 0x05
|
||||
#define PCI_IF_16950 0x06
|
||||
#define PCI_SUBCLASS_PARALLEL 0x01
|
||||
#define PCI_IF_PARALLEL_PORT 0x00
|
||||
#define PCI_IF_BI_DIR_PARALLEL_PORT 0x01
|
||||
#define PCI_IF_ECP_PARALLEL_PORT 0x02
|
||||
#define PCI_IF_1284_CONTROLLER 0x03
|
||||
#define PCI_IF_1284_DEVICE 0xFE
|
||||
#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02
|
||||
#define PCI_SUBCLASS_MODEM 0x03
|
||||
#define PCI_IF_GENERIC_MODEM 0x00
|
||||
#define PCI_IF_16450_MODEM 0x01
|
||||
#define PCI_IF_16550_MODEM 0x02
|
||||
#define PCI_IF_16650_MODEM 0x03
|
||||
#define PCI_IF_16750_MODEM 0x04
|
||||
#define PCI_SUBCLASS_OTHER 0x80
|
||||
|
||||
#define PCI_CLASS_SYSTEM_PERIPHERAL 0x08
|
||||
#define PCI_SUBCLASS_PIC 0x00
|
||||
#define PCI_IF_8259_PIC 0x00
|
||||
#define PCI_IF_ISA_PIC 0x01
|
||||
#define PCI_IF_EISA_PIC 0x02
|
||||
#define PCI_IF_APIC_CONTROLLER 0x10 // I/O APIC interrupt controller , 32 bye none-prefectable memory.
|
||||
#define PCI_IF_APIC_CONTROLLER2 0x20
|
||||
#define PCI_SUBCLASS_TIMER 0x02
|
||||
#define PCI_IF_8254_TIMER 0x00
|
||||
#define PCI_IF_ISA_TIMER 0x01
|
||||
#define PCI_EISA_TIMER 0x02
|
||||
#define PCI_SUBCLASS_RTC 0x03
|
||||
#define PCI_IF_GENERIC_RTC 0x00
|
||||
#define PCI_IF_ISA_RTC 0x00
|
||||
#define PCI_SUBCLASS_PNP_CONTROLLER 0x04 // HotPlug Controller
|
||||
|
||||
#define PCI_CLASS_INPUT_DEVICE 0x09
|
||||
#define PCI_SUBCLASS_KEYBOARD 0x00
|
||||
#define PCI_SUBCLASS_PEN 0x01
|
||||
#define PCI_SUBCLASS_MOUSE_CONTROLLER 0x02
|
||||
#define PCI_SUBCLASS_SCAN_CONTROLLER 0x03
|
||||
#define PCI_SUBCLASS_GAMEPORT 0x04
|
||||
|
||||
#define PCI_CLASS_DOCKING_STATION 0x0A
|
||||
|
||||
#define PCI_CLASS_PROCESSOR 0x0B
|
||||
#define PCI_SUBCLASS_PROC_386 0x00
|
||||
#define PCI_SUBCLASS_PROC_486 0x01
|
||||
#define PCI_SUBCLASS_PROC_PENTIUM 0x02
|
||||
#define PCI_SUBCLASS_PROC_ALPHA 0x10
|
||||
#define PCI_SUBCLASS_PROC_POWERPC 0x20
|
||||
#define PCI_SUBCLASS_PROC_MIPS 0x30
|
||||
#define PCI_SUBCLASS_PROC_CO_PORC 0x40 // Co-Processor
|
||||
|
||||
#define PCI_CLASS_SERIAL 0x0C
|
||||
#define PCI_CLASS_SERIAL_FIREWIRE 0x00
|
||||
#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01
|
||||
#define PCI_CLASS_SERIAL_SSA 0x02
|
||||
#define PCI_CLASS_SERIAL_USB 0x03
|
||||
#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04
|
||||
#define PCI_CLASS_SERIAL_SMB 0x05
|
||||
|
||||
#define PCI_CLASS_WIRELESS 0x0D
|
||||
#define PCI_SUBCLASS_IRDA 0x00
|
||||
#define PCI_SUBCLASS_IR 0x01
|
||||
#define PCI_SUBCLASS_RF 0x02
|
||||
|
||||
#define PCI_CLASS_INTELLIGENT_IO 0x0E
|
||||
|
||||
#define PCI_CLASS_SATELLITE 0x0F
|
||||
#define PCI_SUBCLASS_TV 0x01
|
||||
#define PCI_SUBCLASS_AUDIO 0x02
|
||||
#define PCI_SUBCLASS_VOICE 0x03
|
||||
#define PCI_SUBCLASS_DATA 0x04
|
||||
|
||||
#define PCI_SECURITY_CONTROLLER 0x10 // Encryption and decryption controller
|
||||
#define PCI_SUBCLASS_NET_COMPUT 0x00
|
||||
#define PCI_SUBCLASS_ENTERTAINMENT 0x10
|
||||
|
||||
#define PCI_CLASS_DPIO 0x11
|
||||
|
||||
#define IS_CLASS1(_p, c) ((_p)->Hdr.ClassCode[2] == (c))
|
||||
#define IS_CLASS2(_p, c, s) (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s)))
|
||||
#define IS_CLASS3(_p, c, s, p) (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p)))
|
||||
|
||||
#define IS_PCI_DISPLAY(_p) IS_CLASS1 (_p, PCI_CLASS_DISPLAY)
|
||||
#define IS_PCI_VGA(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, 0)
|
||||
#define IS_PCI_8514(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, 1)
|
||||
#define IS_PCI_GFX(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_GFX, 0)
|
||||
#define IS_PCI_OLD(_p) IS_CLASS1 (_p, PCI_CLASS_OLD)
|
||||
#define IS_PCI_OLD_VGA(_p) IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA)
|
||||
#define IS_PCI_IDE(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE)
|
||||
#define IS_PCI_SCSI(_p) IS_CLASS3 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI, 0)
|
||||
#define IS_PCI_RAID(_p) IS_CLASS3 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID, 0)
|
||||
#define IS_PCI_LPC(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA, 0)
|
||||
#define IS_PCI_P2P(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, 0)
|
||||
#define IS_PCI_P2P_SUB(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, 1)
|
||||
#define IS_PCI_USB(_p) IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB)
|
||||
|
||||
#define HEADER_TYPE_DEVICE 0x00
|
||||
#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01
|
||||
#define HEADER_TYPE_CARDBUS_BRIDGE 0x02
|
||||
|
||||
#define HEADER_TYPE_MULTI_FUNCTION 0x80
|
||||
#define HEADER_LAYOUT_CODE 0x7f
|
||||
|
||||
#define IS_PCI_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE))
|
||||
#define IS_CARDBUS_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE))
|
||||
#define IS_PCI_MULTI_FUNC(_p) ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION)
|
||||
|
||||
#define PCI_DEVICE_ROMBAR 0x30
|
||||
#define PCI_BRIDGE_ROMBAR 0x38
|
||||
|
||||
#define PCI_MAX_BAR 0x0006
|
||||
#define PCI_MAX_CONFIG_OFFSET 0x0100
|
||||
|
||||
#define PCI_VENDOR_ID_OFFSET 0x00
|
||||
#define PCI_DEVICE_ID_OFFSET 0x02
|
||||
#define PCI_COMMAND_OFFSET 0x04
|
||||
#define PCI_PRIMARY_STATUS_OFFSET 0x06
|
||||
#define PCI_REVISION_ID_OFFSET 0x08
|
||||
#define PCI_CLASSCODE_OFFSET 0x09
|
||||
#define PCI_CACHELINE_SIZE_OFFSET 0x0C
|
||||
#define PCI_LATENCY_TIMER_OFFSET 0x0D
|
||||
#define PCI_HEADER_TYPE_OFFSET 0x0E
|
||||
#define PCI_BIST_OFFSET 0x0F
|
||||
#define PCI_BASE_ADDRESSREG_OFFSET 0x10
|
||||
#define PCI_CARDBUS_CIS_OFFSET 0x28
|
||||
#define PCI_SVID_OFFSET 0x2C // SubSystem Vendor id
|
||||
#define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C
|
||||
#define PCI_SID_OFFSET 0x2E // SubSystem ID
|
||||
#define PCI_SUBSYSTEM_ID_OFFSET 0x2E
|
||||
#define PCI_EXPANSION_ROM_BASE 0x30
|
||||
#define PCI_CAPBILITY_POINTER_OFFSET 0x34
|
||||
#define PCI_INT_LINE_OFFSET 0x3C // Interrupt Line Register
|
||||
#define PCI_INT_PIN_OFFSET 0x3D // Interrupt Pin Register
|
||||
#define PCI_MAXGNT_OFFSET 0x3E // Max Grant Register
|
||||
#define PCI_MAXLAT_OFFSET 0x3F // Max Latency Register
|
||||
|
||||
#define PCI_BRIDGE_CONTROL_REGISTER_OFFSET 0x3E
|
||||
#define PCI_BRIDGE_STATUS_REGISTER_OFFSET 0x1E
|
||||
|
||||
#define PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET 0x18
|
||||
#define PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET 0x19
|
||||
#define PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET 0x1a
|
||||
|
||||
typedef union {
|
||||
struct {
|
||||
UINT32 Reg : 8;
|
||||
UINT32 Func : 3;
|
||||
UINT32 Dev : 5;
|
||||
UINT32 Bus : 8;
|
||||
UINT32 Reserved : 7;
|
||||
UINT32 Enable : 1;
|
||||
} Bits;
|
||||
UINT32 Uint32;
|
||||
} PCI_CONFIG_ACCESS_CF8;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#define PCI_EXPANSION_ROM_HEADER_SIGNATURE 0xaa55
|
||||
#define PCI_DATA_STRUCTURE_SIGNATURE EFI_SIGNATURE_32 ('P', 'C', 'I', 'R')
|
||||
#define PCI_CODE_TYPE_PCAT_IMAGE 0x00
|
||||
#define PCI_CODE_TYPE_EFI_IMAGE 0x03
|
||||
#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED 0x0001
|
||||
|
||||
#define EFI_PCI_COMMAND_IO_SPACE 0x0001
|
||||
#define EFI_PCI_COMMAND_MEMORY_SPACE 0x0002
|
||||
#define EFI_PCI_COMMAND_BUS_MASTER 0x0004
|
||||
#define EFI_PCI_COMMAND_SPECIAL_CYCLE 0x0008
|
||||
#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE 0x0010
|
||||
#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP 0x0020
|
||||
#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND 0x0040
|
||||
#define EFI_PCI_COMMAND_STEPPING_CONTROL 0x0080
|
||||
#define EFI_PCI_COMMAND_SERR 0x0100
|
||||
#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK 0x0200
|
||||
|
||||
#define EFI_PCI_BRIDGE_CONTROL_PARITY_ERROR_RESPONSE 0x0001
|
||||
#define EFI_PCI_BRIDGE_CONTROL_SERR 0x0002
|
||||
#define EFI_PCI_BRIDGE_CONTROL_ISA 0x0004
|
||||
#define EFI_PCI_BRIDGE_CONTROL_VGA 0x0008
|
||||
#define EFI_PCI_BRIDGE_CONTROL_VGA_16 0x0010
|
||||
#define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT 0x0020
|
||||
#define EFI_PCI_BRIDGE_CONTROL_RESET_SECONDARY_BUS 0x0040
|
||||
#define EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK 0x0080
|
||||
#define EFI_PCI_BRIDGE_CONTROL_PRIMARY_DISCARD_TIMER 0x0100
|
||||
#define EFI_PCI_BRIDGE_CONTROL_SECONDARY_DISCARD_TIMER 0x0200
|
||||
#define EFI_PCI_BRIDGE_CONTROL_TIMER_STATUS 0x0400
|
||||
#define EFI_PCI_BRIDGE_CONTROL_DISCARD_TIMER_SERR 0x0800
|
||||
|
||||
//
|
||||
// Following are the PCI-CARDBUS bridge control bit
|
||||
//
|
||||
#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE 0x0080
|
||||
#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE 0x0100
|
||||
#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE 0x0200
|
||||
#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE 0x0400
|
||||
|
||||
//
|
||||
// Following are the PCI status control bit
|
||||
//
|
||||
#define EFI_PCI_STATUS_CAPABILITY 0x0010
|
||||
#define EFI_PCI_STATUS_66MZ_CAPABLE 0x0020
|
||||
#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE 0x0080
|
||||
#define EFI_PCI_MASTER_DATA_PARITY_ERROR 0x0100
|
||||
|
||||
#define EFI_PCI_CAPABILITY_PTR 0x34
|
||||
#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14
|
||||
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
UINT16 Signature; // 0xaa55
|
||||
UINT8 Reserved[0x16];
|
||||
UINT16 PcirOffset;
|
||||
} PCI_EXPANSION_ROM_HEADER;
|
||||
|
||||
typedef struct {
|
||||
UINT16 Signature; // 0xaa55
|
||||
UINT8 Size512;
|
||||
UINT8 InitEntryPoint[3];
|
||||
UINT8 Reserved[0x12];
|
||||
UINT16 PcirOffset;
|
||||
} EFI_LEGACY_EXPANSION_ROM_HEADER;
|
||||
|
||||
typedef struct {
|
||||
UINT32 Signature; // "PCIR"
|
||||
UINT16 VendorId;
|
||||
UINT16 DeviceId;
|
||||
UINT16 Reserved0;
|
||||
UINT16 Length;
|
||||
UINT8 Revision;
|
||||
UINT8 ClassCode[3];
|
||||
UINT16 ImageLength;
|
||||
UINT16 CodeRevision;
|
||||
UINT8 CodeType;
|
||||
UINT8 Indicator;
|
||||
UINT16 Reserved1;
|
||||
} PCI_DATA_STRUCTURE;
|
||||
|
||||
//
|
||||
// PCI Capability List IDs and records
|
||||
//
|
||||
#define EFI_PCI_CAPABILITY_ID_PMI 0x01
|
||||
#define EFI_PCI_CAPABILITY_ID_AGP 0x02
|
||||
#define EFI_PCI_CAPABILITY_ID_VPD 0x03
|
||||
#define EFI_PCI_CAPABILITY_ID_SLOTID 0x04
|
||||
#define EFI_PCI_CAPABILITY_ID_MSI 0x05
|
||||
#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06
|
||||
#define EFI_PCI_CAPABILITY_ID_PCIX 0x07
|
||||
|
||||
typedef struct {
|
||||
UINT8 CapabilityID;
|
||||
UINT8 NextItemPtr;
|
||||
} EFI_PCI_CAPABILITY_HDR;
|
||||
|
||||
//
|
||||
// Capability EFI_PCI_CAPABILITY_ID_PMI
|
||||
//
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT16 PMC;
|
||||
UINT16 PMCSR;
|
||||
UINT8 BridgeExtention;
|
||||
UINT8 Data;
|
||||
} EFI_PCI_CAPABILITY_PMI;
|
||||
|
||||
//
|
||||
// Capability EFI_PCI_CAPABILITY_ID_AGP
|
||||
//
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT8 Rev;
|
||||
UINT8 Reserved;
|
||||
UINT32 Status;
|
||||
UINT32 Command;
|
||||
} EFI_PCI_CAPABILITY_AGP;
|
||||
|
||||
//
|
||||
// Capability EFI_PCI_CAPABILITY_ID_VPD
|
||||
//
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT16 AddrReg;
|
||||
UINT32 DataReg;
|
||||
} EFI_PCI_CAPABILITY_VPD;
|
||||
|
||||
//
|
||||
// Capability EFI_PCI_CAPABILITY_ID_SLOTID
|
||||
//
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT8 ExpnsSlotReg;
|
||||
UINT8 ChassisNo;
|
||||
} EFI_PCI_CAPABILITY_SLOTID;
|
||||
|
||||
//
|
||||
// Capability EFI_PCI_CAPABILITY_ID_MSI
|
||||
//
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT16 MsgCtrlReg;
|
||||
UINT32 MsgAddrReg;
|
||||
UINT16 MsgDataReg;
|
||||
} EFI_PCI_CAPABILITY_MSI32;
|
||||
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT16 MsgCtrlReg;
|
||||
UINT32 MsgAddrRegLsdw;
|
||||
UINT32 MsgAddrRegMsdw;
|
||||
UINT16 MsgDataReg;
|
||||
} EFI_PCI_CAPABILITY_MSI64;
|
||||
|
||||
//
|
||||
// Capability EFI_PCI_CAPABILITY_ID_HOTPLUG
|
||||
//
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
//
|
||||
// not finished - fields need to go here
|
||||
//
|
||||
} EFI_PCI_CAPABILITY_HOTPLUG;
|
||||
|
||||
//
|
||||
// Capability EFI_PCI_CAPABILITY_ID_PCIX
|
||||
//
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT16 CommandReg;
|
||||
UINT32 StatusReg;
|
||||
} EFI_PCI_CAPABILITY_PCIX;
|
||||
|
||||
typedef struct {
|
||||
EFI_PCI_CAPABILITY_HDR Hdr;
|
||||
UINT16 SecStatusReg;
|
||||
UINT32 StatusReg;
|
||||
UINT32 SplitTransCtrlRegUp;
|
||||
UINT32 SplitTransCtrlRegDn;
|
||||
} EFI_PCI_CAPABILITY_PCIX_BRDG;
|
||||
|
||||
#define DEVICE_ID_NOCARE 0xFFFF
|
||||
|
||||
#define PCI_ACPI_UNUSED 0
|
||||
#define PCI_BAR_NOCHANGE 0
|
||||
#define PCI_BAR_OLD_ALIGN 0xFFFFFFFFFFFFFFFFULL
|
||||
#define PCI_BAR_EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL
|
||||
#define PCI_BAR_SQUAD_ALIGN 0xFFFFFFFFFFFFFFFDULL
|
||||
#define PCI_BAR_DQUAD_ALIGN 0xFFFFFFFFFFFFFFFCULL
|
||||
|
||||
#define PCI_BAR_IDX0 0x00
|
||||
#define PCI_BAR_IDX1 0x01
|
||||
#define PCI_BAR_IDX2 0x02
|
||||
#define PCI_BAR_IDX3 0x03
|
||||
#define PCI_BAR_IDX4 0x04
|
||||
#define PCI_BAR_IDX5 0x05
|
||||
#define PCI_BAR_ALL 0xFF
|
||||
|
||||
#pragma pack(pop)
|
||||
|
||||
//
|
||||
// NOTE: The following header files are included here for
|
||||
// compatibility consideration.
|
||||
//
|
||||
#include "pci23.h"
|
||||
#include "pci30.h"
|
||||
#include "EfiPci.h"
|
||||
|
||||
#endif
|
26
BaseTools/Source/C/Include/IndustryStandard/pci23.h
Normal file
26
BaseTools/Source/C/Include/IndustryStandard/pci23.h
Normal file
@@ -0,0 +1,26 @@
|
||||
/** @file
|
||||
Support for PCI 2.3 standard.
|
||||
|
||||
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: pci23.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _PCI23_H
|
||||
#define _PCI23_H
|
||||
|
||||
//#include "pci22.h"
|
||||
|
||||
#define PCI_EXP_MAX_CONFIG_OFFSET 0x1000
|
||||
#define EFI_PCI_CAPABILITY_ID_PCIEXP 0x10
|
||||
|
||||
#endif
|
46
BaseTools/Source/C/Include/IndustryStandard/pci30.h
Normal file
46
BaseTools/Source/C/Include/IndustryStandard/pci30.h
Normal file
@@ -0,0 +1,46 @@
|
||||
/** @file
|
||||
Support for PCI 3.0 standard.
|
||||
|
||||
Copyright (c) 2006 - 2008, Intel Corporation All rights reserved.
|
||||
|
||||
This program and the accompanying materials are licensed and made available
|
||||
under the terms and conditions of the BSD License which accompanies this
|
||||
distribution. The full text of the license may be found at:
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
File Name: pci30.h
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _PCI30_H
|
||||
#define _PCI30_H
|
||||
|
||||
//#include "pci23.h"
|
||||
|
||||
#define PCI_CLASS_MASS_STORAGE_SATADPA 0x06
|
||||
|
||||
#pragma pack(push, 1)
|
||||
|
||||
typedef struct {
|
||||
UINT32 Signature; // "PCIR"
|
||||
UINT16 VendorId;
|
||||
UINT16 DeviceId;
|
||||
UINT16 DeviceListOffset;
|
||||
UINT16 Length;
|
||||
UINT8 Revision;
|
||||
UINT8 ClassCode[3];
|
||||
UINT16 ImageLength;
|
||||
UINT16 CodeRevision;
|
||||
UINT8 CodeType;
|
||||
UINT8 Indicator;
|
||||
UINT16 MaxRuntimeImageLength;
|
||||
UINT16 ConfigUtilityCodeHeaderOffset;
|
||||
UINT16 DMTFCLPEntryPointOffset;
|
||||
} PCI_3_0_DATA_STRUCTURE;
|
||||
|
||||
#pragma pack(pop)
|
||||
|
||||
#endif
|
Reference in New Issue
Block a user