sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ArmPkg/ArmGicLib: Replaced 'ArmGicAcknowledgeSgiFrom' by 'ArmGicAcknowledgeInterrupt'

Browse Source 
The function 'ArmGicAcknowledgeSgiFrom' was actually acknowledging Interrupts (and not only SGIs).


ArmPkg/ArmGicLib: Introduced the PCD PcdGicPrimaryCoreId

This PCD defines the Id of the primary core in the GIC.


Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13259 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2012-05-02 20:09:16 +00:00
parent 4c19ece32a
commit 315649cda2
8 changed files with 65 additions and 55 deletions
Download Patch File Download Diff File Expand all files Collapse all files

56
ArmPkg/Drivers/PL390Gic/PL390Gic.c
View File

@@ -38,45 +38,33 @@ ArmGicSendSgiTo (
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
}
UINT32
RETURN_STATUS
EFIAPI
ArmGicAcknowledgeSgiFrom (
IN INTN GicInterruptInterfaceBase,
IN INTN CoreId
ArmGicAcknowledgeInterrupt (
IN UINTN GicDistributorBase,
IN UINTN GicInterruptInterfaceBase,
OUT UINTN *CoreId,
OUT UINTN *InterruptId
)
{
INTN InterruptId;
UINT32 Interrupt;
InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
// Read the Interrupt Acknowledge Register
Interrupt = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
// Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
if ((((CoreId & 0x7) << 10) | PcdGet32(PcdGicSgiIntId)) == InterruptId) {
// Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
return 1;
// Check if it is a valid interrupt ID
if ((Interrupt & 0x3FF) < ArmGicGetMaxNumInterrupts (GicDistributorBase)) {
// Got a valid SGI number hence signal End of Interrupt by writing to ICCEOIR
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Interrupt);
if (CoreId) {
*CoreId = (Interrupt >> 10) & 0x7;
}
if (InterruptId) {
*InterruptId = Interrupt & 0x3FF;
}
return RETURN_SUCCESS;
} else {
return 0;
}
}
UINT32
EFIAPI
ArmGicAcknowledgeSgi2From (
IN INTN GicInterruptInterfaceBase,
IN INTN CoreId,
IN INTN SgiId
)
{
INTN InterruptId;
InterruptId = MmioRead32(GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
// Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {
// Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
return 1;
} else {
return 0;
return RETURN_INVALID_PARAMETER;
}
}