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IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114

1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD pointer
  respectively in TempRamInitApi in IA32 FspSecCoreT.
2.Correct inappropriate description in the return value of
  AsmGetFspInfoHeader.
3.Replace hardcoded offset value 0x1C with FSP_HEADER_IMGBASE_OFFSET in
  FspHeler.nasm.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Chinni B Duggapu <chinni.b.duggapu@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Kuo, Ted
2022-11-09 03:30:57 -08:00
committed by mergify[bot]
parent c8fb724046
commit 3182843f3b
5 changed files with 66 additions and 57 deletions
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4
IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
View File

@@ -7,6 +7,8 @@
SECTION .text
FSP_HEADER_IMGBASE_OFFSET EQU 1Ch
global ASM_PFX(FspInfoHeaderRelativeOff)
ASM_PFX(FspInfoHeaderRelativeOff):
DD 0x12345678 ; This value must be patched by the build script
@@ -14,7 +16,7 @@ ASM_PFX(FspInfoHeaderRelativeOff):
global ASM_PFX(AsmGetFspBaseAddress)
ASM_PFX(AsmGetFspBaseAddress):
call ASM_PFX(AsmGetFspInfoHeader)
add eax, 0x1C
add eax, FSP_HEADER_IMGBASE_OFFSET
mov eax, dword [eax]
ret