ARM Packages: Removed trailing spaces
Trailing spaces create issue/warning when generating/applying patches. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ronald Cron <ronald.cron@arm.com> Reviewed-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
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3402aac7d9
@@ -3,7 +3,7 @@
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Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@@ -42,9 +42,9 @@ GetImageName (
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);
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/**
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Convert the Current Program Status Register (CPSR) to a string. The string is
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a defacto standard in the ARM world.
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Convert the Current Program Status Register (CPSR) to a string. The string is
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a defacto standard in the ARM world.
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It is possible to add extra bits by adding them to CpsrChar array.
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@param Cpsr ARM CPSR register value
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@@ -73,7 +73,7 @@ CpsrString (
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{ 5, 't' },
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{ 0, '?' }
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};
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Str = ReturnStr;
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for (Index = 0; CpsrChar[Index].BIT != 0; Index++, Str++) {
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@@ -83,10 +83,10 @@ CpsrString (
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*Str &= ~0x20;
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}
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}
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*Str++ = '_';
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*Str = '\0';
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switch (Cpsr & 0x1f) {
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case 0x10:
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ModeStr = "usr";
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@@ -112,15 +112,15 @@ CpsrString (
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case 0x1f:
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ModeStr = "sys";
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break;
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default:
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ModeStr = "???";
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break;
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}
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AsciiStrCat (Str, ModeStr);
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return;
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}
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}
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CHAR8 *
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FaultStatusToString (
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@@ -164,7 +164,7 @@ STATIC CHAR8 *gExceptionTypeString[] = {
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/**
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This is the default action to take on an unexpected exception
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Since this is exception context don't do anything crazy like try to allcoate memory.
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@param ExceptionType Type of the exception
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@@ -198,31 +198,31 @@ DefaultExceptionHandler (
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CHAR8 Buffer[80];
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UINT8 *DisAsm;
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UINT32 ItBlock;
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CpsrString (SystemContext.SystemContextArm->CPSR, CpsrStr);
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DEBUG ((EFI_D_ERROR, "%a\n", CpsrStr));
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Pdb = GetImageName (SystemContext.SystemContextArm->PC, &ImageBase, &PeCoffSizeOfHeader);
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Offset = SystemContext.SystemContextArm->PC - ImageBase;
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if (Pdb != NULL) {
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DEBUG ((EFI_D_ERROR, "%a\n", Pdb));
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//
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// A PE/COFF image loads its headers into memory so the headers are
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// A PE/COFF image loads its headers into memory so the headers are
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// included in the linked addresses. ELF and Mach-O images do not
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// include the headers so the first byte of the image is usually
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// text (code). If you look at link maps from ELF or Mach-O images
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// you need to subtract out the size of the PE/COFF header to get
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// get the offset that matches the link map.
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// get the offset that matches the link map.
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//
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DEBUG ((EFI_D_ERROR, "loaded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));
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// If we come from an image it is safe to show the instruction. We know it should not fault
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DisAsm = (UINT8 *)(UINTN)SystemContext.SystemContextArm->PC;
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ItBlock = 0;
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DisassembleInstruction (&DisAsm, (SystemContext.SystemContextArm->CPSR & BIT5) == BIT5, TRUE, &ItBlock, Buffer, sizeof (Buffer));
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DEBUG ((EFI_D_ERROR, "\n%a", Buffer));
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switch (ExceptionType) {
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case EXCEPT_ARM_UNDEFINED_INSTRUCTION:
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case EXCEPT_ARM_SOFTWARE_INTERRUPT:
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@@ -231,7 +231,7 @@ DefaultExceptionHandler (
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// advance PC past the faulting instruction
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PcAdjust = (UINTN)DisAsm - SystemContext.SystemContextArm->PC;
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break;
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default:
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break;
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}
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@@ -258,11 +258,11 @@ DefaultExceptionHandler (
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DEBUG ((EFI_D_ERROR, "\n"));
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ASSERT (FALSE);
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// Clear the error registers that we have already displayed incase some one wants to keep going
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SystemContext.SystemContextArm->DFSR = 0;
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SystemContext.SystemContextArm->IFSR = 0;
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// If some one is stepping past the exception handler adjust the PC to point to the next instruction
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// If some one is stepping past the exception handler adjust the PC to point to the next instruction
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SystemContext.SystemContextArm->PC += PcAdjust;
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}
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