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ARM Packages: Removed trailing spaces

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Trailing spaces create issue/warning when generating/applying patches.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ronald Cron
2014-08-19 13:29:52 +00:00
committed by oliviermartin
parent 62d441fb17
commit 3402aac7d9
554 changed files with 6333 additions and 6345 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
ArmPlatformPkg/Sec/Arm/Helper.S
View File

@@ -1,18 +1,18 @@
#========================================================================================
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#=======================================================================================
#start of the code section
.text
.text
.align 3
GCC_ASM_EXPORT(return_from_exception)
@@ -36,7 +36,7 @@ ASM_PFX(enter_monitor_mode):
mov sp, r3 @ Set the stack of the Monitor Mode
mov lr, r0 @ Use the pass entrypoint as lr
msr spsr_cxsf, r4 @ Use saved mode for the MOVS jump to the kernel
mov r4, r0 @ Swap EntryPoint and MpId registers
@@ -80,5 +80,5 @@ ASM_PFX(set_non_secure_mode):
isb
pop { r1 }
bx lr @ return (hopefully thumb-safe!)
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

20
ArmPlatformPkg/Sec/Arm/Helper.asm
View File

@@ -1,13 +1,13 @@
//
// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//
@@ -15,7 +15,7 @@
EXPORT enter_monitor_mode
EXPORT copy_cpsr_into_spsr
EXPORT set_non_secure_mode
AREA Helper, CODE, READONLY
// r0: Monitor World EntryPoint
@@ -34,7 +34,7 @@ enter_monitor_mode FUNCTION
mov sp, r3 // Set the stack of the Monitor Mode
mov lr, r0 // Use the pass entrypoint as lr
msr spsr_cxsf, r4 // Use saved mode for the MOVS jump to the kernel
mov r4, r0 // Swap EntryPoint and MpId registers
@@ -75,5 +75,5 @@ set_non_secure_mode
dead
B dead
END

26
ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
View File

@@ -1,13 +1,13 @@
//
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//
@@ -49,13 +49,13 @@ _IdentifyCpu:
bl ASM_PFX(ArmReadMpidr)
// Keep a copy of the MpId register value
mov r9, r0
// Is it the Primary Core ?
bl ASM_PFX(ArmPlatformIsPrimaryCore)
cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
_WaitInitMem:
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
// Otherwise we have to wait the Primary Core to finish the initialization
@@ -66,7 +66,7 @@ _WaitInitMem:
bl ASM_PFX(ArmCallWFE)
// Now the Init Mem is initialized, we setup the secondary core stacks
b _SetupSecondaryCoreStack
_InitMem:
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
cmp r10, #ARM_SEC_COLD_BOOT
@@ -74,7 +74,7 @@ _InitMem:
// Initialize Init Boot Memory
bl ASM_PFX(ArmPlatformSecBootMemoryInit)
_SetupPrimaryCoreStack:
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
@@ -110,13 +110,13 @@ _PrepareArguments:
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr r3, StartupAddr
// Jump to SEC C code
// r0 = mp_id
// r1 = Boot Mode
mov r0, r9
mov r1, r10
blx r3
_NeverReturn:
b _NeverReturn

32
ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
View File

@@ -1,13 +1,13 @@
//
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//
@@ -16,7 +16,7 @@
#include "SecInternal.h"
INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmPlatformGetCorePosition
@@ -30,7 +30,7 @@
PRESERVE8
AREA SecEntryPoint, CODE, READONLY
StartupAddr DCD CEntryPoint
_ModuleEntryPoint FUNCTION
@@ -46,18 +46,18 @@ _ModuleEntryPoint FUNCTION
// Jump to Platform Specific Boot Action function
blx ArmPlatformSecBootAction
_IdentifyCpu
_IdentifyCpu
// Identify CPU ID
bl ArmReadMpidr
// Keep a copy of the MpId register value
mov r9, r0
// Is it the Primary Core ?
bl ArmPlatformIsPrimaryCore
cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
_WaitInitMem
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
// Otherwise we have to wait the Primary Core to finish the initialization
@@ -68,7 +68,7 @@ _WaitInitMem
bl ArmCallWFE
// Now the Init Mem is initialized, we setup the secondary core stacks
b _SetupSecondaryCoreStack
_InitMem
// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
cmp r10, #ARM_SEC_COLD_BOOT
@@ -76,7 +76,7 @@ _InitMem
// Initialize Init Boot Memory
bl ArmPlatformSecBootMemoryInit
_SetupPrimaryCoreStack
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
@@ -112,7 +112,7 @@ _PrepareArguments
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr r3, StartupAddr
// Jump to SEC C code
// r0 = mp_id
// r1 = Boot Mode
@@ -120,7 +120,7 @@ _PrepareArguments
mov r1, r10
blx r3
ENDFUNC
_NeverReturn
b _NeverReturn
END

36
ArmPlatformPkg/Sec/Sec.inf
View File

@@ -1,16 +1,16 @@
#/** @file
# SEC - Reset vector code that jumps to C and starts the PEI phase
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
@@ -29,7 +29,7 @@
Arm/Helper.S | GCC
Arm/SecEntryPoint.S | GCC
Arm/SecEntryPoint.asm | RVCT
[Sources.AARCH64]
AArch64/Arch.c
AArch64/Helper.S
@@ -54,19 +54,19 @@
ArmGicLib
PrintLib
SerialPortLib
[FixedPcd.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
gArmTokenSpaceGuid.PcdTrustzoneSupport
gArmTokenSpaceGuid.PcdVFPEnabled
gArmTokenSpaceGuid.PcdArmScr
gArmTokenSpaceGuid.PcdArmNonSecModeTransition
gArmTokenSpaceGuid.PcdSecureFvBaseAddress
gArmTokenSpaceGuid.PcdSecureFvSize
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
@@ -74,11 +74,11 @@
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize
gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize
[FixedPcd.ARM]
gArmTokenSpaceGuid.PcdArmNsacr