ARM Packages: Removed trailing spaces

Trailing spaces create issue/warning when generating/applying patches.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ronald Cron
2014-08-19 13:29:52 +00:00
committed by oliviermartin
parent 62d441fb17
commit 3402aac7d9
554 changed files with 6333 additions and 6345 deletions

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@@ -1,7 +1,7 @@
/** @file
Abstractions for simple OMAP DMA.
OMAP_DMA4 structure elements are described in the OMAP35xx TRM.
Abstractions for simple OMAP DMA.
OMAP_DMA4 structure elements are described in the OMAP35xx TRM.
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
@@ -46,16 +46,16 @@ typedef struct {
} OMAP_DMA4;
/**
/**
Configure OMAP DMA Channel
@param Channel DMA Channel to configure
@param Dma4 Pointer to structure used to initialize DMA registers for the Channel
@param Dma4 Pointer to structure used to initialize DMA registers for the Channel
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
@retval EFI_INVALID_PARAMETER Channel is not valid
@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
**/
EFI_STATUS
EFIAPI
@@ -64,17 +64,17 @@ EnableDmaChannel (
IN OMAP_DMA4 *Dma4
);
/**
/**
Turn of DMA channel configured by EnableDma().
@param Channel DMA Channel to configure
@param SuccesMask Bits in DMA4_CSR register indicate EFI_SUCCESS
@param ErrorMask Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR
@retval EFI_SUCCESS DMA hardware disabled
@retval EFI_INVALID_PARAMETER Channel is not valid
@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
**/
EFI_STATUS
EFIAPI
@@ -86,5 +86,5 @@ DisableDmaChannel (
#endif
#endif

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@@ -15,13 +15,13 @@
#ifndef __OMAPLIB_H__
#define __OMAPLIB_H__
UINT32
UINT32
EFIAPI
GpioBase (
IN UINTN Port
);
UINT32
UINT32
EFIAPI
TimerBase (
IN UINTN Timer

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@@ -56,9 +56,9 @@
#define DMA4_CSDP_BURST_EN32 (0x2 << 14)
#define DMA4_CSDP_BURST_EN64 (0x3 << 14)
#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
#define DMA4_CSDP_WRITE_MODE_POSTED (0x1 << 16)
#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
#define DMA4_CSDP_DST_ENDIAN_LOCK_LOCK BIT18
#define DMA4_CSDP_DST_ENDIAN_LOCK_ADAPT 0
@@ -72,7 +72,7 @@
#define DMA4_CSDP_SRC_ENDIAN_BIG BIT21
#define DMA4_CSDP_SRC_ENDIAN_LITTLE 0
// Channel Control
// Channel Control
#define DMA4_CCR_SYNCHRO_CONTROL_MASK 0x1f
#define DMA4_CCR_FS_ELEMENT (0 | 0)
@@ -104,7 +104,7 @@
#define DMA4_CCR_CONST_FILL_ENABLE BIT16
#define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17
#define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE BIT24
#define DMA4_CSR_DROP BIT1
@@ -126,5 +126,5 @@
#define DMA4_CICR_ENABLE_ALL 0x1FBE
#endif
#endif

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@@ -66,7 +66,7 @@
#define RSP_TYPE_48BITS (0x2UL << 16)
#define CCCE_ENABLE BIT19
#define CICE_ENABLE BIT20
#define DP_ENABLE BIT21
#define DP_ENABLE BIT21
#define INDX(CMD_INDX) ((CMD_INDX & 0x3F) << 24)
#define MMCHS_RSP10 (MMCHS1BASE + 0x110)

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@@ -69,7 +69,7 @@
#define CM_CLKSEL_PLL_MULT(x) (((x) & 0x07FF) << 8)
#define CM_CLKSEL_PLL_DIV(x) ((((x) - 1) & 0x7F) << 0)
#define CM_CLKSEL_DIV_120M(x) (((x) & 0x1F) << 0)
#define CM_FCLKEN_USBHOST_EN_USBHOST2_MASK BIT1

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@@ -30,7 +30,7 @@
#define VMMC1_DEV_GRP 0x82
#define DEV_GRP_P1 BIT5
#define VMMC1_DEDICATED_REG 0x85
#define VMMC1_DEDICATED_REG 0x85
#define VSEL_1_85V 0x0
#define VSEL_2_85V 0x1
#define VSEL_3_00V 0x2