UefiCpuPkg:Remove code to wakeup AP and relocate ap

After the code to load mtrr setting, set register table,
handle APIC setting and Interrupt after INIT-SIPI-SIPI
is moved, the InitializeCpuProcedure() only contains
following code logic:
1.Bsp runs ExecuteFirstSmiInit().
2.Bsp transfers AP to safe hlt-loop

During S3 boot, since APs will be relocated to new safe
buffer by the callback of gEdkiiEndOfS3ResumeGuid in
PeiMpLib, Bsp doesn't need to transfer AP to safe hlt-loop
any more. SmmRestoreCpu() in CpuS3 only needs to runs the
ExecuteFirstSmiInit() on BSP. So remove code to wakeup
AP by INIT-SIPI-SIPI and remove code to relocate ap to
safe hlt-loop.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
This commit is contained in:
Dun Tan
2024-05-10 15:10:00 +08:00
committed by mergify[bot]
parent 525578bdd5
commit 341ee5c31b
6 changed files with 12 additions and 686 deletions

View File

@@ -1,153 +0,0 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
;
; MpFuncs.nasm
;
; Abstract:
;
; This is the assembly code for Multi-processor S3 support
;
;-------------------------------------------------------------------------------
SECTION .text
extern ASM_PFX(InitializeFloatingPointUnits)
%define VacantFlag 0x0
%define NotVacantFlag 0xff
%define LockLocation RendezvousFunnelProcEnd - RendezvousFunnelProcStart
%define StackStart LockLocation + 0x4
%define StackSize LockLocation + 0x8
%define RendezvousProc LockLocation + 0xC
%define GdtrProfile LockLocation + 0x10
%define IdtrProfile LockLocation + 0x16
%define BufferStart LockLocation + 0x1C
;-------------------------------------------------------------------------------------
;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
;procedure serializes all the AP processors through an Init sequence. It must be
;noted that APs arrive here very raw...ie: real mode, no stack.
;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
;IS IN MACHINE CODE.
;-------------------------------------------------------------------------------------
;RendezvousFunnelProc (&WakeUpBuffer,MemAddress);
BITS 16
global ASM_PFX(RendezvousFunnelProc)
ASM_PFX(RendezvousFunnelProc):
RendezvousFunnelProcStart:
; At this point CS = 0x(vv00) and ip= 0x0.
mov ax, cs
mov ds, ax
mov es, ax
mov ss, ax
xor ax, ax
mov fs, ax
mov gs, ax
flat32Start:
mov si, BufferStart
mov edx,dword [si] ; EDX is keeping the start address of wakeup buffer
mov si, GdtrProfile
o32 lgdt [cs:si]
mov si, IdtrProfile
o32 lidt [cs:si]
xor ax, ax
mov ds, ax
mov eax, cr0 ; Get control register 0
or eax, 0x000000001 ; Set PE bit (bit #0)
mov cr0, eax
FLAT32_JUMP:
a32 jmp dword 0x20:0x0
BITS 32
PMODE_ENTRY: ; protected mode entry point
mov ax, 0x8
o16 mov ds, ax
o16 mov es, ax
o16 mov fs, ax
o16 mov gs, ax
o16 mov ss, ax ; Flat mode setup.
mov esi, edx
mov edi, esi
add edi, LockLocation
mov al, NotVacantFlag
TestLock:
xchg byte [edi], al
cmp al, NotVacantFlag
jz TestLock
ProgramStack:
mov edi, esi
add edi, StackSize
mov eax, dword [edi]
mov edi, esi
add edi, StackStart
add eax, dword [edi]
mov esp, eax
mov dword [edi], eax
Releaselock:
mov al, VacantFlag
mov edi, esi
add edi, LockLocation
xchg byte [edi], al
;
; Call assembly function to initialize FPU.
;
mov ebx, ASM_PFX(InitializeFloatingPointUnits)
call ebx
;
; Call C Function
;
mov edi, esi
add edi, RendezvousProc
mov eax, dword [edi]
test eax, eax
jz GoToSleep
call eax ; Call C function
GoToSleep:
cli
hlt
jmp $-2
RendezvousFunnelProcEnd:
;-------------------------------------------------------------------------------------
; AsmGetAddressMap (&AddressMap);
;-------------------------------------------------------------------------------------
global ASM_PFX(AsmGetAddressMap)
ASM_PFX(AsmGetAddressMap):
pushad
mov ebp,esp
mov ebx, dword [ebp+0x24]
mov dword [ebx], RendezvousFunnelProcStart
mov dword [ebx+0x4], PMODE_ENTRY - RendezvousFunnelProcStart
mov dword [ebx+0x8], FLAT32_JUMP - RendezvousFunnelProcStart
mov dword [ebx+0xc], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
popad
ret

View File

@@ -1,7 +1,7 @@
/** @file
SMM CPU misc functions for Ia32 arch specific.
Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015 - 2024, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -141,33 +141,6 @@ InitGdt (
return GdtTssTables;
}
/**
Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
@param[in] ApHltLoopCode The address of the safe hlt-loop function.
@param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
@param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
**/
VOID
TransferApToSafeState (
IN UINTN ApHltLoopCode,
IN UINTN TopOfStack,
IN UINTN NumberToFinishAddress
)
{
SwitchStack (
(SWITCH_STACK_ENTRY_POINT)ApHltLoopCode,
(VOID *)NumberToFinishAddress,
NULL,
(VOID *)TopOfStack
);
//
// It should never reach here
//
ASSERT (FALSE);
}
/**
Initialize the shadow stack related data structure.