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Minor grammatical work--mostly adding periods. Sending separately a list of files missing Doxygen @param and @return information.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10572 6f19259b-4bc3-4df7-8a09-765794883524
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myronporter
2010-06-11 00:02:51 +00:00
parent 63c89e0468
commit 35a1715411
100 changed files with 271 additions and 271 deletions
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22
MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
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@@ -5,7 +5,7 @@
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@@ -42,7 +42,7 @@ InvalidateInstructionCache (
aligned on a cache line boundary, then the entire instruction cache line
containing Address + Length -1 is invalidated. This function may choose to
invalidate the entire instruction cache if that is more efficient than
invalidating the specified range. If Length is 0, the no instruction cache
invalidating the specified range. If Length is 0, then no instruction cache
lines are invalidated. Address is returned.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@@ -68,10 +68,10 @@ InvalidateInstructionCacheRange (
}
/**
Writes Back and Invalidates the entire data cache in cache coherency domain
Writes back and invalidates the entire data cache in cache coherency domain
of the calling CPU.
Writes Back and Invalidates the entire data cache in cache coherency domain
Writes back and invalidates the entire data cache in cache coherency domain
of the calling CPU. This function guarantees that all dirty cache lines are
written back to system memory, and also invalidates all the data cache lines
in the cache coherency domain of the calling CPU.
@@ -87,17 +87,17 @@ WriteBackInvalidateDataCache (
}
/**
Writes Back and Invalidates a range of data cache lines in the cache
Writes back and invalidates a range of data cache lines in the cache
coherency domain of the calling CPU.
Writes Back and Invalidate the data cache lines specified by Address and
Writes back and invalidates the data cache lines specified by Address and
Length. If Address is not aligned on a cache line boundary, then entire data
cache line containing Address is written back and invalidated. If Address +
Length is not aligned on a cache line boundary, then the entire data cache
line containing Address + Length -1 is written back and invalidated. This
function may choose to write back and invalidate the entire data cache if
that is more efficient than writing back and invalidating the specified
range. If Length is 0, the no data cache lines are written back and
range. If Length is 0, then no data cache lines are written back and
invalidated. Address is returned.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@@ -151,7 +151,7 @@ WriteBackDataCache (
cache line boundary, then the entire data cache line containing Address +
Length -1 is written back. This function may choose to write back the entire
data cache if that is more efficient than writing back the specified range.
If Length is 0, the no data cache lines are written back. This function may
If Length is 0, then no data cache lines are written back. This function may
also invalidate all the data cache lines in the specified range of the cache
coherency domain of the calling CPU. Address is returned.
@@ -194,8 +194,8 @@ InvalidateDataCache (
)
{
//
// Invalidation of entire data cache without writing back is not supported on
// IPF architecture, so write back and invalidate operation is performed.
// Invalidation of the entire data cache without writing back is not supported
// on IPF architecture, so a write back and invalidate operation is performed.
//
WriteBackInvalidateDataCache ();
}
@@ -209,7 +209,7 @@ InvalidateDataCache (
containing Address is invalidated. If Address + Length is not aligned on a
cache line boundary, then the entire data cache line containing Address +
Length -1 is invalidated. This function must never invalidate any cache lines
outside the specified range. If Length is 0, the no data cache lines are
outside the specified range. If Length is 0, then no data cache lines are
invalidated. Address is returned. This function must be used with care
because dirty cache lines are not written back to system memory. It is
typically used for cache diagnostics. If the CPU does not support