PcAtChipsetPkg/PcRtc: Add two new PCD for RTC Index/Target registers

In certain HW implementation, the BIT7 of RTC Index register(0x70) is
for NMI sources enable/disable but the BIT7 of 0x70 cannot be read
before writing. Software which doesn't want to change the NMI sources
enable/disable setting can write to the alias register 0x74, through
which only BIT0 ~ BIT6 of 0x70 is modified.
So two new PCDs are added so that platform can have the flexibility
to change the default RTC register addresses from 0x70/0x71 to
0x74/0x75.
With the new PCDs added, it can also support special HW that provides
RTC storage in a different register pairs.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

PcAtChipsetPkg/PcAtChipsetPkg.dec

@@ -4,7 +4,7 @@
 # This package is designed to public interfaces and implementation which follows
 # PcAt defacto standard.
 #
-# Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
 # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 #
 # This program and the accompanying materials
@@ -194,5 +194,13 @@
   # @Prompt Initial value for Register_D in RTC.
   gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0000001D
 
+  ## Specifies RTC Index Register address in I/O space.
+  # @Prompt RTC Index Register address
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x70|UINT8|0x0000001E
+
+  ## Specifies RTC Target Register address in I/O space.
+  # @Prompt RTC Target Register address
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F
+
 [UserExtensions.TianoCore."ExtraFiles"]
   PcAtChipsetPkgExtra.uni

PcAtChipsetPkg/PcAtChipsetPkg.uni

@@ -4,7 +4,7 @@
 // This package is designed to public interfaces and implementation which follows
 // PcAt defacto standard.
 //
-// Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
 //
 // This program and the accompanying materials
 // are licensed and made available under the terms and conditions of the BSD License
@@ -165,3 +165,9 @@
 
 #string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdInitialValueRtcRegisterD_PROMPT  #language en-US "Initial value for Register_D in RTC."
 #string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdInitialValueRtcRegisterD_HELP    #language en-US "Specifies the initial value for Register_D in RTC."
+
+#string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRtcIndexRegister_PROMPT          #language en-US "RTC Index Register address"
+#string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRtcIndexRegister_HELP            #language en-US "Specifies RTC Index Register address in I/O space."
+
+#string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRtcTargetRegister_PROMPT         #language en-US "RTC Target Register address"
+#string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRtcTargetRegister_HELP           #language en-US "Specifies RTC Target Register address in I/O space."

PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c

@@ -1,7 +1,7 @@
 /** @file
   RTC Architectural Protocol GUID as defined in DxeCis 0.96.
 
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 
 This program and the accompanying materials
@@ -72,8 +72,8 @@ RtcRead (
   IN  UINT8 Address
   )
 {
-  IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8) (Address | (UINT8) (IoRead8 (PCAT_RTC_ADDRESS_REGISTER) & 0x80)));
+  IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));
-  return IoRead8 (PCAT_RTC_DATA_REGISTER);
+  return IoRead8 (PcdGet8 (PcdRtcTargetRegister));
 }
 
 /**
@@ -90,8 +90,8 @@ RtcWrite (
   IN  UINT8   Data
   )
 {
-  IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8) (Address | (UINT8) (IoRead8 (PCAT_RTC_ADDRESS_REGISTER) & 0x80)));
+  IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));
-  IoWrite8 (PCAT_RTC_DATA_REGISTER, Data);
+  IoWrite8 (PcdGet8 (PcdRtcTargetRegister), Data);
 }
 
 /**

PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h

@@ -1,7 +1,7 @@
 /** @file
   Header file for real time clock driver.
 
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 
 This program and the accompanying materials
@@ -47,9 +47,6 @@ typedef struct {
 
 extern PC_RTC_MODULE_GLOBALS  mModuleGlobal;
 
-#define PCAT_RTC_ADDRESS_REGISTER 0x70
-#define PCAT_RTC_DATA_REGISTER    0x71
-
 //
 // Dallas DS12C887 Real Time Clock
 //

PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf

@@ -4,7 +4,7 @@
 # This driver provides GetTime, SetTime, GetWakeupTime, SetWakeupTime services to Runtime Service Table.
 # It will install a tagging protocol with gEfiRealTimeClockArchProtocolGuid.
 #
-# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
 # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 #
 # This program and the accompanying materials
@@ -77,6 +77,8 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout  ## CONSUMES
   gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear             ## CONSUMES
   gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear             ## CONSUMES
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister             ## CONSUMES
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister            ## CONSUMES
 
 [Depex]
   gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid