Add missing status code in several modules.
Signed-off-by: Li Elvin <elvin.li@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Ni Ruiyu <ruiyu.ni@intel.com> Reviewed-by: Gao Liming <liming.gao@intel.com> Reviewed-by: Tian Feng <feng.tian@intel.com> Reviewed-by: Fan Jeff <jeff.fan@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13890 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -8,7 +8,7 @@
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PCI Root Bridges. So it means platform needs install PCI Root Bridge IO protocol for each
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PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol.
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Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@@ -239,7 +239,8 @@ PciBusDriverBindingStart (
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IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
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)
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
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//
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// Check RemainingDevicePath validation
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@@ -285,6 +286,28 @@ PciBusDriverBindingStart (
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gFullEnumeration = (BOOLEAN) ((SearchHostBridgeHandle (Controller) ? FALSE : TRUE));
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//
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// Open Device Path Protocol for PCI root bridge
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//
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Status = gBS->OpenProtocol (
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Controller,
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&gEfiDevicePathProtocolGuid,
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(VOID **) &ParentDevicePath,
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This->DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_GET_PROTOCOL
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);
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ASSERT_EFI_ERROR (Status);
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//
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// Report Status Code to indicate PCI bus starts
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//
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REPORT_STATUS_CODE_WITH_DEVICE_PATH (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_PCI | EFI_IOB_PC_INIT),
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ParentDevicePath
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);
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//
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// Enumerate the entire host bridge
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// After enumeration, a database that records all the device information will be created
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