sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

MdeModulePkg AtaAtapiPassThru: Remove redundant functions

Browse Source 
The functions that are never called have been removed.
They are AhciCheckDeviceStatus,AhciPortReset,DRDYReady,
DRDYReady2,WaitForBSYClear2 and AtaSoftReset.
https://bugzilla.tianocore.org/show_bug.cgi?id=1062

v2: DRDYReady, DRDYReady2, WaitForBSYClear2 and AtaSoftReset
are added to the commit message.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
shenglei
2018-08-08 13:37:18 +08:00
committed by Star Zeng
parent 0629ae291a
commit 385fd1b846
2 changed files with 0 additions and 361 deletions
Download Patch File Download Diff File Expand all files Collapse all files

257
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
View File

@@ -627,146 +627,8 @@ DRQReady2 (
return EFI_TIMEOUT;
}
/**
This function is used to poll for the DRDY bit set in the Status Register. DRDY
bit is set when the device is ready to accept command. Most ATA commands must be
sent after DRDY set except the ATAPI Packet Command.
@param PciIo A pointer to EFI_PCI_IO_PROTOCOL data structure.
@param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
@param Timeout The time to complete the command, uses 100ns as a unit.
@retval EFI_SUCCESS DRDY bit set within the time out.
@retval EFI_TIMEOUT DRDY bit not set within the time out.
@note Read Status Register will clear interrupt status.
**/
EFI_STATUS
EFIAPI
DRDYReady (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN UINT64 Timeout
)
{
UINT64 Delay;
UINT8 StatusRegister;
UINT8 ErrorRegister;
BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
if (Timeout == 0) {
InfiniteWait = TRUE;
} else {
InfiniteWait = FALSE;
}
Delay = DivU64x32(Timeout, 1000) + 1;
do {
StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus);
//
// Wait for BSY == 0, then judge if DRDY is set or ERR is set
//
if ((StatusRegister & ATA_STSREG_BSY) == 0) {
if ((StatusRegister & ATA_STSREG_ERR) == ATA_STSREG_ERR) {
ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature);
if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
return EFI_ABORTED;
}
return EFI_DEVICE_ERROR;
}
if ((StatusRegister & ATA_STSREG_DRDY) == ATA_STSREG_DRDY) {
return EFI_SUCCESS;
} else {
return EFI_DEVICE_ERROR;
}
}
//
// Stall for 100 microseconds.
//
MicroSecondDelay (100);
Delay--;
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
}
/**
This function is used to poll for the DRDY bit set in the Alternate Status Register.
DRDY bit is set when the device is ready to accept command. Most ATA commands must
be sent after DRDY set except the ATAPI Packet Command.
@param PciIo A pointer to EFI_PCI_IO_PROTOCOL data structure.
@param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
@param Timeout The time to complete the command, uses 100ns as a unit.
@retval EFI_SUCCESS DRDY bit set within the time out.
@retval EFI_TIMEOUT DRDY bit not set within the time out.
@note Read Alternate Status Register will clear interrupt status.
**/
EFI_STATUS
EFIAPI
DRDYReady2 (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN UINT64 Timeout
)
{
UINT64 Delay;
UINT8 AltRegister;
UINT8 ErrorRegister;
BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
if (Timeout == 0) {
InfiniteWait = TRUE;
} else {
InfiniteWait = FALSE;
}
Delay = DivU64x32(Timeout, 1000) + 1;
do {
AltRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev);
//
// Wait for BSY == 0, then judge if DRDY is set or ERR is set
//
if ((AltRegister & ATA_STSREG_BSY) == 0) {
if ((AltRegister & ATA_STSREG_ERR) == ATA_STSREG_ERR) {
ErrorRegister = IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature);
if ((ErrorRegister & ATA_ERRREG_ABRT) == ATA_ERRREG_ABRT) {
return EFI_ABORTED;
}
return EFI_DEVICE_ERROR;
}
if ((AltRegister & ATA_STSREG_DRDY) == ATA_STSREG_DRDY) {
return EFI_SUCCESS;
} else {
return EFI_DEVICE_ERROR;
}
}
//
// Stall for 100 microseconds.
//
MicroSecondDelay (100);
Delay--;
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
}
/**
This function is used to poll for the BSY bit clear in the Status Register. BSY
@@ -822,59 +684,6 @@ WaitForBSYClear (
return EFI_TIMEOUT;
}
/**
This function is used to poll for the BSY bit clear in the Status Register. BSY
is clear when the device is not busy. Every command must be sent after device is not busy.
@param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
@param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
@param Timeout The time to complete the command, uses 100ns as a unit.
@retval EFI_SUCCESS BSY bit clear within the time out.
@retval EFI_TIMEOUT BSY bit not clear within the time out.
@note Read Status Register will clear interrupt status.
**/
EFI_STATUS
EFIAPI
WaitForBSYClear2 (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN UINT64 Timeout
)
{
UINT64 Delay;
UINT8 AltStatusRegister;
BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
if (Timeout == 0) {
InfiniteWait = TRUE;
} else {
InfiniteWait = FALSE;
}
Delay = DivU64x32(Timeout, 1000) + 1;
do {
AltStatusRegister = IdeReadPortB (PciIo, IdeRegisters->AltOrDev);
if ((AltStatusRegister & ATA_STSREG_BSY) == 0x00) {
return EFI_SUCCESS;
}
//
// Stall for 100 microseconds.
//
MicroSecondDelay (100);
Delay--;
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
}
/**
Get IDE i/o port registers' base addresses by mode.
@@ -1017,72 +826,6 @@ GetIdeRegisterIoAddr (
return EFI_SUCCESS;
}
/**
This function is used to implement the Soft Reset on the specified device. But,
the ATA Soft Reset mechanism is so strong a reset method that it will force
resetting on both devices connected to the same cable.
It is called by IdeBlkIoReset(), a interface function of Block
I/O protocol.
This function can also be used by the ATAPI device to perform reset when
ATAPI Reset command is failed.
@param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
@param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
@param Timeout The time to complete the command, uses 100ns as a unit.
@retval EFI_SUCCESS Soft reset completes successfully.
@retval EFI_DEVICE_ERROR Any step during the reset process is failed.
@note The registers initial values after ATA soft reset are different
to the ATA device and ATAPI device.
**/
EFI_STATUS
EFIAPI
AtaSoftReset (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN UINT64 Timeout
)
{
UINT8 DeviceControl;
DeviceControl = 0;
//
// disable Interrupt and set SRST bit to initiate soft reset
//
DeviceControl = ATA_CTLREG_SRST | ATA_CTLREG_IEN_L;
IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl);
//
// SRST should assert for at least 5 us, we use 10 us for
// better compatibility
//
MicroSecondDelay (10);
//
// Enable interrupt to support UDMA, and clear SRST bit
//
DeviceControl = 0;
IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl);
//
// Wait for at least 10 ms to check BSY status, we use 10 ms
// for better compatibility
//
MicroSecondDelay (10000);
//
// slave device needs at most 31ms to clear BSY
//
if (WaitForBSYClear (PciIo, IdeRegisters, Timeout) == EFI_TIMEOUT) {
return EFI_DEVICE_ERROR;
}
return EFI_SUCCESS;
}
/**
Send ATA Ext command into device with NON_DATA protocol.