diff --git a/DuetPkg/DxeIpl/X64/Paging.c b/DuetPkg/DxeIpl/X64/Paging.c
index 436537c42b..80c07bbe06 100644
--- a/DuetPkg/DxeIpl/X64/Paging.c
+++ b/DuetPkg/DxeIpl/X64/Paging.c
@@ -196,10 +196,10 @@ Description:
   VOID  *PageNumberBase;
 
   SizeOfMemorySpace -= EFI_2M_PAGE_BITS_NUM;
-  gPDEBitsNum        = MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM);
-  SizeOfMemorySpace  = SizeOfMemorySpace - gPDEBitsNum;
-  gPDPTEBitsNum      = MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM);
-  SizeOfMemorySpace  = SizeOfMemorySpace - gPDPTEBitsNum;
+  gPDEBitsNum        = (UINT8) MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM);
+  SizeOfMemorySpace  = (UINT8) (SizeOfMemorySpace - gPDEBitsNum);
+  gPDPTEBitsNum      = (UINT8) MIN (SizeOfMemorySpace, EFI_MAX_ENTRY_BITS_NUM);
+  SizeOfMemorySpace  = (UINT8) (SizeOfMemorySpace - gPDPTEBitsNum);
   gPML4BitsNum       = SizeOfMemorySpace;
   if (gPML4BitsNum > EFI_MAX_ENTRY_BITS_NUM) {
     return NULL;
diff --git a/DuetPkg/KbcResetDxe/Reset.c b/DuetPkg/KbcResetDxe/Reset.c
index b06c999842..45f4bc7170 100644
--- a/DuetPkg/KbcResetDxe/Reset.c
+++ b/DuetPkg/KbcResetDxe/Reset.c
@@ -26,7 +26,7 @@ KbcResetSystem (
   IN EFI_RESET_TYPE   ResetType,
   IN EFI_STATUS       ResetStatus,
   IN UINTN            DataSize,
-  IN CHAR16           *ResetData OPTIONAL
+  IN VOID             *ResetData OPTIONAL
   )
 /*++
 
diff --git a/DuetPkg/KbcResetDxe/Reset.h b/DuetPkg/KbcResetDxe/Reset.h
index 3777c331fb..3b70580a81 100644
--- a/DuetPkg/KbcResetDxe/Reset.h
+++ b/DuetPkg/KbcResetDxe/Reset.h
@@ -60,7 +60,7 @@ KbcResetSystem (
   IN EFI_RESET_TYPE   ResetType,
   IN EFI_STATUS       ResetStatus,
   IN UINTN            DataSize,
-  IN CHAR16           *ResetData OPTIONAL
+  IN VOID             *ResetData OPTIONAL
   )
 /*++
 
diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c
index f670dc6bd9..6003a58309 100644
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c
@@ -475,7 +475,7 @@ CheckForRom (
             Status = gBS->AllocatePool(
                             EfiBootServicesData,
                             ((UINT32)mPciOptionRomTable.PciOptionRomCount + 1) * sizeof(EFI_PCI_OPTION_ROM_DESCRIPTOR),
-                            &TempPciOptionRomDescriptors
+                            (VOID **) &TempPciOptionRomDescriptors
                             );
             if (mPciOptionRomTable.PciOptionRomCount > 0) {
               CopyMem(
@@ -553,7 +553,7 @@ SaveCommandRegister (
   //
   // Clear the memory enable bit
   //
-  Command = Context->CommandRegisterBuffer[Index] & (~0x02);
+  Command = (UINT16) (Context->CommandRegisterBuffer[Index] & (~0x02));
 
   IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address, 1, &Command);
 }
@@ -606,7 +606,7 @@ ScanPciRootBridgeForRoms(
     mPciOptionRomTableInstalled = TRUE;
   }
 
-  Status = IoDev->Configuration(IoDev, &Descriptors);
+  Status = IoDev->Configuration(IoDev, (VOID **) &Descriptors);
   if (EFI_ERROR (Status) || Descriptors == NULL) {
     return EFI_NOT_FOUND;
   }
@@ -677,7 +677,7 @@ ScanPciRootBridgeForRoms(
   Status = gBS->AllocatePool(
                   EfiBootServicesData,
                   sizeof(UINT16) * (MaxBus - MinBus + 1) * (PCI_MAX_DEVICE+1) * (PCI_MAX_FUNC+1),
-                  &Context.CommandRegisterBuffer
+                  (VOID **) &Context.CommandRegisterBuffer
                   );
 
   if (EFI_ERROR (Status)) {