IntelSiliconPkg IntelVTdDxe: Use TPL to protect list/engine operation
Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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@@ -48,6 +48,8 @@
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#define ALIGN_VALUE_UP(Value, Alignment) (((Value) + (Alignment) - 1) & (~((Alignment) - 1)))
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#define ALIGN_VALUE_LOW(Value, Alignment) ((Value) & (~((Alignment) - 1)))
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#define VTD_TPL_LEVEL TPL_NOTIFY
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//
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// This is the initial max PCI DATA number.
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// The number may be enlarged later.
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