ArmPkg: ArmLib: purge incorrect ArmDrainWriteBuffer () alias

In ArmLib, there exists an alias for ArmDataSynchronizationBarrier,
named after one of several names for the pre-ARMv6 cp15 operation that
was formalised into the Data Synchronization Barrier in ARMv6.

This alias is also the one called from within ArmLib, in preference of
the correct name. Through the power of code reuse, this name slipped
into the AArch64 variant as well.

Expunge it from the codebase.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18915 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c

@@ -33,7 +33,7 @@ AArch64DataCacheOperation (
 
   AArch64AllDataCachesOperation (DataCacheOperation);
 
-  ArmDrainWriteBuffer ();
+  ArmDataSynchronizationBarrier ();
 
   if (SavedInterruptState) {
     ArmEnableInterrupts ();
@@ -46,7 +46,7 @@ ArmInvalidateDataCache (
   VOID
   )
 {
-  ArmDrainWriteBuffer ();
+  ArmDataSynchronizationBarrier ();
   AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
 }
 
@@ -56,7 +56,7 @@ ArmCleanInvalidateDataCache (
   VOID
   )
 {
-  ArmDrainWriteBuffer ();
+  ArmDataSynchronizationBarrier ();
   AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
 }
 
@@ -66,6 +66,6 @@ ArmCleanDataCache (
   VOID
   )
 {
-  ArmDrainWriteBuffer ();
+  ArmDataSynchronizationBarrier ();
   AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
 }