Add dual FSP binaries support.
There are two FSP images at different locations in a flash (one factory version is read only and other in updatable version) TempRamInit, FspMemoryInit and TempRamExit are executed from factory version and FspSiliconInit/NotifyPhase will be executed from updatable version. Also update FSP specification version to v1.1. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17248 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -38,8 +38,9 @@ EXTERN FspApiCallingCheck:PROC
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; Following functions will be provided in PlatformSecLib
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;
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EXTERN GetFspBaseAddress:PROC
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EXTERN GetFspInfoHdr:PROC
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EXTERN GetBootFirmwareVolumeOffset:PROC
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EXTERN Pei2LoaderSwitchStack:PROC
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EXTERN Loader2PeiSwitchStack:PROC
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EXTERN LoadMicrocode(LoadMicrocodeDefault):PROC
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EXTERN SecPlatformInit(SecPlatformInitDefault):PROC
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EXTERN SecCarInit:PROC
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@@ -370,8 +371,7 @@ TempRamInitApi PROC NEAR PUBLIC
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jz NemInitExit
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;
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; CPUID/DeviceID check
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; and Sec Platform Init
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; Sec Platform Init
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;
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CALL_MMX SecPlatformInit
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cmp eax, 0
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@@ -505,7 +505,9 @@ FspApiCommon PROC C PUBLIC
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jz @F
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cmp eax, 3 ; FspMemoryInit API
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jz @F
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jmp Pei2LoaderSwitchStack
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call GetFspInfoHdr
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jmp Loader2PeiSwitchStack
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@@:
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;
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@@ -513,9 +515,17 @@ FspApiCommon PROC C PUBLIC
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;
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;
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; Store the address in FSP which will return control to the BL
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; Place holder to store the FspInfoHeader pointer
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;
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push offset exit
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push eax
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;
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; Update the FspInfoHeader pointer
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;
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push eax
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call GetFspInfoHdr
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mov [esp + 4], eax
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pop eax
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;
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; Create a Task Frame in the stack for the Boot Loader
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@@ -582,7 +592,7 @@ FspApiCommon PROC C PUBLIC
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; Pass Control into the PEI Core
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;
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call SecStartup
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add esp, 4
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exit:
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ret
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