Add dual FSP binaries support.

There are two FSP images at different locations in a flash (one factory version is read only and other in updatable version)
TempRamInit, FspMemoryInit and TempRamExit are executed from factory version and FspSiliconInit/NotifyPhase will be executed from updatable version.

Also update FSP specification version to v1.1.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17248 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ma, Maurice
2015-04-29 03:10:24 +00:00
committed by jyao1
parent 2bf87d82e9
commit 3b17b24587
12 changed files with 115 additions and 31 deletions

View File

@@ -1,6 +1,6 @@
/** @file
Intel FSP API definition from Intel Firmware Support Package External
Architecture Specification, April 2014, revision 001.
Architecture Specification v1.1, April 2015, revision 001.
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials