Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
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353
Vlv2DeviceRefCodePkg/AcpiTablesPCAT/HOST_BUS.ASL
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353
Vlv2DeviceRefCodePkg/AcpiTablesPCAT/HOST_BUS.ASL
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/*++
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Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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HOST_BUS.ASL
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Abstract:
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Baytrail PCI configuration space definition.
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---*/
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Device(VLVC)
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{
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Name(_ADR, 0x00000000) // Device 0, Function 0
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// Define various MCH Controller PCI Configuration Space
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// registers which will be used to dynamically produce all
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// resources in the Host Bus _CRS.
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OperationRegion(HBUS, PCI_Config, 0x00, 0xFF)
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Field(HBUS, DWordAcc, NoLock, Preserve)
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{
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Offset(0xD0),
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SMCR, 32, // VLV Message Control Register (0xD0)
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Offset(0xD4),
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SMDR, 32, // VLV Message Data Register (0xD4)
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Offset(0xD8),
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MCRX, 32, // VLV Message Control Register Extension (0xD8)
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}
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// Define a method to read a 32-bit register on the VLV Message bus.
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// Arg0 = Port
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// Arg1 = Register
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//
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// Returns 32-bit register value
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Method(RMBR, 2, Serialized)
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{
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// Initiate regsiter read message on VLV Message Bus MCR
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Or(ShiftLeft(Arg0, 16), ShiftLeft(Arg1, 8), Local0)
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Or(0x100000F0, Local0, SMCR)
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// Read register value from Message Data Register
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Return(SMDR)
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}
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// Define a method to write a 32-bit register on the VLV Message bus MDR.
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// Arg0 = Port
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// Arg1 = Register
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// Arg2 = 32-bit value
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Method(WMBR, 3, Serialized)
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{
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// Write register value to Message Data Register
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Store(Arg2, SMDR)
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// Initiate register write message on VLV Message Bus
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Or(ShiftLeft(Arg0, 16), ShiftLeft(Arg1, 8), Local0)
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Or(0x110000F0, Local0, SMCR)
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}
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}
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//
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// BUS, I/O, and MMIO resources
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//
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Method(_CRS,0,Serialized)
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{
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//Update ISP0 reserved memory
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CreateDwordField(RES0, ^ISP0._MIN,ISMN)
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CreateDwordField(RES0, ^ISP0._MAX,ISMX)
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CreateDwordField(RES0, ^ISP0._LEN,ISLN)
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If (LEqual(ISPD,1))
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{
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Store (ISPA, ISMN)
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Add (ISMN, ISLN, ISMX)
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Subtract(ISMX, 1, ISMX)
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} Else
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{
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Store (0, ISMN)
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Store (0, ISMX)
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Store (0, ISLN)
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}
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//PCI MMIO SPACE
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CreateDwordField(RES0, ^PM01._MIN,M1MN)
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CreateDwordField(RES0, ^PM01._MAX,M1MX)
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CreateDwordField(RES0, ^PM01._LEN,M1LN)
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//Get dBMBOUND Base
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And(BMBD, 0xFF000000, M1MN)
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//Get ECBASE
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Store(PCIT, M1MX)
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Add(Subtract(M1MX, M1MN), 1, M1LN)
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Subtract(M1MX, 1, M1MX)
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// Create pointers to Gfx Stolen Memory Sizing values.
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CreateDwordField(RES0, ^STOM._MIN,GSMN)
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CreateDwordField(RES0, ^STOM._MAX,GSMX)
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CreateDwordField(RES0, ^STOM._LEN,GSLN)
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If (LNotEqual (\_SB.PCI0.GFX0.GSTM, 0xFFFFFFFF))
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{
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Store(0x00, GSMN) //Read the Stolen memory base from B0:D2:F0:R5C
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} else
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{
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Store(\_SB.PCI0.GFX0.GSTM, GSMN) //Read the Stolen memory base from B0:D2:F0:R5C
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}
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If (LNotEqual (\_SB.PCI0.GFX0.GUMA, 0xFFFFFFFF))
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{
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Store(0x00, GSLN) //Read the Stolen memory base from B0:D2:F0:R5C
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} else
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{
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ShiftLeft(\_SB.PCI0.GFX0.GUMA, 25, GSLN) //Read Stolen memory base form B0:D2:F0:R50
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}
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Add(GSMN, GSLN, GSMX) //Store the Stolen Memory Size
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Subtract(GSMX, 1, GSMX)
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Return(RES0)
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}
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Name( RES0,ResourceTemplate()
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{
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WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses
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ResourceProducer, // bit 0 of general flags is 1
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode, // PosDecode
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0x0000, // Granularity
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0x0000, // Min
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0x00FF, // Max
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0x0000, // Translation
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0x0100 // Range Length = Max-Min+1
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)
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IO (Decode16, 0x70, 0x77, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)
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IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)
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WORDIO ( // Consumed-and-produced resource (all I/O below CF8)
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ResourceProducer, // bit 0 of general flags is 0
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode,
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EntireRange,
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0x0000, // Granularity
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0x0000, // Min
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0x006F, // Max
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0x0000, // Translation
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0x0070 // Range Length
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)
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WORDIO ( // Consumed-and-produced resource
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ResourceProducer, // bit 0 of general flags is 0
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode,
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EntireRange,
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0x0000, // Granularity
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0x0078, // Min
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0x0CF7, // Max
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0x0000, // Translation
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0x0C80 // Range Length
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)
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WORDIO ( // Consumed-and-produced resource (all I/O above CFF)
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ResourceProducer, // bit 0 of general flags is 0
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode,
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EntireRange,
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0x0000, // Granularity
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0x0D00, // Min
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0xFFFF, // Max
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0x0000, // Translation
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0xF300 // Range Length
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)
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DWORDMEMORY ( // Descriptor for legacy VGA video RAM
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x000A0000, // Min
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0x000BFFFF, // Max
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0x00000000, // Translation
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0x00020000 // Range Length
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)
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DWORDMEMORY ( // Descriptor for legacy OptionRom
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x000C0000, // Min
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0x000DFFFF, // Max
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0x00000000, // Translation
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0x00020000 // Range Length
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)
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DWORDMEMORY ( // Descriptor for BIOS Area
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x000E0000, // Min
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0x000FFFFF, // Max
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0x00000000, // Translation
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0x00020000 // Range Length
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)
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DWORDMEMORY ( // Descriptor for ISP0 reserved Mem
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x7A000000, // Min
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0x7A3FFFFF, // Max
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0x00000000, // Translation
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0x00400000 // Range Length
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,,,
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ISP0
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)
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DWORDMEMORY ( // Descriptor for VGA Stolen Mem
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x7C000000, // Min
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0x7FFFFFFF, // Max
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0x00000000, // Translation
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0x04000000 // Range Length
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,,,
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STOM
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)
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DWORDMEMORY ( // Descriptor for PCI MMIO
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x80000000, // Min
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0xDFFFFFFF, // Max
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0x00000000, // Translation
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0x60000000 // Range Length
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,,,
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PM01
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)
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})
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//Name(GUID,UUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
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Name(GUID,Buffer()
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{
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0x5b, 0x4d, 0xdb, 0x33,
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0xf7, 0x1f,
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0x1c, 0x40,
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0x96, 0x57,
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0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66
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})
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Name(SUPP,0) // PCI _OSC Support Field value
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Name(CTRL,0) // PCI _OSC Control Field value
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Method(_OSC,4,Serialized)
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{
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// Check for proper UUID
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// Save the capabilities buffer
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Store(Arg3,Local0)
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// Create DWord-adressable fields from the Capabilties Buffer
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CreateDWordField(Local0,0,CDW1)
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CreateDWordField(Local0,4,CDW2)
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CreateDWordField(Local0,8,CDW3)
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// Check for proper UUID
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If(LAnd(LEqual(Arg0,GUID),NEXP))
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{
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// Save Capabilities DWord2 & 3
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Store(CDW2,SUPP)
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Store(CDW3,CTRL)
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If(Not(And(CDW1,1))) // Query flag clear?
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{
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// Disable GPEs for features granted native control.
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If(And(CTRL,0x02))
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{
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NHPG()
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}
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If(And(CTRL,0x04)) // PME control granted?
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{
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NPME()
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}
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}
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If(LNotEqual(Arg1,One))
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{
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// Unknown revision
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Or(CDW1,0x08,CDW1)
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}
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If(LNotEqual(CDW3,CTRL))
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{
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// Capabilities bits were masked
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Or(CDW1,0x10,CDW1)
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}
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// Update DWORD3 in the buffer
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And(CTRL,0xfe,CTRL)
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Store(CTRL,CDW3)
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Store(CTRL,OSCC)
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Return(Local0)
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} Else
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{
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Or(CDW1,4,CDW1) // Unrecognized UUID
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Return(Local0)
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}
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} // End _OSC
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