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Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to

Browse Source 
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, 

which are for MinnowBoard MAX open source project.


Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
Reviewed-by: Mike Wu <mike.wu@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Wei
2015-01-12 09:37:20 +00:00
committed by zwei4
parent 6f785cfcc3
commit 3cbfba02fe
518 changed files with 118538 additions and 0 deletions
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Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
AcpiPlatform.h
Abstract:
This is an implementation of the ACPI platform driver. Requirements for
this driver are defined in the Tiano ACPI External Product Specification,
revision 0.3.6.
--*/
#ifndef _ACPI_PLATFORM_H_
#define _ACPI_PLATFORM_H_
//
// Statements that include other header files.
//
#include <FrameworkDxe.h>
#include <PiDxe.h>
#include <Base.h>
#include <Library/UefiLib.h>
#include <Library/BaseLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Library/DebugLib.h>
#include <Protocol/FirmwareVolume.h>
#include <Library/PcdLib.h>
#include <IndustryStandard/HighPrecisionEventTimerTable.h>
#include <IndustryStandard/Acpi.h>
#include <Protocol/AcpiSystemDescriptionTable.h>
#include <Protocol/MpService.h>
#include <Protocol/CpuIo.h>
#include <IndustryStandard/Acpi30.h>
#include <IndustryStandard/Acpi20.h>
#include <Library/HobLib.h>
#include <AlertStandardFormatTable.h>
#include <Guid/SetupVariable.h>
#include <Protocol/GlobalNvsArea.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <PchRegs.h>
#include <Library/PchPlatformLib.h>
//
// Global variables.
//
EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea;
//
// ACPI table information used to initialize tables.
#define EFI_ACPI_OEM_REVISION 0x00000003
#define EFI_ACPI_CREATOR_ID SIGNATURE_32 ('V', 'L', 'V', '2')
#define EFI_ACPI_CREATOR_REVISION 0x0100000D
#define WPCN381U_CONFIG_INDEX 0x2E
#define WPCN381U_CONFIG_DATA 0x2F
#define WPCN381U_CHIP_ID 0xF4
#define WDCP376_CHIP_ID 0xF1
#define MOBILE_PLATFORM 1
#define DESKTOP_PLATFORM 2
//
// Define macros to build data structure signatures from characters.
//
#ifndef EFI_SIGNATURE_16
#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
#endif
#ifndef EFI_SIGNATURE_32
#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
#endif
#ifndef EFI_SIGNATURE_64
#define EFI_SIGNATURE_64(A, B, C, D, E, F, G, H) \
(EFI_SIGNATURE_32 (A, B, C, D) | ((UINT64) (EFI_SIGNATURE_32 (E, F, G, H)) << 32))
#endif
#define GV3_SSDT_OEM_TABLE_IDBASE 0x4000
//
// Private Driver Data.
//
//
// Define Union of IO APIC & Local APIC structure.
//
typedef union {
EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE AcpiLocalApic;
EFI_ACPI_2_0_IO_APIC_STRUCTURE AcpiIoApic;
struct {
UINT8 Type;
UINT8 Length;
} AcpiApicCommon;
} ACPI_APIC_STRUCTURE_PTR;
//
// Protocol private structure definition.
//
/**
Entry point of the ACPI platform driver.
@param[in] ImageHandle EFI_HANDLE: A handle for the image that is initializing this driver.
@param[in] SystemTable EFI_SYSTEM_TABLE: A pointer to the EFI system table.
@retval EFI_SUCCESS Driver initialized successfully.
@retval EFI_LOAD_ERROR Failed to Initialize or has been loaded.
@retval EFI_OUT_OF_RESOURCES Could not allocate needed resources.
**/
EFI_STATUS
InstallAcpiPlatform (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
);
/**
Get Acpi Table Version.
@param[in] ImageHandle EFI_HANDLE: A handle for the image that is initializing this driver.
@param[in] SystemTable EFI_SYSTEM_TABLE: A pointer to the EFI system table.
@retval EFI_SUCCESS: Driver initialized successfully.
@retval EFI_LOAD_ERROR: Failed to Initialize or has been loaded.
@retval EFI_OUT_OF_RESOURCES: Could not allocate needed resources.
--*/
EFI_ACPI_TABLE_VERSION
GetAcpiTableVersion (
VOID
);
/**
The funtion returns Oem specific information of Acpi Platform.
@param[in] OemId OemId returned.
@param[in] OemTableId OemTableId returned.
@param[in] OemRevision OemRevision returned.
@retval EFI_STATUS Status of function execution.
**/
EFI_STATUS
AcpiPlatformGetOemFields (
OUT UINT8 *OemId,
OUT UINT64 *OemTableId,
OUT UINT32 *OemRevision
);
/**
The function returns Acpi table version.
@param[in]
@retval EFI_ACPI_TABLE_VERSION Acpi table version encoded as a UINT32.
**/
EFI_ACPI_TABLE_VERSION
AcpiPlatformGetAcpiSetting (
VOID
);
/**
Entry point for Acpi platform driver.
@param[in] ImageHandle A handle for the image that is initializing this driver.
@param[in] SystemTable A pointer to the EFI system table.
@retval EFI_SUCCESS Driver initialized successfully.
@retval EFI_LOAD_ERROR Failed to Initialize or has been loaded.
@retval EFI_OUT_OF_RESOURCES Could not allocate needed resources.
**/
EFI_STATUS
EFIAPI
AcpiPlatformEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
);
UINT8
ReadCmosBank1Byte (
IN UINT8 Index
);
VOID
WriteCmosBank1Byte (
IN UINT8 Index,
IN UINT8 Data
);
VOID
SelectNFCDevice (
IN VOID
);
VOID
SettingI2CTouchAddress (
IN VOID
);

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Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf Normal file
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#
#
# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
# Module Name:
#
# AcpiPlatformBB.inf
#
# Abstract:
#
#
[defines]
INF_VERSION = 0x00010005
BASE_NAME = AcpiPlatform
FILE_GUID = F0F6F006-DAB4-44b2-A7A1-0F72EEDCA716
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = AcpiPlatformEntryPoint
[sources.common]
AcpiPlatformHooks.c
AcpiPlatform.c
[Packages]
Vlv2TbltDevicePkg/PlatformPkg.dec
MdePkg/MdePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
MdeModulePkg/MdeModulePkg.dec
Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
Vlv2TbltDevicePkg/PlatformPkg.dec
[LibraryClasses]
HobLib
UefiRuntimeServicesTableLib
UefiDriverEntryPoint
BaseMemoryLib
DebugLib
HobLib
IoLib
PchPlatformLib
[Guids]
gACPIOSFRMfgStringVariableGuid
gEfiAcpiTableStorageGuid
gACPIOSFRMfgStringVariableGuid
gEfiBoardFeaturesGuid
gEfiPlatformInfoGuid
gEfiNormalSetupGuid
gACPIOSFRRefDataBlockVariableGuid
gACPIOSFRModelStringVariableGuid
gEfiPlatformCpuInfoGuid
gEfiVlv2VariableGuid
[Protocols]
gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
gEnhancedSpeedstepProtocolGuid
gEfiPlatformCpuProtocolGuid
gEfiAcpiSupportProtocolGuid
gEfiAcpiS3SaveProtocolGuid
gEfiCpuIoProtocolGuid
gEfiPs2PolicyProtocolGuid
gEfiFirmwareVolume2ProtocolGuid
gEfiMpServiceProtocolGuid
gEfiGlobalNvsAreaProtocolGuid
gEfiTcgProtocolGuid
gEfiFirmwareVolumeProtocolGuid
gIgdOpRegionProtocolGuid

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/** @file
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
AcpiPlatformHooks.c
Abstract:
ACPI Platform Driver Hooks
--*/
//
// Statements that include other files.
//
#include "AcpiPlatform.h"
#include "AcpiPlatformHooks.h"
#include "Platform.h"
//
// Prototypes of the various hook functions.
//
#include "AcpiPlatformHooksLib.h"
extern EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea;
extern SYSTEM_CONFIGURATION mSystemConfiguration;
ENHANCED_SPEEDSTEP_PROTOCOL *mEistProtocol = NULL;
EFI_CPU_ID_MAP mCpuApicIdAcpiIdMapTable[MAX_CPU_NUM];
EFI_STATUS
AppendCpuMapTableEntry (
IN EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE *AcpiLocalApic
)
{
BOOLEAN Added;
UINTN Index;
for (Index = 0; Index < MAX_CPU_NUM; Index++) {
if ((mCpuApicIdAcpiIdMapTable[Index].ApicId == AcpiLocalApic->ApicId) && mCpuApicIdAcpiIdMapTable[Index].Flags) {
return EFI_SUCCESS;
}
}
Added = FALSE;
for (Index = 0; Index < MAX_CPU_NUM; Index++) {
if (!mCpuApicIdAcpiIdMapTable[Index].Flags) {
mCpuApicIdAcpiIdMapTable[Index].Flags = 1;
mCpuApicIdAcpiIdMapTable[Index].ApicId = AcpiLocalApic->ApicId;
mCpuApicIdAcpiIdMapTable[Index].AcpiProcessorId = AcpiLocalApic->AcpiProcessorId;
Added = TRUE;
break;
}
}
ASSERT (Added);
return EFI_SUCCESS;
}
UINT32
ProcessorId2ApicId (
UINT32 AcpiProcessorId
)
{
UINTN Index;
ASSERT (AcpiProcessorId < MAX_CPU_NUM);
for (Index = 0; Index < MAX_CPU_NUM; Index++) {
if (mCpuApicIdAcpiIdMapTable[Index].Flags && (mCpuApicIdAcpiIdMapTable[Index].AcpiProcessorId == AcpiProcessorId)) {
return mCpuApicIdAcpiIdMapTable[Index].ApicId;
}
}
return (UINT32) -1;
}
UINT8
GetProcNumberInPackage (
IN UINT8 Package
)
{
UINTN Index;
UINT8 Number;
Number = 0;
for (Index = 0; Index < MAX_CPU_NUM; Index++) {
if (mCpuApicIdAcpiIdMapTable[Index].Flags && (((mCpuApicIdAcpiIdMapTable[Index].ApicId >> 0x04) & 0x01) == Package)) {
Number++;
}
}
return Number;
}
EFI_STATUS
LocateCpuEistProtocol (
IN UINT32 CpuIndex,
OUT ENHANCED_SPEEDSTEP_PROTOCOL **EistProtocol
)
{
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
ENHANCED_SPEEDSTEP_PROTOCOL *EistProt;
UINTN Index;
UINT32 ApicId;
EFI_STATUS Status;
HandleCount = 0;
gBS->LocateHandleBuffer (
ByProtocol,
&gEnhancedSpeedstepProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
Index = 0;
EistProt = NULL;
Status = EFI_NOT_FOUND;
while (Index < HandleCount) {
gBS->HandleProtocol (
HandleBuffer[Index],
&gEnhancedSpeedstepProtocolGuid,
(VOID **) &EistProt
);
//
// Adjust the CpuIndex by +1 due to the AcpiProcessorId is 1 based.
//
ApicId = ProcessorId2ApicId (CpuIndex+1);
if (ApicId == (UINT32) -1) {
break;
}
if (EistProt->ProcApicId == ApicId) {
Status = EFI_SUCCESS;
break;
}
Index++;
}
if (HandleBuffer != NULL) {
gBS->FreePool (HandleBuffer);
}
if (!EFI_ERROR (Status)) {
*EistProtocol = EistProt;
} else {
*EistProtocol = NULL;
}
return Status;
}
EFI_STATUS
PlatformHookInit (
VOID
)
{
EFI_STATUS Status;
Status = gBS->LocateProtocol (
&gEnhancedSpeedstepProtocolGuid,
NULL,
(VOID **) &mEistProtocol
);
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
Called for every ACPI table found in the BIOS flash.
Returns whether a table is active or not. Inactive tables
are not published in the ACPI table list.
This hook can be used to implement optional SSDT tables or
enabling/disabling specific functionality (e.g. SPCR table)
based on a setup switch or platform preference. In case of
optional SSDT tables,the platform flash will include all the
SSDT tables but will return EFI_SUCCESS only for those tables
that need to be published.
@param[in] *Table Pointer to the active table.
@retval EFI_SUCCESS if the table is active.
@retval EFI_UNSUPPORTED if the table is not active.
**/
EFI_STATUS
AcpiPlatformHooksIsActiveTable (
IN OUT EFI_ACPI_COMMON_HEADER *Table
)
{
EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
if (TableHeader->Signature == EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE) {
}
if ((mSystemConfiguration.ENDBG2 == 0) && (CompareMem (&TableHeader->OemTableId, "INTLDBG2", 8) == 0)) {
return EFI_UNSUPPORTED;
}
return EFI_SUCCESS;
}
/**
Update the GV3 SSDT table.
@param[in][out] *TableHeader The table to be set.
@retval EFI_SUCCESS Returns Success.
**/
EFI_STATUS
PatchGv3SsdtTable (
IN OUT EFI_ACPI_DESCRIPTION_HEADER *TableHeader
)
{
EFI_STATUS Status;
UINT8 *CurrPtr;
UINT8 *SsdtPointer;
UINT32 Signature;
UINT32 CpuFixes;
UINT32 NpssFixes;
UINT32 SpssFixes;
UINT32 CpuIndex;
UINT32 PackageSize;
UINT32 NewPackageSize;
UINT32 AdjustSize;
UINTN EntryIndex;
UINTN TableIndex;
EFI_ACPI_NAME_COMMAND *PssTable;
EFI_PSS_PACKAGE *PssTableItemPtr;
ENHANCED_SPEEDSTEP_PROTOCOL *EistProt;
EIST_INFORMATION *EistInfo;
EFI_ACPI_CPU_PSS_STATE *PssState;
EFI_ACPI_NAMEPACK_DWORD *NamePtr;
//
// Loop through the ASL looking for values that we must fix up.
//
NpssFixes = 0;
SpssFixes = 0;
CpuFixes = 0;
CpuIndex = 0;
CurrPtr = (UINT8 *) TableHeader;
EistProt = NULL;
for (SsdtPointer = CurrPtr; SsdtPointer <= (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length); SsdtPointer++) {
Signature = *(UINT32 *) SsdtPointer;
switch (Signature) {
case SIGNATURE_32 ('_', 'P', 'R', '_'):
//
// _CPUX ('0' to '0xF')
//
CpuIndex = *(SsdtPointer + 7);
if (CpuIndex >= '0' && CpuIndex <= '9') {
CpuIndex -= '0';
} else {
if (CpuIndex > '9') {
CpuIndex -= '7';
}
}
CpuFixes++;
LocateCpuEistProtocol (CpuIndex, &EistProt);
break;
case SIGNATURE_32 ('D', 'O', 'M', 'N'):
NamePtr = ACPI_NAME_COMMAND_FROM_NAMEPACK_STR (SsdtPointer);
if (NamePtr->StartByte != AML_NAME_OP) {
continue;
}
if (NamePtr->Size != AML_NAME_DWORD_SIZE) {
continue;
}
NamePtr->Value = 0;
if (mCpuApicIdAcpiIdMapTable[CpuIndex].Flags) {
NamePtr->Value = (mCpuApicIdAcpiIdMapTable[CpuIndex].ApicId >> 0x04) & 0x01;
}
break;
case SIGNATURE_32 ('N', 'C', 'P', 'U'):
NamePtr = ACPI_NAME_COMMAND_FROM_NAMEPACK_STR (SsdtPointer);
if (NamePtr->StartByte != AML_NAME_OP) {
continue;
}
if (NamePtr->Size != AML_NAME_DWORD_SIZE) {
continue;
}
NamePtr->Value = 0;
if (mCpuApicIdAcpiIdMapTable[CpuIndex].Flags) {
NamePtr->Value = GetProcNumberInPackage ((mCpuApicIdAcpiIdMapTable[CpuIndex].ApicId >> 0x04) & 0x01);
}
break;
case SIGNATURE_32 ('N', 'P', 'S', 'S'):
case SIGNATURE_32 ('S', 'P', 'S', 'S'):
if (EistProt == NULL) {
continue;
}
PssTable = ACPI_NAME_COMMAND_FROM_NAME_STR (SsdtPointer);
if (PssTable->StartByte != AML_NAME_OP) {
continue;
}
Status = EistProt->GetEistTable (EistProt, &EistInfo, (VOID **) &PssState);
AdjustSize = PssTable->NumEntries * sizeof (EFI_PSS_PACKAGE);
AdjustSize -= EistInfo->NumStates * sizeof (EFI_PSS_PACKAGE);
PackageSize = (PssTable->Size & 0xF) + ((PssTable->Size & 0xFF00) >> 4);
NewPackageSize = PackageSize - AdjustSize;
PssTable->Size = (UINT16) ((NewPackageSize & 0xF) + ((NewPackageSize & 0x0FF0) << 4));
//
// Set most significant two bits of byte zero to 01, meaning two bytes used.
//
PssTable->Size |= 0x40;
//
// Set unused table to Noop Code.
//
SetMem( (UINT8 *) PssTable + NewPackageSize + AML_NAME_PREFIX_SIZE, AdjustSize, AML_NOOP_OP);
PssTable->NumEntries = (UINT8) EistInfo->NumStates;
PssTableItemPtr = (EFI_PSS_PACKAGE *) ((UINT8 *) PssTable + sizeof (EFI_ACPI_NAME_COMMAND));
//
// Update the size.
//
for (TableIndex = 0; TableIndex < EistInfo->NumStates; TableIndex++) {
EntryIndex = EistInfo->NumStates - TableIndex - 1;
PssTableItemPtr->CoreFreq = PssState[EntryIndex].CoreFrequency * PssState[EntryIndex].Control;
PssTableItemPtr->Power = PssState[EntryIndex].Power * 1000;
if (PssTable->NameStr == SIGNATURE_32 ('N', 'P', 'S', 'S')) {
PssTableItemPtr->BMLatency = PssState[EntryIndex].BusMasterLatency;
PssTableItemPtr->TransLatency = PssState[EntryIndex].TransitionLatency;
} else {
//
// This method should be supported by SMM PPM Handler.
//
PssTableItemPtr->BMLatency = PssState[EntryIndex].BusMasterLatency * 2;
PssTableItemPtr->TransLatency = PssState[EntryIndex].TransitionLatency * 10;
}
PssTableItemPtr->Control = PssState[EntryIndex].Control;
PssTableItemPtr->Status = PssState[EntryIndex].Status;
PssTableItemPtr++;
}
if (PssTable->NameStr == SIGNATURE_32 ('N', 'P', 'S', 'S')) {
NpssFixes++;
} else {
SpssFixes++;
}
SsdtPointer = (UINT8 *) PssTable + PackageSize;
break;
}
}
//
// N fixes together currently.
//
ASSERT (CpuFixes == (UINT32) MAX_CPU_NUM);
ASSERT (SpssFixes == NpssFixes);
ASSERT (CpuFixes >= SpssFixes);
return EFI_SUCCESS;
}
/**
Update the DSDT table.
@param[in][out] *TableHeader The table to be set.
@retval EFI_SUCCESS Returns EFI_SUCCESS.
**/
EFI_STATUS
PatchDsdtTable (
IN OUT EFI_ACPI_DESCRIPTION_HEADER *TableHeader
)
{
UINT8 *CurrPtr;
UINT8 *DsdtPointer;
UINT32 *Signature;
UINT8 *EndPtr;
UINT8 *Operation;
UINT32 *Address;
UINT16 *Size;
//
// Fix PCI32 resource "FIX0" -- PSYS system status area
//
CurrPtr = (UINT8*) &((EFI_ACPI_DESCRIPTION_HEADER*) TableHeader)[0];
EndPtr = (UINT8*) TableHeader;
EndPtr = EndPtr + TableHeader->Length;
while (CurrPtr < (EndPtr-2)) {
//
// Removed the _S3 tag to indicate that we do not support S3. The 4th byte is blank space
// since there are only 3 char "_S3".
//
if (mSystemConfiguration.AcpiSuspendState == 0) {
//
// For iasl compiler version 20061109.
//
if ((CurrPtr[0] == '_') && (CurrPtr[1] == 'S') && (CurrPtr[2] == '3') && (CurrPtr[3] == '_')) {
break;
}
//
// For iasl compiler version 20040527.
//
if ((CurrPtr[0] == '\\') && (CurrPtr[1] == '_') && (CurrPtr[2] == 'S') && (CurrPtr[3] == '3')) {
break;
}
}
CurrPtr++;
}
CurrPtr = (UINT8*) &((EFI_ACPI_DESCRIPTION_HEADER*) TableHeader)[0];
EndPtr = (UINT8*) TableHeader;
EndPtr = EndPtr + TableHeader->Length;
while (CurrPtr < (EndPtr-2)) {
//
// For mipi dsi port select _DEP.
//
if (mSystemConfiguration.MipiDsi== 1) {
//
// For iasl compiler version 20061109.
//
if ((CurrPtr[0] == 'N') && (CurrPtr[1] == 'D') && (CurrPtr[2] == 'E') && (CurrPtr[3] == 'P')) {
CurrPtr[0] = '_';
break;
}
} else {
if ((CurrPtr[0] == 'P') && (CurrPtr[1] == 'D') && (CurrPtr[2] == 'E') && (CurrPtr[3] == 'P')) {
CurrPtr[0] = '_';
break;
}
}
CurrPtr++;
}
//
// Loop through the ASL looking for values that we must fix up.
//
CurrPtr = (UINT8 *) TableHeader;
for (DsdtPointer = CurrPtr; DsdtPointer <= (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length); DsdtPointer++) {
Signature = (UINT32 *) DsdtPointer;
switch (*Signature) {
//
// GNVS operation region.
//
case (SIGNATURE_32 ('G', 'N', 'V', 'S')):
//
// Conditional match. For Region Objects, the Operator will always be the
// byte immediately before the specific name. Therefore, subtract 1 to check
// the Operator.
//
Operation = DsdtPointer - 1;
if (*Operation == AML_OPREGION_OP) {
Address = (UINT32 *) (DsdtPointer + 6);
*Address = (UINT32) (UINTN) mGlobalNvsArea.Area;
Size = (UINT16 *) (DsdtPointer + 11);
*Size = sizeof (EFI_GLOBAL_NVS_AREA);

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
AcpiPlatformHooks.h
Abstract:
This is an implementation of the ACPI platform driver. Requirements for
this driver are defined in the Tiano ACPI External Product Specification,
revision 0.3.6.
--*/
#ifndef _ACPI_PLATFORM_HOOKS_H_
#define _ACPI_PLATFORM_HOOKS_H_
//
// Statements that include other header files
//
#include <IndustryStandard/Acpi.h>
#include "Platform.h"
#include <Protocol/EnhancedSpeedstep.h>
#define AML_NAME_OP 0x08
#define AML_METHOD_OP 0x14
#define AML_OPREGION_OP 0x80
#define AML_PACKAGE_OP 0x12 // Package operator.
#define AML_NAME_PREFIX_SIZE 0x06
#define AML_NAME_DWORD_SIZE 0x0C
#pragma pack(1)
typedef struct {
UINT8 AcpiProcessorId;
UINT8 ApicId;
UINT16 Flags;
} EFI_CPU_ID_MAP;
typedef struct {
UINT8 StartByte;
UINT32 NameStr;
UINT8 Size;
UINT32 Value;
} EFI_ACPI_NAMEPACK_DWORD;
typedef struct {
UINT8 StartByte;
UINT32 NameStr;
UINT8 OpCode;
UINT16 Size; // Hardcode to 16bit width because the table we use is fixed size
UINT8 NumEntries;
} EFI_ACPI_NAME_COMMAND;
typedef struct {
UINT8 PackageOp;
UINT8 PkgLeadByte;
UINT8 NumEntries;
UINT8 DwordPrefix0;
UINT32 CoreFreq;
UINT8 DwordPrefix1;
UINT32 Power;
UINT8 DwordPrefix2;
UINT32 TransLatency;
UINT8 DwordPrefix3;
UINT32 BMLatency;
UINT8 DwordPrefix4;
UINT32 Control;
UINT8 DwordPrefix5;
UINT32 Status;
} EFI_PSS_PACKAGE;
typedef struct {
UINT8 PackageOp;
UINT8 PkgLeadByte;
UINT8 NumEntries;
UINT8 BytePrefix0;
UINT8 Entries;
UINT8 BytePrefix1;
UINT8 Revision;
UINT8 BytePrefix2;
UINT8 Domain;
UINT8 BytePrefix3;
UINT8 Coordinate;
UINT8 BytePrefix4;
UINT8 ProcNumber;
} EFI_PSD_PACKAGE;
#pragma pack()
#define ACPI_NAME_COMMAND_FROM_NAME_STR(a) BASE_CR (a, EFI_ACPI_NAME_COMMAND, NameStr)
#define ACPI_NAME_COMMAND_FROM_NAMEPACK_STR(a) BASE_CR (a, EFI_ACPI_NAMEPACK_DWORD, NameStr)
EFI_STATUS
PlatformHookInit (
VOID
);
EFI_STATUS
PatchDsdtTable (
IN OUT EFI_ACPI_DESCRIPTION_HEADER *TableHeader
);
EFI_STATUS
PatchGv3SsdtTable (
IN OUT EFI_ACPI_DESCRIPTION_HEADER *Table
);
EFI_STATUS
PatchErstTable (

96
Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatformHooksLib.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
AcpiPlatformHooksLib.h
Abstract:
This is an implementation of the ACPI platform driver. Requirements for
this driver are defined in the Tiano ACPI External Product Specification,
revision 0.3.6.
--*/
#ifndef _ACPI_PLATFORM_HOOKS_LIB_H_
#define _ACPI_PLATFORM_HOOKS_LIB_H_
//
// Statements that include other header files.
//
#include <IndustryStandard/Acpi.h>
/**
Returns the ACPI table version that the platform wants.
@param[in] None
@retval EFI_ACPI_TABLE_VERSION_NONE if ACPI is to be disabled.
@retval EFI_ACPI_TABLE_VERSION_1_0B if 1.0b.
@retval EFI_ACPI_TABLE_VERSION_2_00 if 2.00.
**/
EFI_ACPI_TABLE_VERSION
AcpiPlatformHooksGetAcpiTableVersion (
VOID
);
/**
Returns the OEMID, OEM Table ID, OEM Revision.
@param[in] None
@retval OemId OEM ID string for ACPI tables, maximum 6 ASCII characters.
This is an OEM-supplied string that identifies the OEM.
@retval OemTableId An OEM-supplied string that the OEM uses to identify
the particular data table. This field is particularly useful
when defining a definition block to distinguish definition block
functions. The OEM assigns each dissimilar table a new OEM Table ID.
@retval OemRevision An OEM-supplied revision number for ACPI tables.
Larger numbers are assumed to be newer revisions.
**/
EFI_STATUS
AcpiPlatformHooksGetOemFields (
OUT UINT8 *OemId,
OUT UINT64 *OemTableId,
OUT UINT32 *OemRevision
);
/**
Called for every ACPI table found in the BIOS flash.
Returns whether a table is active or not. Inactive tables
are not published in the ACPI table list. This hook can be
used to implement optional SSDT tables or enabling/disabling
specific functionality (e.g. SPCR table) based on a setup
switch or platform preference. In case of optional SSDT tables,
the platform flash will include all the SSDT tables but will
return EFI_SUCCESS only for those tables that need to be
published.
This hook can also be used to update the table data. The header
is updated by the common code. For example, if a platform wants
to use an SSDT table to export some platform settings to the
ACPI code, it needs to update the data inside that SSDT based
on platform preferences in this hook.
@param[in] None

61
Vlv2TbltDevicePkg/AcpiPlatform/Osfr.h Normal file
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@@ -0,0 +1,61 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Osfr.h
Abstract:
This file describes the contents of the ACPI OSFR Table.
--*/
#ifndef _OSFR_H
#define _OSFR_H
//
// Statements that include other files.
//
#include <IndustryStandard/Acpi10.h>
#include <IndustryStandard/Acpi20.h>
#pragma pack (1)
#define EFI_ACPI_OSFR_TABLE_REVISION 0x1
//#define EFI_ACPI_OSFR_TABLE_SIGNATURE 'RFSO'
#define EFI_ACPI_OSFR_TABLE_SIGNATURE SIGNATURE_32('O', 'S', 'F', 'R') //'RFSO'
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 ObjectCount;
UINT32 TableDWORDs [64];
} EFI_ACPI_OSFR_TABLE;
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 ObjectCount;
} EFI_ACPI_OSFR_TABLE_FIXED_PORTION;
typedef struct {
EFI_GUID ObjectUUID;
UINT32 Reserved1;

927
Vlv2TbltDevicePkg/Application/FirmwareUpdate/FirmwareUpdate.c Normal file
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@@ -0,0 +1,927 @@
/** @file
Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "FirmwareUpdate.h"
EFI_HII_HANDLE HiiHandle;
//
// MinnowMax Flash Layout
//
//Start (hex) End (hex) Length (hex) Area Name
//----------- --------- ------------ ---------
//00000000 007FFFFF 00800000 Flash Image
//
//00000000 00000FFF 00001000 Descriptor Region
//00001000 004FFFFF 004FF000 TXE Region
//00500000 007FFFFF 00300000 BIOS Region
//
FV_REGION_INFO mRegionInfo[] = {
{FixedPcdGet32 (PcdFlashDescriptorBase), FixedPcdGet32 (PcdFlashDescriptorSize), TRUE},
{FixedPcdGet32 (PcdTxeRomBase), FixedPcdGet32 (PcdTxeRomSize), TRUE},
{FixedPcdGet32 (PcdBiosRomBase), FixedPcdGet32 (PcdBiosRomSize), TRUE}
};
UINTN mRegionInfoCount = sizeof (mRegionInfo) / sizeof (mRegionInfo[0]);
FV_INPUT_DATA mInputData = {0};
EFI_SPI_PROTOCOL *mSpiProtocol;
EFI_STATUS
GetRegionIndex (
IN EFI_PHYSICAL_ADDRESS Address,
OUT UINTN *RegionIndex
)
{
UINTN Index;
for (Index = 0; Index < mRegionInfoCount; Index++) {
if (Address >= mRegionInfo[Index].Base &&
Address < (mRegionInfo[Index].Base + mRegionInfo[Index].Size)
) {
break;
}
}
*RegionIndex = Index;
if (Index >= mRegionInfoCount) {
return EFI_NOT_FOUND;
}
return EFI_SUCCESS;
}
BOOLEAN
UpdateBlock (
IN EFI_PHYSICAL_ADDRESS Address
)
{
EFI_STATUS Status;
UINTN Index;
if (mInputData.FullFlashUpdate) {
return TRUE;
}
Status = GetRegionIndex (Address, &Index);
if ((!EFI_ERROR(Status)) && mRegionInfo[Index].Update) {
return TRUE;
}
return FALSE;
}
EFI_STATUS
MarkRegionState (
IN EFI_PHYSICAL_ADDRESS Address,
IN BOOLEAN Update
)
{
EFI_STATUS Status;
UINTN Index;
Status = GetRegionIndex (Address, &Index);
if (!EFI_ERROR(Status)) {
mRegionInfo[Index].Update = Update;
}
return Status;
}
UINTN
InternalPrintToken (
IN CONST CHAR16 *Format,
IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *Console,
IN VA_LIST Marker
)
{
EFI_STATUS Status;
UINTN Return;
CHAR16 *Buffer;
UINTN BufferSize;
ASSERT (Format != NULL);
ASSERT (((UINTN) Format & BIT0) == 0);
ASSERT (Console != NULL);
BufferSize = (PcdGet32 (PcdUefiLibMaxPrintBufferSize) + 1) * sizeof (CHAR16);
Buffer = (CHAR16 *) AllocatePool(BufferSize);
ASSERT (Buffer != NULL);
Return = UnicodeVSPrint (Buffer, BufferSize, Format, Marker);
if (Console != NULL && Return > 0) {
//
// To be extra safe make sure Console has been initialized.
//
Status = Console->OutputString (Console, Buffer);
if (EFI_ERROR (Status)) {
Return = 0;
}
}
FreePool (Buffer);
return Return;
}
UINTN
EFIAPI
PrintToken (
IN UINT16 Token,
IN EFI_HII_HANDLE Handle,
...
)
{
VA_LIST Marker;
UINTN Return;
CHAR16 *Format;
VA_START (Marker, Handle);
Format = HiiGetString (Handle, Token, NULL);
ASSERT (Format != NULL);
Return = InternalPrintToken (Format, gST->ConOut, Marker);
FreePool (Format);
VA_END (Marker);
return Return;
}
EFI_STATUS
ParseCommandLine (
IN UINTN Argc,
IN CHAR16 **Argv
)
{
EFI_STATUS Status;
UINTN Index;
//
// Check to make sure that the command line has enough arguments for minimal
// operation. The minimum is just the file name.
//
if (Argc < 2 || Argc > 4) {
return EFI_INVALID_PARAMETER;
}
//
// Loop through command line arguments.
//
for (Index = 1; Index < Argc; Index++) {
//
// Make sure the string is valid.
//
if (StrLen (Argv[Index]) == 0) {;
PrintToken (STRING_TOKEN (STR_FWUPDATE_ZEROLENGTH_ARG), HiiHandle);
return EFI_INVALID_PARAMETER;
}
//
// Check to see if this is an option or the file name.
//
if ((Argv[Index])[0] == L'-' || (Argv[Index])[0] == L'/') {
//
// Parse the arguments.
//
if ((StrCmp (Argv[Index], L"-h") == 0) ||
(StrCmp (Argv[Index], L"--help") == 0) ||
(StrCmp (Argv[Index], L"/?") == 0) ||
(StrCmp (Argv[Index], L"/h") == 0)) {
//
// Print Help Information.
//
return EFI_INVALID_PARAMETER;
} else if (StrCmp (Argv[Index], L"-m") == 0) {
//
// Parse the MAC address here.
//
Status = ConvertMac(Argv[Index+1]);
if (EFI_ERROR(Status)) {
PrintToken (STRING_TOKEN (STR_FWUPDATE_INVAILD_MAC), HiiHandle);
return Status;
}
//
// Save the MAC address to mInputData.MacValue.
//
mInputData.UpdateMac= TRUE;
Index++;
} else {
//
// Invalid option was provided.
//
return EFI_INVALID_PARAMETER;
}
}
if ((Index == Argc - 1) && (StrCmp (Argv[Index - 1], L"-m") != 0)) {
//
// The only parameter that is not an option is the firmware image. Check
// to make sure that the file exists.
//
Status = ShellIsFile (Argv[Index]);
if (EFI_ERROR (Status)) {
PrintToken (STRING_TOKEN (STR_FWUPDATE_FILE_NOT_FOUND_ERROR), HiiHandle, Argv[Index]);
return EFI_INVALID_PARAMETER;
}
if (StrLen (Argv[Index]) > INPUT_STRING_LEN) {
PrintToken (STRING_TOKEN (STR_FWUPDATE_PATH_ERROR), HiiHandle, Argv[Index]);
return EFI_INVALID_PARAMETER;
}
StrCpy (mInputData.FileName, Argv[Index]);
mInputData.UpdateFromFile = TRUE;
}
}
return EFI_SUCCESS;
}
INTN
EFIAPI
ShellAppMain (
IN UINTN Argc,
IN CHAR16 **Argv
)
{
EFI_STATUS Status;
UINTN Index;
UINT32 FileSize;
UINT32 BufferSize;
UINT8 *FileBuffer;
UINT8 *Buffer;
EFI_PHYSICAL_ADDRESS Address;
UINTN CountOfBlocks;
EFI_TPL OldTpl;
BOOLEAN ResetRequired;
BOOLEAN FlashError;
Index = 0;
FileSize = 0;
BufferSize = 0;
FileBuffer = NULL;
Buffer = NULL;
Address = 0;
CountOfBlocks = 0;
ResetRequired = FALSE;
FlashError = FALSE;
Status = EFI_SUCCESS;
mInputData.FullFlashUpdate = TRUE;
//
// Publish our HII data.
//
HiiHandle = HiiAddPackages (
&gEfiCallerIdGuid,
NULL,
FirmwareUpdateStrings,
NULL
);
if (HiiHandle == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Done;
}
//
// Locate the SPI protocol.
//
Status = gBS->LocateProtocol (
&gEfiSpiProtocolGuid,
NULL,
(VOID **)&mSpiProtocol
);
if (EFI_ERROR (Status)) {
PrintToken (STRING_TOKEN (STR_SPI_NOT_FOUND), HiiHandle);
return EFI_DEVICE_ERROR;
}
//
// Parse the command line.
//
Status = ParseCommandLine (Argc, Argv);
if (EFI_ERROR (Status)) {
PrintHelpInfo ();
Status = EFI_SUCCESS;
goto Done;
}
//
// Display sign-on information.
//
PrintToken (STRING_TOKEN (STR_FWUPDATE_FIRMWARE_VOL_UPDATE), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_VERSION), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_COPYRIGHT), HiiHandle);
//
// Test to see if the firmware needs to be updated.
//
if (mInputData.UpdateFromFile) {
//
// Get the file to use in the update.
//
PrintToken (STRING_TOKEN (STR_FWUPDATE_READ_FILE), HiiHandle, mInputData.FileName);
Status = ReadFileData (mInputData.FileName, &FileBuffer, &FileSize);
if (EFI_ERROR (Status)) {
PrintToken (STRING_TOKEN (STR_FWUPDATE_READ_FILE_ERROR), HiiHandle, mInputData.FileName);
goto Done;
}
//
// Check that the file and flash sizes match.
//
if (FileSize != PcdGet32 (PcdFlashChipSize)) {
PrintToken (STRING_TOKEN (STR_FWUPDATE_SIZE), HiiHandle);
Status = EFI_UNSUPPORTED;
goto Done;
}
//
// Display flash update information.
//
PrintToken (STRING_TOKEN (STR_FWUPDATE_UPDATING_FIRMWARE), HiiHandle);
//
// Update it.
//
Buffer = FileBuffer;
BufferSize = FileSize;
Address = PcdGet32 (PcdFlashChipBase);
CountOfBlocks = (UINTN) (BufferSize / BLOCK_SIZE);
//
// Raise TPL to TPL_NOTIFY to block any event handler,
// while still allowing RaiseTPL(TPL_NOTIFY) within
// output driver during Print().
//
OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
for (Index = 0; Index < CountOfBlocks; Index++) {
//
// Handle block based on address and contents.
//
if (!UpdateBlock (Address)) {
DEBUG((EFI_D_INFO, "Skipping block at 0x%lx\n", Address));
} else if (!EFI_ERROR (InternalCompareBlock (Address, Buffer))) {
DEBUG((EFI_D_INFO, "Skipping block at 0x%lx (already programmed)\n", Address));
} else {
//
// Display a dot for each block being updated.
//
Print (L".");
//
// Flag that the flash image will be changed and the system must be rebooted
// to use the change.
//
ResetRequired = TRUE;
//
// Make updating process uninterruptable,
// so that the flash memory area is not accessed by other entities
// which may interfere with the updating process.
//
Status = InternalEraseBlock (Address);
ASSERT_EFI_ERROR(Status);
if (EFI_ERROR (Status)) {
gBS->RestoreTPL (OldTpl);
FlashError = TRUE;
goto Done;
}
Status = InternalWriteBlock (
Address,
Buffer,
(BufferSize > BLOCK_SIZE ? BLOCK_SIZE : BufferSize)
);
if (EFI_ERROR (Status)) {
gBS->RestoreTPL (OldTpl);
FlashError = TRUE;
goto Done;
}
}
//
// Move to next block to update.
//
Address += BLOCK_SIZE;
Buffer += BLOCK_SIZE;
if (BufferSize > BLOCK_SIZE) {
BufferSize -= BLOCK_SIZE;
} else {
BufferSize = 0;
}
}
gBS->RestoreTPL (OldTpl);
//
// Print result of update.
//
if (!FlashError) {
if (ResetRequired) {
Print (L"\n");
PrintToken (STRING_TOKEN (STR_FWUPDATE_UPDATE_SUCCESS), HiiHandle);
} else {
PrintToken (STRING_TOKEN (STR_FWUPDATE_NO_RESET), HiiHandle);
}
} else {
goto Done;
}
}
//
// All flash updates are done so see if the system needs to be reset.
//
if (ResetRequired && !FlashError) {
//
// Update successful.
//
for (Index = 5; Index > 0; Index--) {
PrintToken (STRING_TOKEN (STR_FWUPDATE_SHUTDOWN), HiiHandle, Index);
gBS->Stall (1000000);
}
gRT->ResetSystem (EfiResetShutdown, EFI_SUCCESS, 0, NULL);
PrintToken (STRING_TOKEN (STR_FWUPDATE_MANUAL_RESET), HiiHandle);
CpuDeadLoop ();
}
Done:
//
// Print flash update failure message if error detected.
//
if (FlashError) {
PrintToken (STRING_TOKEN (STR_FWUPDATE_UPDATE_FAILED), HiiHandle, Index);
}
//
// Do cleanup.
//
if (HiiHandle != NULL) {
HiiRemovePackages (HiiHandle);
}
if (FileBuffer) {
gBS->FreePool (FileBuffer);
}
return Status;
}
STATIC
EFI_STATUS
InternalEraseBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress
)
/*++
Routine Description:
Erase the whole block.
Arguments:
BaseAddress - Base address of the block to be erased.
Returns:
EFI_SUCCESS - The command completed successfully.
Other - Device error or wirte-locked, operation failed.
--*/
{
EFI_STATUS Status;
UINTN NumBytes;
NumBytes = BLOCK_SIZE;
Status = SpiFlashBlockErase ((UINTN) BaseAddress, &NumBytes);
return Status;
}
#if 0
STATIC
EFI_STATUS
InternalReadBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
OUT VOID *ReadBuffer
)
{
EFI_STATUS Status;
UINT32 BlockSize;
BlockSize = BLOCK_SIZE;
Status = SpiFlashRead ((UINTN) BaseAddress, &BlockSize, ReadBuffer);
return Status;
}
#endif
STATIC
EFI_STATUS
InternalCompareBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT8 *Buffer
)
{
EFI_STATUS Status;
VOID *CompareBuffer;
UINT32 NumBytes;
INTN CompareResult;
NumBytes = BLOCK_SIZE;
CompareBuffer = AllocatePool (NumBytes);
if (CompareBuffer == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Done;
}
Status = SpiFlashRead ((UINTN) BaseAddress, &NumBytes, CompareBuffer);
if (EFI_ERROR (Status)) {
goto Done;
}
CompareResult = CompareMem (CompareBuffer, Buffer, BLOCK_SIZE);
if (CompareResult != 0) {
Status = EFI_VOLUME_CORRUPTED;
}
Done:
if (CompareBuffer != NULL) {
FreePool (CompareBuffer);
}
return Status;
}
STATIC
EFI_STATUS
InternalWriteBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT8 *Buffer,
IN UINT32 BufferSize
)
/*++
Routine Description:
Write a block of data.
Arguments:
BaseAddress - Base address of the block.
Buffer - Data buffer.
BufferSize - Size of the buffer.
Returns:
EFI_SUCCESS - The command completed successfully.
EFI_INVALID_PARAMETER - Invalid parameter, can not proceed.
Other - Device error or wirte-locked, operation failed.
--*/
{
EFI_STATUS Status;
Status = SpiFlashWrite ((UINTN) BaseAddress, &BufferSize, Buffer);
ASSERT_EFI_ERROR(Status);
if (EFI_ERROR (Status)) {
DEBUG((EFI_D_ERROR, "\nFlash write error."));
return Status;
}
WriteBackInvalidateDataCacheRange ((VOID *) (UINTN) BaseAddress, BLOCK_SIZE);
Status = InternalCompareBlock (BaseAddress, Buffer);
if (EFI_ERROR (Status)) {
DEBUG((EFI_D_ERROR, "\nError when writing to BaseAddress %lx with different at offset %x.", BaseAddress, Status));
} else {
DEBUG((EFI_D_INFO, "\nVerified data written to Block at %lx is correct.", BaseAddress));
}
return Status;
}
STATIC
EFI_STATUS
ReadFileData (
IN CHAR16 *FileName,
OUT UINT8 **Buffer,
OUT UINT32 *BufferSize
)
{
EFI_STATUS Status;
SHELL_FILE_HANDLE FileHandle;
UINT64 Size;
VOID *NewBuffer;
UINTN ReadSize;
FileHandle = NULL;
NewBuffer = NULL;
Size = 0;
Status = ShellOpenFileByName (FileName, &FileHandle, EFI_FILE_MODE_READ, 0);
if (EFI_ERROR (Status)) {
goto Done;
}
Status = FileHandleIsDirectory (FileHandle);
if (!EFI_ERROR (Status)) {
Status = EFI_NOT_FOUND;
goto Done;
}
Status = FileHandleGetSize (FileHandle, &Size);
if (EFI_ERROR (Status)) {
goto Done;
}
NewBuffer = AllocatePool ((UINTN) Size);
ReadSize = (UINTN) Size;
Status = FileHandleRead (FileHandle, &ReadSize, NewBuffer);
if (EFI_ERROR (Status)) {
goto Done;
} else if (ReadSize != (UINTN) Size) {
Status = EFI_INVALID_PARAMETER;
goto Done;
}
Done:
if (FileHandle != NULL) {
ShellCloseFile (&FileHandle);
}
if (EFI_ERROR (Status)) {
if (NewBuffer != NULL) {
FreePool (NewBuffer);
}
} else {
*Buffer = NewBuffer;
*BufferSize = (UINT32) Size;
}
return Status;
}
STATIC
VOID
PrintHelpInfo (
VOID
)
/*++
Routine Description:
Print out help information.
Arguments:
None.
Returns:
None.
--*/
{
PrintToken (STRING_TOKEN (STR_FWUPDATE_FIRMWARE_VOL_UPDATE), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_VERSION), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_COPYRIGHT), HiiHandle);
Print (L"\n");
PrintToken (STRING_TOKEN (STR_FWUPDATE_USAGE), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_USAGE_1), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_USAGE_2), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_USAGE_3), HiiHandle);
PrintToken (STRING_TOKEN (STR_FWUPDATE_USAGE_4), HiiHandle);
Print (L"\n");
}
/**
Read NumBytes bytes of data from the address specified by
PAddress into Buffer.
@param[in] Address The starting physical address of the read.
@param[in,out] NumBytes On input, the number of bytes to read. On output, the number
of bytes actually read.
@param[out] Buffer The destination data buffer for the read.
@retval EFI_SUCCESS Opertion is successful.
@retval EFI_DEVICE_ERROR If there is any device errors.
**/
EFI_STATUS
EFIAPI
SpiFlashRead (
IN UINTN Address,
IN OUT UINT32 *NumBytes,
OUT UINT8 *Buffer
)
{
EFI_STATUS Status = EFI_SUCCESS;
UINTN Offset = 0;
ASSERT ((NumBytes != NULL) && (Buffer != NULL));
Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
Status = mSpiProtocol->Execute (
mSpiProtocol,
1, //SPI_READ,
0, //SPI_WREN,
TRUE,
TRUE,
FALSE,
Offset,
BLOCK_SIZE,
Buffer,
EnumSpiRegionAll
);
return Status;
}
/**
Write NumBytes bytes of data from Buffer to the address specified by
PAddresss.
@param[in] Address The starting physical address of the write.
@param[in,out] NumBytes On input, the number of bytes to write. On output,
the actual number of bytes written.
@param[in] Buffer The source data buffer for the write.
@retval EFI_SUCCESS Opertion is successful.
@retval EFI_DEVICE_ERROR If there is any device errors.
**/
EFI_STATUS
EFIAPI
SpiFlashWrite (
IN UINTN Address,
IN OUT UINT32 *NumBytes,
IN UINT8 *Buffer
)
{
EFI_STATUS Status;
UINTN Offset;
UINT32 Length;
UINT32 RemainingBytes;
ASSERT ((NumBytes != NULL) && (Buffer != NULL));
ASSERT (Address >= (UINTN)PcdGet32 (PcdFlashChipBase));
Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
ASSERT ((*NumBytes + Offset) <= (UINTN)PcdGet32 (PcdFlashChipSize));
Status = EFI_SUCCESS;
RemainingBytes = *NumBytes;
while (RemainingBytes > 0) {
if (RemainingBytes > SIZE_4KB) {
Length = SIZE_4KB;
} else {
Length = RemainingBytes;
}
Status = mSpiProtocol->Execute (
mSpiProtocol,
SPI_PROG,
SPI_WREN,
TRUE,
TRUE,
TRUE,
(UINT32) Offset,
Length,
Buffer,
EnumSpiRegionAll
);
if (EFI_ERROR (Status)) {
break;
}
RemainingBytes -= Length;
Offset += Length;
Buffer += Length;
}
//
// Actual number of bytes written.
//
*NumBytes -= RemainingBytes;
return Status;
}
/**
Erase the block starting at Address.
@param[in] Address The starting physical address of the block to be erased.
This library assume that caller garantee that the PAddress
is at the starting address of this block.
@param[in] NumBytes On input, the number of bytes of the logical block to be erased.
On output, the actual number of bytes erased.
@retval EFI_SUCCESS. Opertion is successful.
@retval EFI_DEVICE_ERROR If there is any device errors.
**/
EFI_STATUS
EFIAPI
SpiFlashBlockErase (
IN UINTN Address,
IN UINTN *NumBytes
)
{
EFI_STATUS Status;
UINTN Offset;
UINTN RemainingBytes;
ASSERT (NumBytes != NULL);
ASSERT (Address >= (UINTN)PcdGet32 (PcdFlashChipBase));
Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
ASSERT ((*NumBytes % SIZE_4KB) == 0);
ASSERT ((*NumBytes + Offset) <= (UINTN)PcdGet32 (PcdFlashChipSize));
Status = EFI_SUCCESS;
RemainingBytes = *NumBytes;
while (RemainingBytes > 0) {
Status = mSpiProtocol->Execute (
mSpiProtocol,
SPI_SERASE,
SPI_WREN,
FALSE,
TRUE,
FALSE,
(UINT32) Offset,
0,
NULL,
EnumSpiRegionAll
);
if (EFI_ERROR (Status)) {
break;
}
RemainingBytes -= SIZE_4KB;
Offset += SIZE_4KB;
}
//
// Actual number of bytes erased.
//
*NumBytes -= RemainingBytes;
return Status;
}
EFI_STATUS
EFIAPI
ConvertMac (
CHAR16 *Str
)
{
UINTN Index;
UINT8 Temp[MAC_ADD_STR_LEN];
if (Str == NULL)
return EFI_INVALID_PARAMETER;
if (StrLen(Str) != MAC_ADD_STR_LEN)
return EFI_INVALID_PARAMETER;
for (Index = 0; Index < MAC_ADD_STR_LEN; Index++) {
if (Str[Index] >= 0x30 && Str[Index] <= 0x39) {
Temp[Index] = (UINT8)Str[Index] - 0x30;
} else if (Str[Index] >= 0x41 && Str[Index] <= 0x46) {
Temp[Index] = (UINT8)Str[Index] - 0x37;
} else if (Str[Index] >= 0x61 && Str[Index] <= 0x66) {
Temp[Index] = (UINT8)Str[Index] - 0x57;
} else {
return EFI_INVALID_PARAMETER;
}

190
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/** @file
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _FIRMWARE_UPDATE_H_
#define _FIRMWARE_UPDATE_H_
#include <Uefi.h>
#include <PiDxe.h>
#include <Guid/FileInfo.h>
#include <Protocol/FirmwareVolumeBlock.h>
#include <Protocol/LoadedImage.h>
#include <Protocol/SimpleFileSystem.h>
#include <Protocol/Spi.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/CacheMaintenanceLib.h>
#include <Library/DebugLib.h>
#include <Library/FileHandleLib.h>
#include <Library/HiiLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PcdLib.h>
#include <Library/PrintLib.h>
#include <Library/ShellLib.h>
#include <Library/UefiApplicationEntryPoint.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
//
// Function Prototypes.
//
STATIC
EFI_STATUS
ReadFileData (
IN CHAR16 *FileName,
OUT UINT8 **Buffer,
OUT UINT32 *BufferSize
);
STATIC
EFI_STATUS
InternalEraseBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress
);
#if 0
STATIC
EFI_STATUS
InternalReadBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
OUT VOID *ReadBuffer
);
#endif
STATIC
EFI_STATUS
InternalCompareBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT8 *Buffer
);
STATIC
EFI_STATUS
InternalWriteBlock (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT8 *Buffer,
IN UINT32 BufferSize
);
STATIC
VOID
PrintHelpInfo (
VOID
);
STATIC
EFI_STATUS
EFIAPI
SpiFlashRead (
IN UINTN Address,
IN OUT UINT32 *NumBytes,
OUT UINT8 *Buffer
);
STATIC
EFI_STATUS
EFIAPI
SpiFlashWrite (
IN UINTN Address,
IN OUT UINT32 *NumBytes,
IN UINT8 *Buffer
);
STATIC
EFI_STATUS
EFIAPI
SpiFlashBlockErase (
IN UINTN Address,
IN UINTN *NumBytes
);
STATIC
EFI_STATUS
EFIAPI
ConvertMac (
CHAR16 *Str
);
EFI_STATUS
InitializeFVUPDATE (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
);
//
// Flash specific definitions.
// - Should we use a PCD for this information?
//
#define BLOCK_SIZE SIZE_4KB
//
// Flash region layout and update information.
//
typedef struct {
EFI_PHYSICAL_ADDRESS Base;
UINTN Size;
BOOLEAN Update;
} FV_REGION_INFO;
//
// MAC Address information.
//
#define MAC_ADD_STR_LEN 12
#define MAC_ADD_STR_SIZE (MAC_ADD_STR_LEN + 1)
#define MAC_ADD_BYTE_COUNT 6
#define MAC_ADD_TMP_STR_LEN 2
#define MAC_ADD_TMP_STR_SIZE (MAC_ADD_TMP_STR_LEN + 1)
//
// Command Line Data.
//
#define INPUT_STRING_LEN 255
#define INPUT_STRING_SIZE (INPUT_STRING_LEN + 1)
typedef struct {
BOOLEAN UpdateFromFile;
CHAR16 FileName[INPUT_STRING_SIZE];
BOOLEAN UpdateMac;
UINT8 MacValue[MAC_ADD_BYTE_COUNT];
BOOLEAN FullFlashUpdate;
} FV_INPUT_DATA;
//
// Prefix Opcode Index on the host SPI controller.
//
typedef enum {
SPI_WREN, // Prefix Opcode 0: Write Enable.
SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register.
} PREFIX_OPCODE_INDEX;
//
// Opcode Menu Index on the host SPI controller.
//
typedef enum {
SPI_READ_ID, // Opcode 0: READ ID, Read cycle with address.
SPI_READ, // Opcode 1: READ, Read cycle with address.

90
Vlv2TbltDevicePkg/Application/FirmwareUpdate/FirmwareUpdate.inf Normal file
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## @file
# Implements a Tunnel Mountain specific flash update program. This will allow
# users to update all regions of the flash as needed in a given update.
#
# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FirmwareUpdate
FILE_GUID = AEFAF26C-FB6D-4fef-AF7A-9D78FF201FCA
MODULE_TYPE = UEFI_APPLICATION
VERSION_STRING = 1.0
ENTRY_POINT = ShellCEntryLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = X64
#
[Sources]
FirmwareUpdateStrings.uni
FirmwareUpdate.c
FirmwareUpdate.h
[Packages]
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec
Vlv2TbltDevicePkg/PlatformPkg.dec
Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
ShellPkg/ShellPkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
CacheMaintenanceLib
DebugLib
FileHandleLib
#FlashDeviceLib
#SpiFlashCommonLib
MemoryAllocationLib
PcdLib
ShellCEntryLib
ShellLib
UefiApplicationEntryPoint
UefiBootServicesTableLib
UefiLib
UefiRuntimeServicesTableLib
[Protocols]
gEfiLoadedImageProtocolGuid # PROTOCOL ALWAYS_CONSUMED
gEfiFirmwareVolumeBlockProtocolGuid # PROTOCOL ALWAYS_CONSUMED
gEfiSpiProtocolGuid
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize ## CONSUMES
[FixedPcd]
# gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
# gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
# gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
# gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
# gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
# gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
gPlatformModuleTokenSpaceGuid.PcdFlashChipBase
gPlatformModuleTokenSpaceGuid.PcdFlashChipSize
gPlatformModuleTokenSpaceGuid.PcdFlashDescriptorBase

BIN
Vlv2TbltDevicePkg/Application/FirmwareUpdate/FirmwareUpdateStrings.uni Normal file
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BIN
Vlv2TbltDevicePkg/BfmLib.exe Normal file
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30
Vlv2TbltDevicePkg/BiosIdD.env Normal file
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#/** @file
# This file is used to define the BIOS ID parameters of the build.
# This file is processed by GenBiosId.
# The BIOS ID format conforms to "BIOS Revision Identification Specification", Rev. 0.7, 6/27/2001.
#
# BIOS ID string format:
# $(BOARD_ID)$(BOARD_REV).$(OEM_ID).$(VERSION_MAJOR).$(BUILD_TYPE)$(VERSION_MINOR).YYMMDDHHMM
# All fields must have a fixed length.
# Example: "TRFTCRB1.86C.0008.D03.0506081529"
#
# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#

30
Vlv2TbltDevicePkg/BiosIdR.env Normal file
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#/** @file
# This file is used to define the BIOS ID parameters of the build.
# This file is processed by GenBiosId.
# The BIOS ID format conforms to "BIOS Revision Identification Specification", Rev. 0.7, 6/27/2001.
#
# BIOS ID string format:
# $(BOARD_ID)$(BOARD_REV).$(OEM_ID).$(VERSION_MAJOR).$(BUILD_TYPE)$(VERSION_MINOR).YYMMDDHHMM
# All fields must have a fixed length.
# Example: "TRFTCRB1.86C.0008.D03.0506081529"
#
# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#

30
Vlv2TbltDevicePkg/BiosIdx64D.env Normal file
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@@ -0,0 +1,30 @@
#/** @file
# This file is used to define the BIOS ID parameters of the build.
# This file is processed by GenBiosId.
# The BIOS ID format conforms to "BIOS Revision Identification Specification", Rev. 0.7, 6/27/2001.
#
# BIOS ID string format:
# $(BOARD_ID)$(BOARD_REV).$(OEM_ID).$(VERSION_MAJOR).$(BUILD_TYPE)$(VERSION_MINOR).YYMMDDHHMM
# All fields must have a fixed length.
# Example: "TRFTCRB1.86C.0008.D03.0506081529"
#
# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#

30
Vlv2TbltDevicePkg/BiosIdx64R.env Normal file
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#/** @file
# This file is used to define the BIOS ID parameters of the build.
# This file is processed by GenBiosId.
# The BIOS ID format conforms to "BIOS Revision Identification Specification", Rev. 0.7, 6/27/2001.
#
# BIOS ID string format:
# $(BOARD_ID)$(BOARD_REV).$(OEM_ID).$(VERSION_MAJOR).$(BUILD_TYPE)$(VERSION_MINOR).YYMMDDHHMM
# All fields must have a fixed length.
# Example: "TRFTCRB1.86C.0008.D03.0506081529"
#
# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#

65
Vlv2TbltDevicePkg/BootScriptSaveDxe/BootScriptSaveDxe.inf Normal file
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#
#
## @file
# Component description file for ScriptSave Lite module.
#
# This is an implementation of the Boot Script Save protocol.
# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BootScriptSaveDxe
FILE_GUID = 42BB673D-09F3-4e2e-9FEE-D081131DED5B
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = InitializeScriptSave
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
#
[Sources]
ScriptSave.c
InternalBootScriptSave.h
[Packages]
MdePkg/MdePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
MdeModulePkg/MdeModulePkg.dec
[LibraryClasses]
PcdLib
UefiRuntimeServicesTableLib
UefiBootServicesTableLib
MemoryAllocationLib
UefiDriverEntryPoint
BaseMemoryLib
DebugLib
BaseLib

107
Vlv2TbltDevicePkg/BootScriptSaveDxe/InternalBootScriptSave.h Normal file
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/** @file
//
//
Internal header file for S3 Boot Script Saver driver.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _INTERNAL_BOOT_SCRIPT_SAVE_H_
#define _INTERNAL_BOOT_SCRIPT_SAVE_H_
#include <FrameworkDxe.h>
#include <Protocol/BootScriptSave.h>
#include <Protocol/FirmwareVolume.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Library/S3BootScriptLib.h>
#include <Library/PcdLib.h>
#include <Library/SmbusLib.h>
#include <IndustryStandard/SmBus.h>
/**
Adds a record into a specified Framework boot script table.
This function is used to store a boot script record into a given boot
script table. If the table specified by TableName is nonexistent in the
system, a new table will automatically be created and then the script record
will be added into the new table. A boot script table can add new script records
until EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable() is called. Currently, the only
meaningful table name is EFI_ACPI_S3_RESUME_SCRIPT_TABLE. This function is
responsible for allocating necessary memory for the script.
This function has a variable parameter list. The exact parameter list depends on
the OpCode that is passed into the function. If an unsupported OpCode or illegal
parameter list is passed in, this function returns EFI_INVALID_PARAMETER.
If there are not enough resources available for storing more scripts, this function returns
EFI_OUT_OF_RESOURCES.
@param[in] This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
@param[in] TableName Name of the script table. Currently, the only meaningful value is
EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
@param[in] OpCode The operation code (opcode) number.
@param[in] ... Argument list that is specific to each opcode.
@retval EFI_SUCCESS The operation succeeded. A record was added into the
specified script table.
@retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported.
If the opcode is unknow or not supported because of the PCD
Feature Flags.
@retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.
**/
EFI_STATUS
EFIAPI
BootScriptWrite (
IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
IN UINT16 TableName,
IN UINT16 OpCode,
...
);
/**
Closes the specified script table.
This function closes the specified boot script table and returns the base address
of the table. It allocates a new pool to duplicate all the boot scripts in the specified
table. Once this function is called, the specified table will be destroyed after it is
copied into the allocated pool. As a result, any attempts to add a script record into a
closed table will cause a new table to be created. The base address of the allocated pool
will be returned in Address. After using the boot script table, the caller is responsible
for freeing the pool that is allocated by this function. If the boot script table,
such as EFI_ACPI_S3_RESUME_SCRIPT_TABLE, is required to be stored in a nonperturbed
memory region, the caller should copy the table into the nonperturbed memory region by itself.
@param[in] This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
@param[in] TableName Name of the script table. Currently, the only meaningful value is
EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
@param[in] Address A pointer to the physical address where the table begins.
@retval EFI_SUCCESS The table was successfully returned.
@retval EFI_NOT_FOUND The specified table was not created previously.
@retval EFI_OUT_OF_RESOURCE Memory is insufficient to hold the reorganized boot script table.
@retval EFI_UNSUPPORTED The table type is not EFI_ACPI_S3_RESUME_SCRIPT_TABLE.

631
Vlv2TbltDevicePkg/BootScriptSaveDxe/ScriptSave.c Normal file
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/** @file
Implementation for S3 Boot Script Saver driver.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "InternalBootScriptSave.h"
EFI_HANDLE mHandle = NULL;
EFI_BOOT_SCRIPT_SAVE_PROTOCOL mS3ScriptSave = {
BootScriptWrite,
BootScriptCloseTable
};
/**
Internal function to add IO write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptIoWrite (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINTN Count;
UINT8 *Buffer;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Count = VA_ARG (Marker, UINTN);
Buffer = VA_ARG (Marker, UINT8 *);
return S3BootScriptSaveIoWrite (Width, Address, Count, Buffer);
}
/**
Internal function to add IO read/write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptIoReadWrite (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINT8 *Data;
UINT8 *DataMask;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Data = VA_ARG (Marker, UINT8 *);
DataMask = VA_ARG (Marker, UINT8 *);
return S3BootScriptSaveIoReadWrite (Width, Address, Data, DataMask);
}
/**
Internal function to add memory write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptMemWrite (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINTN Count;
UINT8 *Buffer;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Count = VA_ARG (Marker, UINTN);
Buffer = VA_ARG (Marker, UINT8 *);
return S3BootScriptSaveMemWrite (Width, Address, Count, Buffer);
}
/**
Internal function to add memory read/write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptMemReadWrite (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINT8 *Data;
UINT8 *DataMask;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Data = VA_ARG (Marker, UINT8 *);
DataMask = VA_ARG (Marker, UINT8 *);
return S3BootScriptSaveMemReadWrite (Width, Address, Data, DataMask);
}
/**
Internal function to add PciCfg write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptPciCfgWrite (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINTN Count;
UINT8 *Buffer;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Count = VA_ARG (Marker, UINTN);
Buffer = VA_ARG (Marker, UINT8 *);
return S3BootScriptSavePciCfgWrite (Width, Address, Count, Buffer);
}
/**
Internal function to PciCfg read/write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptPciCfgReadWrite (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINT8 *Data;
UINT8 *DataMask;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Data = VA_ARG (Marker, UINT8 *);
DataMask = VA_ARG (Marker, UINT8 *);
return S3BootScriptSavePciCfgReadWrite (Width, Address, Data, DataMask);
}
/**
Internal function to add PciCfg2 write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptPciCfg2Write (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINTN Count;
UINT8 *Buffer;
UINT16 Segment;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Count = VA_ARG (Marker, UINTN);
Buffer = VA_ARG (Marker, UINT8 *);
Segment = VA_ARG (Marker, UINT16);
return S3BootScriptSavePciCfg2Write (Width, Segment, Address, Count, Buffer);
}
/**
Internal function to PciCfg2 read/write opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptPciCfg2ReadWrite (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT16 Segment;
UINT64 Address;
UINT8 *Data;
UINT8 *DataMask;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
Segment = VA_ARG (Marker, UINT16);
Data = VA_ARG (Marker, UINT8 *);
DataMask = VA_ARG (Marker, UINT8 *);
return S3BootScriptSavePciCfg2ReadWrite (Width, Segment, Address, Data, DataMask);
}
/**
Internal function to add smbus excute opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptSmbusExecute (
IN VA_LIST Marker
)
{
EFI_SMBUS_DEVICE_ADDRESS SlaveAddress;
EFI_SMBUS_DEVICE_COMMAND Command;
EFI_SMBUS_OPERATION Operation;
BOOLEAN PecCheck;
VOID *Buffer;
UINTN *DataSize;
UINTN SmBusAddress;
SlaveAddress.SmbusDeviceAddress = VA_ARG (Marker, UINTN);
Command = VA_ARG (Marker, EFI_SMBUS_DEVICE_COMMAND);
Operation = VA_ARG (Marker, EFI_SMBUS_OPERATION);
PecCheck = VA_ARG (Marker, BOOLEAN);
SmBusAddress = SMBUS_LIB_ADDRESS (SlaveAddress.SmbusDeviceAddress,Command,0,PecCheck);
DataSize = VA_ARG (Marker, UINTN *);
Buffer = VA_ARG (Marker, VOID *);
return S3BootScriptSaveSmbusExecute (SmBusAddress, Operation, DataSize, Buffer);
}
/**
Internal function to add stall opcode to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptStall (
IN VA_LIST Marker
)
{
UINT32 Duration;
Duration = VA_ARG (Marker, UINT32);
return S3BootScriptSaveStall (Duration);
}
/**
Internal function to add Save jmp address according to DISPATCH_OPCODE.
We ignore "Context" parameter.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptDispatch (
IN VA_LIST Marker
)
{
VOID *EntryPoint;
EntryPoint = (VOID*)(UINTN)VA_ARG (Marker, EFI_PHYSICAL_ADDRESS);
return S3BootScriptSaveDispatch (EntryPoint);
}
/**
Internal function to add memory pool operation to the table.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptMemPoll (
IN VA_LIST Marker
)
{
S3_BOOT_SCRIPT_LIB_WIDTH Width;
UINT64 Address;
UINT8 *BitMask;
UINT8 *BitValue;
UINTN Duration;
UINTN LoopTimes;
Width = VA_ARG (Marker, S3_BOOT_SCRIPT_LIB_WIDTH);
Address = VA_ARG (Marker, UINT64);
BitMask = VA_ARG (Marker, UINT8 *);
BitValue = VA_ARG (Marker, UINT8 *);
Duration = (UINTN)VA_ARG (Marker, UINT64);
LoopTimes = (UINTN)VA_ARG (Marker, UINT64);
return S3BootScriptSaveMemPoll (Width, Address, BitMask, BitValue, Duration, LoopTimes);
}
/**
Internal function to add Save jmp address according to DISPATCH_OPCODE2.
The "Context" parameter is not ignored.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enough resource to do operation.
@retval EFI_SUCCESS Opcode is added.
**/
EFI_STATUS
BootScriptDispatch2 (
IN VA_LIST Marker
)
{
VOID *EntryPoint;
VOID *Context;
EntryPoint = (VOID*)(UINTN)VA_ARG (Marker, EFI_PHYSICAL_ADDRESS);
Context = (VOID*)(UINTN)VA_ARG (Marker, EFI_PHYSICAL_ADDRESS);
return S3BootScriptSaveDispatch2 (EntryPoint, Context);
}
/**
Internal function to add the opcode link node to the link list.
@param Marker The variable argument list to get the opcode
and associated attributes.
@retval EFI_OUT_OF_RESOURCES Not enought resource to complete the operations.
@retval EFI_SUCCESS The opcode entry is added to the link list
successfully.
**/
EFI_STATUS
BootScriptInformation (
IN VA_LIST Marker
)
{
UINT32 InformationLength;
EFI_PHYSICAL_ADDRESS Information;
InformationLength = VA_ARG (Marker, UINT32);
Information = VA_ARG (Marker, EFI_PHYSICAL_ADDRESS);
return S3BootScriptSaveInformation (InformationLength, (VOID*)(UINTN)Information);
}
/**
Adds a record into a specified Framework boot script table.
This function is used to store a boot script record into a given boot
script table. If the table specified by TableName is nonexistent in the
system, a new table will automatically be created and then the script record
will be added into the new table. A boot script table can add new script records
until EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable() is called. Currently, the only
meaningful table name is EFI_ACPI_S3_RESUME_SCRIPT_TABLE. This function is
responsible for allocating necessary memory for the script.
This function has a variable parameter list. The exact parameter list depends on
the OpCode that is passed into the function. If an unsupported OpCode or illegal
parameter list is passed in, this function returns EFI_INVALID_PARAMETER.
If there are not enough resources available for storing more scripts, this function returns
EFI_OUT_OF_RESOURCES.
@param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
@param TableName Name of the script table. Currently, the only meaningful value is
EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
@param OpCode The operation code (opcode) number.
@param ... Argument list that is specific to each opcode.
@retval EFI_SUCCESS The operation succeeded. A record was added into the
specified script table.
@retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported.
If the opcode is unknow or not supported because of the PCD
Feature Flags.
@retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.
**/
EFI_STATUS
EFIAPI
BootScriptWrite (
IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
IN UINT16 TableName,
IN UINT16 OpCode,
...
)
{
EFI_STATUS Status;
VA_LIST Marker;
if (TableName != FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE) {
//
// Only S3 boot script is supported for now.
//
return EFI_OUT_OF_RESOURCES;
}
//
// Build script according to opcode.
//
switch (OpCode) {
case EFI_BOOT_SCRIPT_IO_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptIoWrite (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptIoReadWrite (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptMemWrite (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptMemReadWrite (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptPciCfgWrite (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptPciCfgReadWrite (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptSmbusExecute (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_STALL_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptStall (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_DISPATCH_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptDispatch (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptDispatch2 (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_INFORMATION_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptInformation (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_MEM_POLL_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptMemPoll (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptPciCfg2Write (Marker);
VA_END (Marker);
break;
case EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE:
VA_START (Marker, OpCode);
Status = BootScriptPciCfg2ReadWrite (Marker);
VA_END (Marker);
break;
default:
Status = EFI_INVALID_PARAMETER;
break;
}
return Status;
}
/**
Closes the specified script table.
This function closes the specified boot script table and returns the base address
of the table. It allocates a new pool to duplicate all the boot scripts in the specified
table. Once this function is called, the specified table will be destroyed after it is
copied into the allocated pool. As a result, any attempts to add a script record into a
closed table will cause a new table to be created. The base address of the allocated pool
will be returned in Address. After using the boot script table, the caller is responsible
for freeing the pool that is allocated by this function. If the boot script table,
such as EFI_ACPI_S3_RESUME_SCRIPT_TABLE, is required to be stored in a nonperturbed
memory region, the caller should copy the table into the nonperturbed memory region by itself.
@param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
@param TableName Name of the script table. Currently, the only meaningful value is
EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
@param Address A pointer to the physical address where the table begins.
@retval EFI_SUCCESS The table was successfully returned.
@retval EFI_NOT_FOUND The specified table was not created previously.
@retval EFI_OUT_OF_RESOURCE Memory is insufficient to hold the reorganized boot script table.
@retval EFI_UNSUPPORTED The table type is not EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
**/
EFI_STATUS
EFIAPI
BootScriptCloseTable (
IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
IN UINT16 TableName,
OUT EFI_PHYSICAL_ADDRESS *Address
)
{
if (TableName != FRAMEWORK_EFI_ACPI_S3_RESUME_SCRIPT_TABLE) {
//
// Only S3 boot script is supported for now.
//
return EFI_NOT_FOUND;
}
*Address = (EFI_PHYSICAL_ADDRESS)(UINTN)S3BootScriptCloseTable ();
if (*Address == 0) {
return EFI_NOT_FOUND;
}
return EFI_SUCCESS;
}
/**
This routine is entry point of ScriptSave driver.
@param ImageHandle Handle for this drivers loaded image protocol.
@param SystemTable EFI system table.
@retval EFI_OUT_OF_RESOURCES No enough resource.
@retval EFI_SUCCESS Succesfully installed the ScriptSave driver.
@retval other Errors occured.
**/
EFI_STATUS
EFIAPI
InitializeScriptSave (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{

178
Vlv2TbltDevicePkg/Build_IFWI.bat Normal file
View File

@@ -0,0 +1,178 @@
@REM @file
@REM Windows batch file to build BIOS ROM
@REM
@REM Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
@REM This program and the accompanying materials
@REM are licensed and made available under the terms and conditions of the BSD License
@REM which accompanies this distribution. The full text of the license may be found at
@REM http://opensource.org/licenses/bsd-license.php
@REM
@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@REM
@echo off
SetLocal EnableDelayedExpansion EnableExtensions
@REM Go to root directory of the codebase.
cd ..
:: Assign initial values
set exitCode=0
set "Build_Flags= "
set "Stitch_Flags= "
set Arch=X64
set PLATFORM_PACKAGE=Vlv2TbltDevicePkg
set ROOT_DIR=%CD%
:: Parse Optional arguments
:OptLoop
if /i "%~1"=="/?" goto Usage
if /i "%~1"=="/q" (
set Build_Flags=%Build_Flags% /q
shift
goto OptLoop
)
if /i "%~1"=="/l" (
set Build_Flags=%Build_Flags% /l
shift
goto OptLoop
)
if /i "%~1" == "/c" (
set Build_Flags=%Build_Flags% /c
shift
goto OptLoop
)
if /i "%~1" == "/ECP" (
set Build_Flags=%Build_Flags% /ecp
shift
goto OptLoop
)
if /i "%~1"=="/s" (
set Build_Flags=%Build_Flags% /s
shift
goto OptLoop
)
if /i "%~1"=="/x64" (
set Arch=X64
set Build_Flags=%Build_Flags% /x64
shift
goto OptLoop
)
if /i "%~1"=="/IA32" (
set Arch=IA32
set Build_Flags=%Build_Flags% /IA32
shift
goto OptLoop
)
if /i "%~1"=="/nG" (
set Stitch_Flags=%Stitch_Flags% /nG
shift
goto OptLoop
)
if /i "%~1"=="/nM" (
set Stitch_Flags=%Stitch_Flags% /nM
shift
goto OptLoop
)
if /i "%~1"=="/nB" (
set Stitch_Flags=%Stitch_Flags% /nB
shift
goto OptLoop
)
:: Require 2 input parameters
if "%~2"=="" goto Usage
:: Assign required arguments
set Platform_Type=%~1
set Build_Target=%~2
if "%~3"=="" (
set "IFWI_Suffix= "
) else set "IFWI_Suffix=/S %~3"
:: Build BIOS
echo ======================================================================
echo Build_IFWI: Calling BIOS build Script...
if "%Platform_Type%" == "BYTC" (
call %PLATFORM_PACKAGE%\bld_vlv_cr.bat %Build_Flags% %Platform_Type% %Build_Target%
) else (
call %PLATFORM_PACKAGE%\bld_vlv.bat %Build_Flags% %Platform_Type% %Build_Target%
)
if %ERRORLEVEL% NEQ 0 (
echo echo -- Error Building BIOS & echo.
set exitCode=1
goto exit
)
echo.
echo Finished Building BIOS.
@REM Set BIOS_ID environment variable here.
call Conf\BiosId.bat
echo BIOS_ID=%BIOS_ID%
:: Set the Board_Id, Build_Type, Version_Major, and Version_Minor environment variables
find /v "#" Conf\BiosId.env > ver_strings
for /f "tokens=1,3" %%i in (ver_strings) do set %%i=%%j
del /f/q ver_strings >nul
set BIOS_Name=%BOARD_ID%_%Arch%_%BUILD_TYPE%_%VERSION_MAJOR%_%VERSION_MINOR%.ROM
:: Start Integration process
echo ======================================================================
echo Build_IFWI: Calling IFWI Stitching Script...
if "%Platform_Type%" == "BYTC" (
pushd %PLATFORM_PACKAGE%\Stitch_CR
) else (
pushd %PLATFORM_PACKAGE%\Stitch
)
:: IFWIStitch.bat [/nG] [/nM] [/nB] [/B BIOS.rom] [/C StitchConfig] [/S IFWISuffix]
call IFWIStitch.bat %Stitch_Flags% /B ..\..\%BIOS_Name% %IFWI_Suffix%
@echo off
popd
if %ERRORLEVEL% NEQ 0 (
echo echo -- Error Stitching %BIOS_Nam% & echo.
set exitCode=1
)
echo.
echo Build_IFWI is finished.
echo The final IFWI file is located in %ROOT_DIR%\Vlv2TbltDevicePkg\Stitch\
echo ======================================================================
goto Exit
:Usage
echo Script to build BIOS firmware and stitch the entire IFWI.
echo.
echo Usage: Build_IFWI.bat [options] PlatformType BuildTarget [IFWI Suffix]
echo.
echo /q Quiet mode. Only display Fatal Errors (slightly faster)
echo /l Log a copy of the build output to EDK2.log
echo /c CleanAll before building
echo /ecp ECP build enable
echo /src Build silicon source code (default binary)
echo /x64 Set Arch to X64 (default: X64)
echo /IA32 Set Arch to IA32 (default: X64)
echo /nG Do NOT update the GOP driver when stitching (ie keep src version)
echo /nM Do NOT update the Microcode when stitching (ie keep src version)
echo /nB Do NOT create a backup of BIOS.ROM before modifying it for Stitch
echo.
echo Platform Types: MNW2
echo Build Targets: Release, Debug
echo IFWI Suffix: Suffix to append to end of IFWI filename (default: MM_DD_YYYY)
echo.
echo See Stitch/Stitch_Config.txt for additional stitching settings.
echo.
set exitCode=1
:Exit
@REM CD to platform package.
cd %ROOT_DIR%\Vlv2TbltDevicePkg
exit /b %exitCode%
EndLocal

101
Vlv2TbltDevicePkg/Build_IFWI.sh Normal file
View File

@@ -0,0 +1,101 @@
##**********************************************************************
## Function define
##**********************************************************************
function Usage ( ) {
echo
echo "Script to build BIOS firmware and stitch the entire IFWI."
echo
echo "Usage: Build_IFWI.bat PlatformType BuildTarget "
echo
echo
echo " Platform Types: MNW2"
echo " Build Targets: Release, Debug"
echo
echo " See Stitch/Stitch_Config.txt for additional stitching settings."
echo
echo
echo "Press any key......"
read
exit 0
}
## Assign initial values
exitCode=0
Build_Flags=
Stitch_Flags=
Arch=X64
PLATFORM_PACKAGE=Vlv2TbltDevicePkg
## Parse Optional arguments
if [ "$1" == "/?" ]; then
Usage
fi
for (( i=1; i<=$#; ))
do
if [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/Q" ]; then
Build_Flags="$Build_Flags /q"
shift
elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/L" ]; then
Build_Flags="$Build_Flags /l"
shift
elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/C" ]; then
Build_Flags="$Build_Flags /c"
shift
elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/ECP" ]; then
Build_Flags="$Build_Flags /ecp"
shift
elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/X64" ]; then
Arch=X64
Build_Flags="$Build_Flags /x64"
shift
elif [ "$1" == "/nG" ]; then
Stitch_Flags="$Stitch_Flags /nG"
shift
elif [ "$1" == "/nM" ]; then
Stitch_Flags="$Stitch_Flags /nM"
shift
elif [ "$1" == "/nB" ]; then
Stitch_Flags="$Stitch_Flags /nB"
shift
elif [ "$1" == "/nV" ]; then
Stitch_Flags="$Stitch_Flags /nV"
shift
else
break
fi
done
## Require 2 input parameters
if [ "$2" == "" ]; then
Usage
fi
## Assign required arguments
Platform_Type=$1
Build_Target=$2
if [ "$3" == "" ]; then
IFWI_Suffix=
else
IFWI_Suffix="/S $3"
fi
## Go to root directory
cd ..
## Build BIOS
echo "======================================================================"
echo "Build_IFWI: Calling BIOS build Script..."
./$PLATFORM_PACKAGE/bld_vlv.sh $Build_Flags $Platform_Type $Build_Target
echo
echo Finished Building BIOS.
## Start Integration process
echo ======================================================================
echo Skip "Build_IFWI: Calling IFWI Stitching Script..."
echo
echo Build_IFWI is finished.
echo The final IFWI file is located in Stitch
echo ======================================================================

BIN
Vlv2TbltDevicePkg/FCE.exe Normal file
View File

Binary file not shown.

BIN
Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin Normal file
View File

Binary file not shown.

48
Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.c Normal file
View File

@@ -0,0 +1,48 @@
/** @file
This PEIM will parse the hoblist from fsp and report them into pei core.
This file contains the main entrypoint of the PEIM.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/MasterBootMode.h>
static EFI_PEI_PPI_DESCRIPTOR mPpiList[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gEfiPeiMasterBootModePpiGuid,
NULL
},
};
/**
This is the entrypoint of PEIM
@param FileHandle Handle of the file being invoked.
@param PeiServices Describes the list of possible PEI Services.
@retval EFI_SUCCESS if it completed successfully.
**/
EFI_STATUS
EFIAPI
BootModePeiEntryPoint (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
(*PeiServices)->SetBootMode(PeiServices, BOOT_WITH_FULL_CONFIGURATION);
(*PeiServices)->InstallPpi (PeiServices, &mPpiList[0]);
return EFI_SUCCESS;
}

45
Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf Normal file
View File

@@ -0,0 +1,45 @@
## @file
# FSP PEI Module
#
# Parses the hoblist from fsp and report them into pei core. It will install
# the memory as required.
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = BootModePeim
FILE_GUID = 2B1D0832-2184-4C8F-A90D-8E4AF9DE5BCD
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = BootModePeiEntryPoint
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32
#
[Sources]
BootModePei.c
[Packages]
MdePkg/MdePkg.dec
[LibraryClasses]
PeimEntryPoint
[Ppis]
gEfiPeiMasterBootModePpiGuid
[Depex]
TRUE

387
Vlv2TbltDevicePkg/FspSupport/Library/PeiFspHobProcessLibVlv2/FspHobProcessLibVlv2.c Normal file
View File

@@ -0,0 +1,387 @@
/** @file
Null instance of Platform Sec Lib.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/PeiServicesLib.h>
#include <Library/PeiServicesTablePointerLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/FspPlatformInfoLib.h>
#include <Guid/GuidHobFsp.h>
#include <Guid/MemoryTypeInformation.h>
#include <Ppi/Capsule.h>
#include <PlatformFspLib.h>
#include <Guid/SmramMemoryReserve.h>
EFI_GUID gFspReservedMemoryResourceHobTsegGuid = {0xd038747c, 0xd00c, 0x4980, {0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55}};
//
// Additional pages are used by DXE memory manager.
// It should be consistent between RetrieveRequiredMemorySize() and GetPeiMemSize()
//
#define PEI_ADDITIONAL_MEMORY_SIZE (16 * EFI_PAGE_SIZE)
/**
Get the mem size in memory type infromation table.
@param PeiServices PEI Services table.
@return the mem size in memory type infromation table.
**/
UINT64
GetMemorySizeInMemoryTypeInformation (
IN EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
EFI_PEI_HOB_POINTERS Hob;
EFI_MEMORY_TYPE_INFORMATION *MemoryData;
UINT8 Index;
UINTN TempPageNum;
MemoryData = NULL;
Status = (*PeiServices)->GetHobList (PeiServices, (VOID **) &Hob.Raw);
while (!END_OF_HOB_LIST (Hob)) {
if (Hob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION &&
CompareGuid (&Hob.Guid->Name, &gEfiMemoryTypeInformationGuid)) {
MemoryData = (EFI_MEMORY_TYPE_INFORMATION *) (Hob.Raw + sizeof (EFI_HOB_GENERIC_HEADER) + sizeof (EFI_GUID));
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
if (MemoryData == NULL) {
return 0;
}
TempPageNum = 0;
for (Index = 0; MemoryData[Index].Type != EfiMaxMemoryType; Index++) {
//
// Accumulate default memory size requirements
//
TempPageNum += MemoryData[Index].NumberOfPages;
}
return TempPageNum * EFI_PAGE_SIZE;
}
/**
Get the mem size need to be reserved in PEI phase.
@param PeiServices PEI Services table.
@return the mem size need to be reserved in PEI phase.
**/
UINT64
RetrieveRequiredMemorySize (
IN EFI_PEI_SERVICES **PeiServices
)
{
UINT64 Size;
Size = GetMemorySizeInMemoryTypeInformation (PeiServices);
return Size + PEI_ADDITIONAL_MEMORY_SIZE;
}
/**
Get the mem size need to be consumed and reserved in PEI phase.
@param PeiServices PEI Services table.
@param BootMode Current boot mode.
@return the mem size need to be consumed and reserved in PEI phase.
**/
UINT64
GetPeiMemSize (
IN EFI_PEI_SERVICES **PeiServices,
IN UINT32 BootMode
)
{
UINT64 Size;
UINT64 MinSize;
if (BootMode == BOOT_IN_RECOVERY_MODE) {
return PcdGet32 (PcdPeiRecoveryMinMemSize);
}
Size = GetMemorySizeInMemoryTypeInformation (PeiServices);
if (BootMode == BOOT_ON_FLASH_UPDATE) {
//
// Maybe more size when in CapsuleUpdate phase ?
//
MinSize = PcdGet32 (PcdPeiMinMemSize);
} else {
MinSize = PcdGet32 (PcdPeiMinMemSize);
}
return MinSize + Size + PEI_ADDITIONAL_MEMORY_SIZE;
}
/**
BIOS process FspBobList.
@param FspHobList Pointer to the HOB data structure produced by FSP.
@return If platform process the FSP hob list successfully.
**/
EFI_STATUS
EFIAPI
FspHobProcess (
IN VOID *FspHobList
)
{
EFI_PEI_HOB_POINTERS Hob;
UINT64 LowMemorySize;
UINT64 FspMemorySize;
EFI_PHYSICAL_ADDRESS FspMemoryBase;
UINT64 PeiMemSize;
EFI_PHYSICAL_ADDRESS PeiMemBase;
UINT64 S3PeiMemSize;
EFI_PHYSICAL_ADDRESS S3PeiMemBase;
BOOLEAN FoundFspMemHob;
EFI_STATUS Status;
EFI_BOOT_MODE BootMode;
PEI_CAPSULE_PPI *Capsule;
VOID *CapsuleBuffer;
UINTN CapsuleBufferLength;
UINT64 RequiredMemSize;
EFI_PEI_SERVICES **PeiServices;
UINT64 TsegSize;
EFI_PHYSICAL_ADDRESS TsegBase;
BOOLEAN FoundTsegHob;
PeiServices = (EFI_PEI_SERVICES **)GetPeiServicesTablePointer ();
PeiServicesGetBootMode (&BootMode);
PeiMemBase = 0;
LowMemorySize = 0;
FspMemorySize = 0;
FspMemoryBase = 0;
FoundFspMemHob = FALSE;
TsegSize = 0;
TsegBase = 0;
FoundTsegHob = FALSE;
//
// Parse the hob list from fsp
// Report all the resource hob except the memory between 1M and 4G
//
Hob.Raw = (UINT8 *)(UINTN)FspHobList;
DEBUG((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
while ((Hob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, Hob.Raw)) != NULL) {
DEBUG((DEBUG_INFO, "\nResourceType: 0x%x\n", Hob.ResourceDescriptor->ResourceType));
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) ||
(Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED)) {
DEBUG((DEBUG_INFO, "ResourceAttribute: 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
DEBUG((DEBUG_INFO, "PhysicalStart: 0x%x\n", Hob.ResourceDescriptor->PhysicalStart));
DEBUG((DEBUG_INFO, "ResourceLength: 0x%x\n", Hob.ResourceDescriptor->ResourceLength));
DEBUG((DEBUG_INFO, "Owner: %g\n\n", &Hob.ResourceDescriptor->Owner));
}
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) // Found the low memory length below 4G
&& (Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB)
&& (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength <= BASE_4GB)) {
LowMemorySize += Hob.ResourceDescriptor->ResourceLength;
Hob.Raw = GET_NEXT_HOB (Hob);
continue;
}
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) // Found the low memory length below 4G
&& (Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB)
&& (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength <= BASE_4GB)
&& (CompareGuid (&Hob.ResourceDescriptor->Owner, &gFspReservedMemoryResourceHobGuid))) {
FoundFspMemHob = TRUE;
FspMemoryBase = Hob.ResourceDescriptor->PhysicalStart;
FspMemorySize = Hob.ResourceDescriptor->ResourceLength;
DEBUG((DEBUG_INFO, "Find fsp mem hob, base 0x%x, len 0x%x\n", FspMemoryBase, FspMemorySize));
}
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) // Found the low memory length below 4G
&& (Hob.ResourceDescriptor->PhysicalStart >= 0x100000)
&& (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength <= 0x100000000)
&& (CompareGuid (&Hob.ResourceDescriptor->Owner, &gFspReservedMemoryResourceHobTsegGuid))) {
FoundTsegHob = TRUE;
TsegBase = Hob.ResourceDescriptor->PhysicalStart;
if ((Hob.ResourceDescriptor->ResourceLength == 0 ) || (Hob.ResourceDescriptor->ResourceLength > 0x800000)){
Hob.ResourceDescriptor->ResourceLength = 0x800000;
}
TsegSize = Hob.ResourceDescriptor->ResourceLength;
DEBUG((EFI_D_ERROR, "Find Tseg mem hob, base 0x%lx, len 0x%lx\n", TsegBase, TsegSize));
}
//
// Report the resource hob
//
BuildResourceDescriptorHob (
Hob.ResourceDescriptor->ResourceType,
Hob.ResourceDescriptor->ResourceAttribute,
Hob.ResourceDescriptor->PhysicalStart,
Hob.ResourceDescriptor->ResourceLength
);
Hob.Raw = GET_NEXT_HOB (Hob);
}
if (!FoundFspMemHob) {
DEBUG((DEBUG_INFO, "Didn't find the fsp used memory information.\n"));
//ASSERT(FALSE);
}
DEBUG((DEBUG_INFO, "LowMemorySize: 0x%x.\n", LowMemorySize));
DEBUG((DEBUG_INFO, "FspMemoryBase: 0x%x.\n", FspMemoryBase));
DEBUG((DEBUG_INFO, "FspMemorySize: 0x%x.\n", FspMemorySize));
if (BootMode == BOOT_ON_S3_RESUME) {
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
// EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
BASE_1MB,
LowMemorySize
);
Status = GetS3MemoryInfo (&S3PeiMemBase, &S3PeiMemSize);
ASSERT_EFI_ERROR (Status);
DEBUG((DEBUG_INFO, "S3 memory %Xh - %Xh bytes\n", S3PeiMemBase, S3PeiMemSize));
//
// Make sure Stack and PeiMemory are not overlap - JYAO1
//
Status = PeiServicesInstallPeiMemory (
S3PeiMemBase,
S3PeiMemSize
);
ASSERT_EFI_ERROR (Status);
} else {
PeiMemSize = GetPeiMemSize (PeiServices, BootMode);
DEBUG((DEBUG_INFO, "PEI memory size = %Xh bytes\n", PeiMemSize));
//
// Capsule mode
//
Capsule = NULL;
CapsuleBuffer = NULL;
CapsuleBufferLength = 0;
if (BootMode == BOOT_ON_FLASH_UPDATE) {
Status = PeiServicesLocatePpi (
&gPeiCapsulePpiGuid,
0,
NULL,
(VOID **) &Capsule
);
ASSERT_EFI_ERROR (Status);
if (Status == EFI_SUCCESS) {
//
// Make sure Stack and CapsuleBuffer are not overlap - JYAO1
//
CapsuleBuffer = (VOID *)(UINTN)BASE_1MB;
CapsuleBufferLength = (UINTN)(LowMemorySize - PeiMemSize);
//
// Call the Capsule PPI Coalesce function to coalesce the capsule data.
//
Status = Capsule->Coalesce (PeiServices, &CapsuleBuffer, &CapsuleBufferLength);
}
}
RequiredMemSize = RetrieveRequiredMemorySize (PeiServices);
DEBUG((DEBUG_INFO, "Required memory size = %Xh bytes\n", RequiredMemSize));
//
// Report the main memory
//
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
(
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_TESTED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
),
BASE_1MB,
LowMemorySize
);
//
// Make sure Stack and CapsuleBuffer are not overlap - JYAO1
//
//
// Install efi memory
//
PeiMemBase = BASE_1MB + LowMemorySize - PeiMemSize;
Status = PeiServicesInstallPeiMemory (
PeiMemBase,
PeiMemSize - RequiredMemSize
);
ASSERT_EFI_ERROR (Status);
if (Capsule != NULL) {
Status = Capsule->CreateState (PeiServices, CapsuleBuffer, CapsuleBufferLength);
}
}
//
// Report GUIDed HOB for reserving SMRAM regions
//
if (FoundTsegHob) {
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock;
SmramHobDescriptorBlock = BuildGuidHob (
&gEfiSmmPeiSmramMemoryReserveGuid,
sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK)
);
ASSERT (SmramHobDescriptorBlock != NULL);
SmramHobDescriptorBlock->NumberOfSmmReservedRegions = 1;
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = TsegBase;
SmramHobDescriptorBlock->Descriptor[0].CpuStart = TsegBase;
SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = TsegSize;
SmramHobDescriptorBlock->Descriptor[0].RegionState = EFI_SMRAM_CLOSED;
}
//
// NV Storage Hob
//
//
// Other hob for platform
//
PlatformHobCreateFromFsp ( PeiServices, FspHobList);
return EFI_SUCCESS;
}

79
Vlv2TbltDevicePkg/FspSupport/Library/PeiFspHobProcessLibVlv2/FspHobProcessLibVlv2.inf Normal file
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@@ -0,0 +1,79 @@
## @file
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PeiFspHobProcessLibVlv2
FILE_GUID = C7B7070B-E5A8-4b86-9110-BDCA1095F496
MODULE_TYPE = SEC
VERSION_STRING = 1.0
LIBRARY_CLASS = FspHobProcessLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspHobProcessLibVlv2.c
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
IntelFspPkg/IntelFspPkg.dec
IntelFspWrapperPkg/IntelFspWrapperPkg.dec
Vlv2TbltDevicePkg/PlatformPkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
HobLib
DebugLib
FspPlatformInfoLib
PeiServicesLib
PeiServicesTablePointerLib
PlatformFspLib
[Pcd]
gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize
gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize
[Guids]
gFspReservedMemoryResourceHobGuid
gEfiMemoryTypeInformationGuid
gEfiSmmPeiSmramMemoryReserveGuid
[Ppis]
gPeiCapsulePpiGuid

150
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/FspPlatformSecLibVlv2.c Normal file
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/** @file
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/SecPlatformInformation.h>
#include <Ppi/SecPerformance.h>
#include <Ppi/TemporaryRamSupport.h>
#include <Library/LocalApicLib.h>
/**
This interface conveys state information out of the Security (SEC) phase into PEI.
@param PeiServices Pointer to the PEI Services Table.
@param StructureSize Pointer to the variable describing size of the input buffer.
@param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_BUFFER_TOO_SMALL The buffer was too small.
**/
EFI_STATUS
EFIAPI
SecPlatformInformation (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN OUT UINT64 *StructureSize,
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
);
/**
This interface conveys performance information out of the Security (SEC) phase into PEI.
This service is published by the SEC phase. The SEC phase handoff has an optional
EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
PEI Foundation. As such, if the platform supports collecting performance data in SEC,
this information is encapsulated into the data structure abstracted by this service.
This information is collected for the boot-strap processor (BSP) on IA-32.
@param[in] PeiServices The pointer to the PEI Services Table.
@param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
@param[out] Performance The pointer to performance data collected in SEC phase.
@retval EFI_SUCCESS The data was successfully returned.
**/
EFI_STATUS
EFIAPI
SecGetPerformance (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN PEI_SEC_PERFORMANCE_PPI *This,
OUT FIRMWARE_SEC_PERFORMANCE *Performance
);
/**
This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
permanent memory.
@param PeiServices Pointer to the PEI Services Table.
@param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
Temporary RAM contents.
@param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
Temporary RAM contents.
@param CopySize Amount of memory to migrate from temporary to permanent memory.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
TemporaryMemoryBase > PermanentMemoryBase.
**/
EFI_STATUS
EFIAPI
SecTemporaryRamSupport (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
IN UINTN CopySize
);
EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = {
SecPlatformInformation
};
PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {
SecGetPerformance
};
EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {
SecTemporaryRamSupport
};
EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
&gEfiSecPlatformInformationPpiGuid,
&mSecPlatformInformationPpi
},
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
&gPeiSecPerformancePpiGuid,
&mSecPerformancePpi
},
{
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gEfiTemporaryRamSupportPpiGuid,
&gSecTemporaryRamSupportPpi
},
};
/**
A developer supplied function to perform platform specific operations.
It's a developer supplied function to perform any operations appropriate to a
given platform. It's invoked just before passing control to PEI core by SEC
core. Platform developer may modify the SecCoreData passed to PEI Core.
It returns a platform specific PPI list that platform wishes to pass to PEI core.
The Generic SEC core module will merge this list to join the final list passed to
PEI core.
@param SecCoreData The same parameter as passing to PEI core. It
could be overridden by this function.
@return The platform specific PPI list to be passed to PEI core or
NULL if there is no need of such platform specific PPI list.
**/
EFI_PEI_PPI_DESCRIPTOR *
EFIAPI
SecPlatformMain (
IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
)
{
EFI_PEI_PPI_DESCRIPTOR *PpiList;
InitializeApicTimer (0, (UINT32) -1, TRUE, 5);
PpiList = &mPeiSecPlatformPpi[0];
return PpiList;
}

87
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/FspPlatformSecLibVlv2.inf Normal file
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## @file
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = SecPeiFspPlatformSecLibVlv2
FILE_GUID = 6653876C-F6A1-45BB-A027-20455093BC6D
MODULE_TYPE = SEC
VERSION_STRING = 1.0
LIBRARY_CLASS = FspPlatformSecLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
################################################################################
#
# Sources Section - list of files that are required for the build to succeed.
#
################################################################################
[Sources]
FspPlatformSecLibVlv2.c
SecRamInitData.c
SaveSecContext.c
SecPlatformInformation.c
SecGetPerformance.c
SecTempRamSupport.c
PlatformInit.c
UartInit.c
[Sources.IA32]
Ia32/SecEntry.asm
Ia32/PeiCoreEntry.asm
Ia32/AsmSaveSecContext.asm
Ia32/Stack.asm
################################################################################
#
# Package Dependency Section - list of Package files that are required for
# this module.
#
################################################################################
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
IntelFspWrapperPkg/IntelFspWrapperPkg.dec
[LibraryClasses]
LocalApicLib
SerialPortLib
[Ppis]
gEfiSecPlatformInformationPpiGuid
gPeiSecPerformancePpiGuid
gEfiTemporaryRamSupportPpiGuid
[Pcd]
gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase
gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
[FixedPcd]
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize
gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize

51
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/AsmSaveSecContext.asm Normal file
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@@ -0,0 +1,51 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; SecEntry.asm
;
; Abstract:
;
; This is the code that goes from real-mode to protected mode.
; It consumes the reset vector, calls two basic APIs from FSP binary.
;
;------------------------------------------------------------------------------
.686p
.xmm
.model flat,c
.code
;----------------------------------------------------------------------------
; MMX Usage:
; MM0 = BIST State
; MM5 = Save time-stamp counter value high32bit
; MM6 = Save time-stamp counter value low32bit.
;
; It should be same as SecEntry.asm and PeiCoreEntry.asm.
;----------------------------------------------------------------------------
AsmSaveBistValue PROC PUBLIC
mov eax, [esp+4]
movd mm0, eax
ret
AsmSaveBistValue ENDP
AsmSaveTickerValue PROC PUBLIC
mov eax, [esp+4]
movd mm6, eax
mov eax, [esp+8]
movd mm5, eax
ret
AsmSaveTickerValue ENDP
END

51
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/Fsp.inc Normal file
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@@ -0,0 +1,51 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; Fsp.inc
;
; Abstract:
;
; Fsp related definitions
;
;------------------------------------------------------------------------------
;
; Fv Header
;
FVH_SIGINATURE_OFFSET EQU 028h
FVH_SIGINATURE_VALID_VALUE EQU 04856465Fh ; valid signature:_FVH
FVH_HEADER_LENGTH_OFFSET EQU 030h
FVH_EXTHEADER_OFFSET_OFFSET EQU 034h
FVH_EXTHEADER_SIZE_OFFSET EQU 010h
;
; Ffs Header
;
FSP_HEADER_GUID_DWORD1 EQU 0912740BEh
FSP_HEADER_GUID_DWORD2 EQU 047342284h
FSP_HEADER_GUID_DWORD3 EQU 0B08471B9h
FSP_HEADER_GUID_DWORD4 EQU 00C3F3527h
FFS_HEADER_SIZE_VALUE EQU 018h
;
; Section Header
;
SECTION_HEADER_TYPE_OFFSET EQU 03h
RAW_SECTION_HEADER_SIZE_VALUE EQU 04h
;
; Fsp Header
;
FSP_HEADER_IMAGEBASE_OFFSET EQU 01Ch
FSP_HEADER_TEMPRAMINIT_OFFSET EQU 030h

141
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/PeiCoreEntry.asm Normal file
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;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; SecEntry.asm
;
; Abstract:
;
; This is the code that goes from real-mode to protected mode.
; It consumes the reset vector, calls two basic APIs from FSP binary.
;
;------------------------------------------------------------------------------
.686p
.xmm
.model flat, c
.code
EXTRN SecStartup:NEAR
EXTRN PlatformInit:NEAR
CallPeiCoreEntryPoint PROC PUBLIC
;
; Obtain the hob list pointer
;
mov eax, [esp+4]
;
; Obtain the stack information
; ECX: start of range
; EDX: end of range
;
mov ecx, [esp+8]
mov edx, [esp+0Ch]
;
; Platform init
;
pushad
push edx
push ecx
push eax
call PlatformInit
pop eax
pop eax
pop eax
popad
;
; Set stack top pointer
;
mov esp, edx
;
; Push the hob list pointer
;
push eax
;
; Save the value
; ECX: start of range
; EDX: end of range
;
mov ebp, esp
push ecx
push edx
;
; Push processor count to stack first, then BIST status (AP then BSP)
;
mov eax, 1
cpuid
shr ebx, 16
and ebx, 0000000FFh
cmp bl, 1
jae PushProcessorCount
;
; Some processors report 0 logical processors. Effectively 0 = 1.
; So we fix up the processor count
;
inc ebx
PushProcessorCount:
push ebx
;
; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
; for all processor threads
;
xor ecx, ecx
mov cl, bl
PushBist:
movd eax, mm0
push eax
loop PushBist
; Save Time-Stamp Counter
movd eax, mm5
push eax
movd eax, mm6
push eax
;
; Pass entry point of the PEI core
;
mov edi, 0FFFFFFE0h
push DWORD PTR ds:[edi]
;
; Pass BFV into the PEI Core
;
mov edi, 0FFFFFFFCh
push DWORD PTR ds:[edi]
;
; Pass stack size into the PEI Core
;
mov ecx, [ebp - 4]
mov edx, [ebp - 8]
push ecx ; RamBase
sub edx, ecx
push edx ; RamSize
;
; Pass Control into the PEI Core
;
call SecStartup
CallPeiCoreEntryPoint ENDP
END

344
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/SecEntry.asm Normal file
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;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; SecEntry.asm
;
; Abstract:
;
; This is the code that goes from real-mode to protected mode.
; It consumes the reset vector, calls two basic APIs from FSP binary.
;
;------------------------------------------------------------------------------
INCLUDE Fsp.inc
.686p
.xmm
.model small, c
EXTRN CallPeiCoreEntryPoint:NEAR
EXTRN TempRamInitParams:FAR
; Pcds
EXTRN PcdGet32 (PcdFlashFvFspBase):DWORD
EXTRN PcdGet32 (PcdFlashFvFspSize):DWORD
_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
;----------------------------------------------------------------------------
;
; Procedure: _ModuleEntryPoint
;
; Input: None
;
; Output: None
;
; Destroys: Assume all registers
;
; Description:
;
; Transition to non-paged flat-model protected mode from a
; hard-coded GDT that provides exactly two descriptors.
; This is a bare bones transition to protected mode only
; used for a while in PEI and possibly DXE.
;
; After enabling protected mode, a far jump is executed to
; transfer to PEI using the newly loaded GDT.
;
; Return: None
;
; MMX Usage:
; MM0 = BIST State
; MM5 = Save time-stamp counter value high32bit
; MM6 = Save time-stamp counter value low32bit.
;
;----------------------------------------------------------------------------
align 4
_ModuleEntryPoint PROC NEAR C PUBLIC
fninit ; clear any pending Floating point exceptions
;
; Store the BIST value in mm0
;
movd mm0, eax
;
; Save time-stamp counter value
; rdtsc load 64bit time-stamp counter to EDX:EAX
;
rdtsc
movd mm5, edx
movd mm6, eax
;
; Load the GDT table in GdtDesc
;
mov esi, OFFSET GdtDesc
DB 66h
lgdt fword ptr cs:[si]
;
; Transition to 16 bit protected mode
;
mov eax, cr0 ; Get control register 0
or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)
mov cr0, eax ; Activate protected mode
mov eax, cr4 ; Get control register 4
or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
mov cr4, eax
;
; Now we're in 16 bit protected mode
; Set up the selectors for 32 bit protected mode entry
;
mov ax, SYS_DATA_SEL
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
;
; Transition to Flat 32 bit protected mode
; The jump to a far pointer causes the transition to 32 bit mode
;
mov esi, offset ProtectedModeEntryLinearAddress
jmp fword ptr cs:[si]
_ModuleEntryPoint ENDP
_TEXT_REALMODE ENDS
_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'
ASSUME CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE
;----------------------------------------------------------------------------
;
; Procedure: ProtectedModeEntryPoint
;
; Input: None
;
; Output: None
;
; Destroys: Assume all registers
;
; Description:
;
; This function handles:
; Call two basic APIs from FSP binary
; Initializes stack with some early data (BIST, PEI entry, etc)
;
; Return: None
;
;----------------------------------------------------------------------------
align 4
ProtectedModeEntryPoint PROC NEAR PUBLIC
; Find the fsp info header
mov edi, PcdGet32 (PcdFlashFvFspBase)
mov ecx, PcdGet32 (PcdFlashFvFspSize)
mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
cmp eax, FVH_SIGINATURE_VALID_VALUE
jnz FspHeaderNotFound
xor eax, eax
mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
cmp ax, 0
jnz FspFvExtHeaderExist
xor eax, eax
mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
add edi, eax
jmp FspCheckFfsHeader
FspFvExtHeaderExist:
add edi, eax
mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
add edi, eax
; Round up to 8 byte alignment
mov eax, edi
and al, 07h
jz FspCheckFfsHeader
and edi, 0FFFFFFF8h
add edi, 08h
FspCheckFfsHeader:
; Check the ffs guid
mov eax, dword ptr [edi]
cmp eax, FSP_HEADER_GUID_DWORD1
jnz FspHeaderNotFound
mov eax, dword ptr [edi + 4]
cmp eax, FSP_HEADER_GUID_DWORD2
jnz FspHeaderNotFound
mov eax, dword ptr [edi + 8]
cmp eax, FSP_HEADER_GUID_DWORD3
jnz FspHeaderNotFound
mov eax, dword ptr [edi + 0Ch]
cmp eax, FSP_HEADER_GUID_DWORD4
jnz FspHeaderNotFound
add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
; Check the section type as raw section
mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
cmp al, 019h
jnz FspHeaderNotFound
add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
jmp FspHeaderFound
FspHeaderNotFound:
jmp $
FspHeaderFound:
; Get the fsp TempRamInit Api address
mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
; Setup the hardcode stack
mov esp, OFFSET TempRamInitStack
; Call the fsp TempRamInit Api
jmp eax
TempRamInitDone:
cmp eax, 0
jnz FspApiFailed
; ECX: start of range
; EDX: end of range
mov esp, edx
push edx
push ecx
push eax ; zero - no hob list yet
call CallPeiCoreEntryPoint
FspApiFailed:
jmp $
align 10h
TempRamInitStack:
DD OFFSET TempRamInitDone
DD OFFSET TempRamInitParams
ProtectedModeEntryPoint ENDP
;
; ROM-based Global-Descriptor Table for the Tiano PEI Phase
;
align 16
PUBLIC BootGdtTable
;
; GDT[0]: 0x00: Null entry, never used.
;
NULL_SEL EQU $ - GDT_BASE ; Selector [0]
GDT_BASE:
BootGdtTable DD 0
DD 0
;
; Linear data segment descriptor
;
LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 092h ; present, ring 0, data, expand-up, writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; Linear code segment descriptor
;
LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 09Bh ; present, ring 0, data, expand-up, not-writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; System data segment descriptor
;
SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 093h ; present, ring 0, data, expand-up, not-writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; System code segment descriptor
;
SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0
DB 09Ah ; present, ring 0, data, expand-up, writable
DB 0CFh ; page-granular, 32-bit
DB 0
;
; Spare segment descriptor
;
SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]
DW 0FFFFh ; limit 0xFFFFF
DW 0 ; base 0
DB 0Eh ; Changed from F000 to E000.
DB 09Bh ; present, ring 0, code, expand-up, writable
DB 00h ; byte-granular, 16-bit
DB 0
;
; Spare segment descriptor
;
SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]
DW 0FFFFh ; limit 0xFFFF
DW 0 ; base 0
DB 0
DB 093h ; present, ring 0, data, expand-up, not-writable
DB 00h ; byte-granular, 16-bit
DB 0
;
; Spare segment descriptor
;
SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]
DW 0 ; limit 0
DW 0 ; base 0
DB 0
DB 0 ; present, ring 0, data, expand-up, writable
DB 0 ; page-granular, 32-bit
DB 0
GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes
;
; GDT Descriptor
;
GdtDesc: ; GDT descriptor
DW GDT_SIZE - 1 ; GDT limit
DD OFFSET BootGdtTable ; GDT base address
ProtectedModeEntryLinearAddress LABEL FWORD
ProtectedModeEntryLinearOffset LABEL DWORD
DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code
DW LINEAR_CODE_SEL
_TEXT_PROTECTED_MODE ENDS
END

77
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/Stack.S Normal file
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#------------------------------------------------------------------------------
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Abstract:
#
# Switch the stack from temporary memory to permenent memory.
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# SecSwitchStack (
# UINT32 TemporaryMemoryBase,
# UINT32 PermenentMemoryBase
# )#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX (SecSwitchStack)
ASM_PFX(SecSwitchStack):
#
# Save standard registers so they can be used to change stack
#
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
#
# !!CAUTION!! this function address's is pushed into stack after
# migration of whole temporary memory, so need save it to permenent
# memory at first!
#
movl 20(%esp), %ebx # Save the first parameter
movl 24(%esp), %ecx # Save the second parameter
#
# Save this function's return address into permenent memory at first.
# Then, Fixup the esp point to permenent memory
#
movl %esp, %eax
subl %ebx, %eax
addl %ecx, %eax
movl 0(%esp), %edx # copy pushed register's value to permenent memory
movl %edx, 0(%eax)
movl 4(%esp), %edx
movl %edx, 4(%eax)
movl 8(%esp), %edx
movl %edx, 8(%eax)
movl 12(%esp), %edx
movl %edx, 12(%eax)
movl 16(%esp), %edx # Update this function's return address into permenent memory
movl %edx, 16(%eax)
movl %eax, %esp # From now, esp is pointed to permenent memory
#
# Fixup the ebp point to permenent memory
#
movl %ebp, %eax
subl %ebx, %eax
addl %ecx, %eax
movl %eax, %ebp # From now, ebp is pointed to permenent memory
popl %edx
popl %ecx
popl %ebx
popl %eax
ret

82
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/Stack.asm Normal file
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;------------------------------------------------------------------------------
;
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Abstract:
;
; Switch the stack from temporary memory to permenent memory.
;
;------------------------------------------------------------------------------
.586p
.model flat,C
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; SecSwitchStack (
; UINT32 TemporaryMemoryBase,
; UINT32 PermenentMemoryBase
; );
;------------------------------------------------------------------------------
SecSwitchStack PROC
;
; Save three register: eax, ebx, ecx
;
push eax
push ebx
push ecx
push edx
;
; !!CAUTION!! this function address's is pushed into stack after
; migration of whole temporary memory, so need save it to permenent
; memory at first!
;
mov ebx, [esp + 20] ; Save the first parameter
mov ecx, [esp + 24] ; Save the second parameter
;
; Save this function's return address into permenent memory at first.
; Then, Fixup the esp point to permenent memory
;
mov eax, esp
sub eax, ebx
add eax, ecx
mov edx, dword ptr [esp] ; copy pushed register's value to permenent memory
mov dword ptr [eax], edx
mov edx, dword ptr [esp + 4]
mov dword ptr [eax + 4], edx
mov edx, dword ptr [esp + 8]
mov dword ptr [eax + 8], edx
mov edx, dword ptr [esp + 12]
mov dword ptr [eax + 12], edx
mov edx, dword ptr [esp + 16] ; Update this function's return address into permenent memory
mov dword ptr [eax + 16], edx
mov esp, eax ; From now, esp is pointed to permenent memory
;
; Fixup the ebp point to permenent memory
;
mov eax, ebp
sub eax, ebx
add eax, ecx
mov ebp, eax ; From now, ebp is pointed to permenent memory
pop edx
pop ecx
pop ebx
pop eax
ret
SecSwitchStack ENDP
END

42
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/PlatformInit.c Normal file
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/** @file
This PEIM will parse the hoblist from fsp and report them into pei core.
This file contains the main entrypoint of the PEIM.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library\DebugLib.h>
#include <Library\SerialPortLib.h>
VOID EnableInternalUart ();
VOID
EFIAPI
PlatformInit (
IN VOID *FspHobList,
IN VOID *StartOfRange,
IN VOID *EndOfRange
)
{
//
// Platform initialization
// Enable Serial port here
//
EnableInternalUart ();
SerialPortInitialize ();
DEBUG ((DEBUG_INFO, "PlatformInit\n"));
DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
}

114
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/SaveSecContext.c Normal file
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/** @file
This PEIM will parse the hoblist from fsp and report them into pei core.
This file contains the main entrypoint of the PEIM.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library/DebugLib.h>
#include <Ppi/TopOfTemporaryRam.h>
#include <Ppi/SecPlatformInformation.h>
/**
Save BIST value before call FspInit.
@param Bist BIST value.
**/
VOID
AsmSaveBistValue (
IN UINT32 Bist
);
/**
Save Ticker value before call FspInit.
@param Ticker Ticker value.
**/
VOID
AsmSaveTickerValue (
IN UINT64 Ticker
);
/**
Save SEC context before call FspInit.
@param PeiServices Pointer to PEI Services Table.
**/
VOID
EFIAPI
SaveSecContext (
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
UINT32 *Bist;
UINT64 *Ticker;
UINT32 Size;
UINT32 Count;
UINT32 TopOfTemporaryRam;
VOID *TopOfTemporaryRamPpi;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "SaveSecContext - 0x%x\n", PeiServices));
Status = (*PeiServices)->LocatePpi (
PeiServices,
&gTopOfTemporaryRamPpiGuid,
0,
NULL,
(VOID **) &TopOfTemporaryRamPpi
);
if (EFI_ERROR (Status)) {
return ;
}
DEBUG ((DEBUG_INFO, "TopOfTemporaryRamPpi - 0x%x\n", TopOfTemporaryRamPpi));
//
// The entries of BIST information, together with the number of them,
// reside in the bottom of stack, left untouched by normal stack operation.
// This routine copies the BIST information to the buffer pointed by
// PlatformInformationRecord for output.
//
// |--------------| <- TopOfTemporaryRam
// |Number of BSPs|
// |--------------|
// | BIST |
// |--------------|
// | .... |
// |--------------|
// | TSC[63:32] |
// |--------------|
// | TSC[31:00] |
// |--------------|
//
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
TopOfTemporaryRam -= sizeof(UINT32) * 2;
DEBUG ((DEBUG_INFO, "TopOfTemporaryRam - 0x%x\n", TopOfTemporaryRam));
Count = *(UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32));
DEBUG ((DEBUG_INFO, "Count - 0x%x\n", Count));
Size = Count * sizeof (IA32_HANDOFF_STATUS);
DEBUG ((DEBUG_INFO, "Size - 0x%x\n", Size));
Bist = (UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size);
DEBUG ((DEBUG_INFO, "Bist - 0x%x\n", *Bist));
Ticker = (UINT64 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size - sizeof(UINT64));
DEBUG ((DEBUG_INFO, "Ticker - 0x%lx\n", *Ticker));
//
// Just need record BSP
//
AsmSaveBistValue (*Bist);
AsmSaveTickerValue (*Ticker);
}

89
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/SecGetPerformance.c Normal file
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/** @file
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/SecPerformance.h>
#include <Ppi/TopOfTemporaryRam.h>
#include <Library/BaseMemoryLib.h>
#include <Library/TimerLib.h>
#include <Library/DebugLib.h>
/**
This interface conveys performance information out of the Security (SEC) phase into PEI.
This service is published by the SEC phase. The SEC phase handoff has an optional
EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
PEI Foundation. As such, if the platform supports collecting performance data in SEC,
this information is encapsulated into the data structure abstracted by this service.
This information is collected for the boot-strap processor (BSP) on IA-32.
@param[in] PeiServices The pointer to the PEI Services Table.
@param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
@param[out] Performance The pointer to performance data collected in SEC phase.
@retval EFI_SUCCESS The data was successfully returned.
**/
EFI_STATUS
EFIAPI
SecGetPerformance (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN PEI_SEC_PERFORMANCE_PPI *This,
OUT FIRMWARE_SEC_PERFORMANCE *Performance
)
{
UINT32 Size;
UINT32 Count;
UINT32 TopOfTemporaryRam;
UINT64 Ticker;
VOID *TopOfTemporaryRamPpi;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "SecGetPerformance\n"));
Status = (*PeiServices)->LocatePpi (
PeiServices,
&gTopOfTemporaryRamPpiGuid,
0,
NULL,
(VOID **) &TopOfTemporaryRamPpi
);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// |--------------| <- TopOfTemporaryRam
// |Number of BSPs|
// |--------------|
// | BIST |
// |--------------|
// | .... |
// |--------------|
// | TSC[63:32] |
// |--------------|
// | TSC[31:00] |
// |--------------|
//
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
TopOfTemporaryRam -= sizeof(UINT32) * 2;
Count = *(UINT32 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32));
Size = Count * sizeof (UINT64);
Ticker = *(UINT64 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32) - Size - sizeof (UINT32) * 2);
Performance->ResetEnd = GetTimeInNanoSecond (Ticker);
return EFI_SUCCESS;
}

83
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/SecPlatformInformation.c Normal file
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/** @file
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and
made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/SecPlatformInformation.h>
#include <Ppi/TopOfTemporaryRam.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
/**
This interface conveys state information out of the Security (SEC) phase into PEI.
@param PeiServices Pointer to the PEI Services Table.
@param StructureSize Pointer to the variable describing size of the input buffer.
@param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_BUFFER_TOO_SMALL The buffer was too small.
**/
EFI_STATUS
EFIAPI
SecPlatformInformation (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN OUT UINT64 *StructureSize,
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
)
{
UINT32 *Bist;
UINT32 Size;
UINT32 Count;
UINT32 TopOfTemporaryRam;
VOID *TopOfTemporaryRamPpi;
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "SecPlatformInformation\n"));
Status = (*PeiServices)->LocatePpi (
PeiServices,
&gTopOfTemporaryRamPpiGuid,
0,
NULL,
(VOID **) &TopOfTemporaryRamPpi
);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// The entries of BIST information, together with the number of them,
// reside in the bottom of stack, left untouched by normal stack operation.
// This routine copies the BIST information to the buffer pointed by
// PlatformInformationRecord for output.
//
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof (UINT32);
TopOfTemporaryRam -= sizeof(UINT32) * 2;
Count = *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof (UINT32)));
Size = Count * sizeof (IA32_HANDOFF_STATUS);
if ((*StructureSize) < (UINT64) Size) {
*StructureSize = Size;
return EFI_BUFFER_TOO_SMALL;
}
*StructureSize = Size;
Bist = (UINT32 *) (TopOfTemporaryRam - sizeof (UINT32) - Size);
CopyMem (PlatformInformationRecord, Bist, Size);
return EFI_SUCCESS;
}

22
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/SecRamInitData.c Normal file
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/** @file
Calling Fsp Apis in SEC
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made
available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/PcdLib.h>
GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT32 TempRamInitParams[4] = {
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicroCodeOffset)),
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicroCodeOffset)),
FixedPcdGet32 (PcdFlashCodeCacheAddress),
FixedPcdGet32 (PcdFlashCodeCacheSize)
};

155
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/SecTempRamSupport.c Normal file
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/** @file
C functions in SEC
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made
available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Ppi/TemporaryRamSupport.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/DebugAgentLib.h>
/**
Switch the stack in the temporary memory to the one in the permanent memory.
This function must be invoked after the memory migration immediately. The relative
position of the stack in the temporary and permanent memory is same.
@param TemporaryMemoryBase Base address of the temporary memory.
@param PermenentMemoryBase Base address of the permanent memory.
**/
VOID
EFIAPI
SecSwitchStack (
UINT32 TemporaryMemoryBase,
UINT32 PermenentMemoryBase
);
/**
This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
permanent memory.
@param PeiServices Pointer to the PEI Services Table.
@param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
Temporary RAM contents.
@param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
Temporary RAM contents.
@param CopySize Amount of memory to migrate from temporary to permanent memory.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
TemporaryMemoryBase > PermanentMemoryBase.
**/
EFI_STATUS
EFIAPI
SecTemporaryRamSupport (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
IN UINTN CopySize
)
{
IA32_DESCRIPTOR IdtDescriptor;
VOID* OldHeap;
VOID* NewHeap;
VOID* OldStack;
VOID* NewStack;
DEBUG_AGENT_CONTEXT_POSTMEM_SEC DebugAgentContext;
BOOLEAN OldStatus;
UINTN PeiStackSize;
PeiStackSize = (UINTN)PcdGet32 (PcdPeiTemporaryRamStackSize);
if (PeiStackSize == 0) {
PeiStackSize = (CopySize >> 1);
}
ASSERT (PeiStackSize < CopySize);
//
// |-------------------|---->
// | Stack | PeiStackSize
// |-------------------|---->
// | Heap | PeiTemporayRamSize
// |-------------------|----> TempRamBase
//
// |-------------------|---->
// | Heap | PeiTemporayRamSize
// |-------------------|---->
// | Stack | PeiStackSize
// |-------------------|----> PermanentMemoryBase
//
OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
NewHeap = (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize);
OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize - PeiStackSize);
NewStack = (VOID*)(UINTN)PermanentMemoryBase;
DebugAgentContext.HeapMigrateOffset = (UINTN)NewHeap - (UINTN)OldHeap;
DebugAgentContext.StackMigrateOffset = (UINTN)NewStack - (UINTN)OldStack;
OldStatus = SaveAndSetDebugTimerInterrupt (FALSE);
//
// Initialize Debug Agent to support source level debug in PEI phase after memory ready.
// It will build HOB and fix up the pointer in IDT table.
//
InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *) &DebugAgentContext, NULL);
//
// Migrate Heap
//
CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize);
//
// Migrate Stack
//
CopyMem (NewStack, OldStack, PeiStackSize);
//
// We need *not* fix the return address because currently,
// The PeiCore is executed in flash.
//
//
// Rebase IDT table in permanent memory
//
AsmReadIdtr (&IdtDescriptor);
IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;
AsmWriteIdtr (&IdtDescriptor);
//
// Program MTRR
//
//
// SecSwitchStack function must be invoked after the memory migration
// immediatly, also we need fixup the stack change caused by new call into
// permenent memory.
//
SecSwitchStack (
(UINT32) (UINTN) OldStack,
(UINT32) (UINTN) NewStack
);
SaveAndSetDebugTimerInterrupt (OldStatus);
return EFI_SUCCESS;
}

198
Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/UartInit.c Normal file
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/** @file
This PEIM will parse the hoblist from fsp and report them into pei core.
This file contains the main entrypoint of the PEIM.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiPei.h>
#include <Library\IoLib.h>
#include <Library\SerialPortLib.h>
#define PCI_IDX 0xCF8
#define PCI_DAT 0xCFC
#define PCI_LPC_BASE (0x8000F800)
#define PCI_LPC_REG(x) (PCI_LPC_BASE + (x))
#define PMC_BASE_ADDRESS 0xFED03000 // PMC Memory Base Address
#define R_PCH_LPC_PMC_BASE 0x44 // PBASE, 32bit, 512 Bytes
#define B_PCH_LPC_PMC_BASE_EN BIT1 // Enable Bit
#define R_PCH_PMC_GEN_PMCON_1 0x20 // General PM Configuration 1
#define B_PCH_PMC_GEN_PMCON_SUS_PWR_FLR BIT14 // SUS Well Power Failure
#define B_PCH_PMC_GEN_PMCON_PWROK_FLR BIT16 // PWROK Failure
#define R_PCH_LPC_UART_CTRL 0x80 // UART Control
#define B_PCH_LPC_UART_CTRL_COM1_EN BIT0 // COM1 Enable
#define ILB_BASE_ADDRESS 0xFED08000 // ILB Memory Base Address
#define R_PCH_ILB_IRQE 0x88 // IRQ Enable Control
#define IO_BASE_ADDRESS 0xFED0C000 // IO Memory Base Address
#define V_PCH_ILB_IRQE_UARTIRQEN_IRQ3 BIT3 // UART IRQ3 Enable
#define V_PCH_ILB_IRQE_UARTIRQEN_IRQ4 BIT4 // UART IRQ4 Enable
#define PCIEX_BASE_ADDRESS 0xE0000000
#define PCI_EXPRESS_BASE_ADDRESS PCIEX_BASE_ADDRESS
#define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
#define SB_RCBA 0xfed1c000
typedef enum {
PchA0 = 0,
PchA1 = 1,
PchB0 = 2,
PchB1 = 3,
PchB2 = 4,
PchB3 = 5,
PchC0 = 6,
PchSteppingMax
} PCH_STEPPING;
#define MmPciAddress( Segment, Bus, Device, Function, Register ) \
( (UINTN)PCI_EXPRESS_BASE_ADDRESS + \
(UINTN)(Bus << 20) + \
(UINTN)(Device << 15) + \
(UINTN)(Function << 12) + \
(UINTN)(Register) \
)
#define DEFAULT_PCI_BUS_NUMBER_PCH 0
#define PCI_DEVICE_NUMBER_PCH_LPC 31
#define PCI_FUNCTION_NUMBER_PCH_LPC 0
#define R_PCH_LPC_RID_CC 0x08 // Revision ID & Class Code
#define V_PCH_LPC_RID_0 0x01 // A0 Stepping (17 x 17)
#define V_PCH_LPC_RID_1 0x02 // A0 Stepping (25 x 27)
#define V_PCH_LPC_RID_2 0x03 // A1 Stepping (17 x 17)
#define V_PCH_LPC_RID_3 0x04 // A1 Stepping (25 x 27)
#define V_PCH_LPC_RID_4 0x05 // B0 Stepping (17 x 17)
#define V_PCH_LPC_RID_5 0x06 // B0 Stepping (25 x 27)
#define V_PCH_LPC_RID_6 0x07 // B1 Stepping (17 x 17)
#define V_PCH_LPC_RID_7 0x08 // B1 Stepping (25 x 27)
#define V_PCH_LPC_RID_8 0x09 // B2 Stepping (17 x 17)
#define V_PCH_LPC_RID_9 0x0A // B2 Stepping (25 x 27)
#define V_PCH_LPC_RID_A 0x0B // B3 Stepping (17 x 17)
#define V_PCH_LPC_RID_B 0x0C // B3 Stepping (25 x 27)
#define V_PCH_LPC_RID_C 0x0D // C0 Stepping (17 x 17)
#define V_PCH_LPC_RID_D 0x0E // C0 Stepping (25 x 27)
/**
Return Pch stepping type
@param[in] None
@retval PCH_STEPPING Pch stepping type
**/
PCH_STEPPING
EFIAPI
PchStepping (
VOID
)
{
UINT8 RevId;
RevId = MmioRead8 (
MmPciAddress (0,
DEFAULT_PCI_BUS_NUMBER_PCH,
PCI_DEVICE_NUMBER_PCH_LPC,
PCI_FUNCTION_NUMBER_PCH_LPC,
R_PCH_LPC_RID_CC)
);
switch (RevId) {
case V_PCH_LPC_RID_0:
case V_PCH_LPC_RID_1:
return PchA0;
break;
case V_PCH_LPC_RID_2:
case V_PCH_LPC_RID_3:
return PchA1;
break;
case V_PCH_LPC_RID_4:
case V_PCH_LPC_RID_5:
return PchB0;
break;
case V_PCH_LPC_RID_6:
case V_PCH_LPC_RID_7:
return PchB1;
break;
case V_PCH_LPC_RID_8:
case V_PCH_LPC_RID_9:
return PchB2;
break;
case V_PCH_LPC_RID_A:
case V_PCH_LPC_RID_B:
return PchB3;
break;
case V_PCH_LPC_RID_C:
case V_PCH_LPC_RID_D:
return PchC0;
break;
default:
return PchSteppingMax;
break;
}
}
/**
Enable legacy decoding on ICH6
@param[in] none
@retval EFI_SUCCESS Always returns success.
**/
VOID
EnableInternalUart(
VOID
)
{
//
// Program and enable PMC Base.
//
IoWrite32 (PCI_IDX, PCI_LPC_REG(R_PCH_LPC_PMC_BASE));
IoWrite32 (PCI_DAT, (PMC_BASE_ADDRESS | B_PCH_LPC_PMC_BASE_EN));
//
// Enable COM1 for debug message output.
//
MmioAndThenOr32 (PMC_BASE_ADDRESS + R_PCH_PMC_GEN_PMCON_1, (UINT32) (~(B_PCH_PMC_GEN_PMCON_SUS_PWR_FLR + B_PCH_PMC_GEN_PMCON_PWROK_FLR)), BIT24);
//
// Silicon Steppings
//
if (PchStepping()>= PchB0)
MmioOr8 (ILB_BASE_ADDRESS + R_PCH_ILB_IRQE, (UINT8) V_PCH_ILB_IRQE_UARTIRQEN_IRQ4);
else
MmioOr8 (ILB_BASE_ADDRESS + R_PCH_ILB_IRQE, (UINT8) V_PCH_ILB_IRQE_UARTIRQEN_IRQ3);
MmioAnd32(IO_BASE_ADDRESS + 0x0520, (UINT32)~(0x00000187));
MmioOr32 (IO_BASE_ADDRESS + 0x0520, (UINT32)0x81); // UART3_RXD-L
MmioAnd32(IO_BASE_ADDRESS + 0x0530, (UINT32)~(0x00000007));
MmioOr32 (IO_BASE_ADDRESS + 0x0530, (UINT32)0x1); // UART3_RXD-L
MmioOr8 (PciD31F0RegBase + R_PCH_LPC_UART_CTRL, (UINT8) B_PCH_LPC_UART_CTRL_COM1_EN);
SerialPortInitialize ();
SerialPortWrite ("EnableInternalUart!\r\n", sizeof("EnableInternalUart!\r\n") - 1);
return ;
}

73
Vlv2TbltDevicePkg/FvInfoPei/FvInfoPei.c Normal file
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/** @file
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
FvInfoPei.c
Abstract:
EFI 2.0 PEIM to initialize the cache and program for unlock processor
--*/
#include <PiPei.h>
#include <Guid/FirmwareFileSystem2.h>
#include <Ppi/FirmwareVolumeInfo.h>
#include <Library/PcdLib.h>
#include <Library/DebugLib.h>
EFI_PEI_FIRMWARE_VOLUME_INFO_PPI mAddtionFVPpi = {
EFI_FIRMWARE_FILE_SYSTEM2_GUID,
(VOID*)(UINTN)FixedPcdGet32(PcdFlashFvRecovery2Base),
FixedPcdGet32(PcdFlashFvRecovery2Size),
NULL,
NULL
};
EFI_PEI_PPI_DESCRIPTOR mPpiList[] = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiPeiFirmwareVolumeInfoPpiGuid,
&mAddtionFVPpi
};
/**
Add Recovery Fv Info to the Pei Core.
@param PeiServices General purpose services available to every PEIM.
@retval Status
**/
EFI_STATUS
EFIAPI
PeimInitializeFvInfo (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
//
// GC_TODO: FfsHeader - add argument and description to function comment
//

54
Vlv2TbltDevicePkg/FvInfoPei/FvInfoPei.inf Normal file
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#
#
# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
# Module Name:
#
# CpuPeim.inf
#
# Abstract:
#
# Component description file for CPU module
#
#
#--*/
[defines]
INF_VERSION = 0x00010005
BASE_NAME = FvInfoPei
FILE_GUID = 64AAEAE0-92DF-4980-8668-6EB5EAAF4393
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = PeimInitializeFvInfo
[sources.common]
FvInfoPei.c
[Packages]
MdePkg/MdePkg.dec
Vlv2TbltDevicePkg/PlatformPkg.dec
[LibraryClasses]
PeimEntryPoint
DebugLib
[Pcd.common]

175
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbInfo.c Normal file
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/**@file
Defines data structure that is the volume header found.
These data is intent to decouple FVB driver with FV header.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiDxe.h>
#include <Protocol/FirmwareVolumeBlock.h>
#include <Library/PcdLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseLib.h>
#include <Guid/FirmwareFileSystem2.h>
#include <Guid/SystemNvDataGuid.h>
#define FIRMWARE_BLOCK_SIZE 0x8000
#define FVB_MEDIA_BLOCK_SIZE (FIRMWARE_BLOCK_SIZE * 2)
#define FV_RECOVERY_BASE_ADDRESS FixedPcdGet32(PcdFlashFvRecoveryBase)
#define RECOVERY_BIOS_BLOCK_NUM (FixedPcdGet32(PcdFlashFvRecoverySize) / FVB_MEDIA_BLOCK_SIZE)
#define FV_MAIN_BASE_ADDRESS FixedPcdGet32(PcdFlashFvMainBase)
#define MAIN_BIOS_BLOCK_NUM (FixedPcdGet32(PcdFlashFvMainSize) / FVB_MEDIA_BLOCK_SIZE)
#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVariableBase)
#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
typedef struct {
EFI_PHYSICAL_ADDRESS BaseAddress;
EFI_FIRMWARE_VOLUME_HEADER FvbInfo;
EFI_FV_BLOCK_MAP_ENTRY End[1];
} EFI_FVB2_MEDIA_INFO;
//
// This data structure contains a template of all correct FV headers, which is used to restore
// Fv header if it's corrupted.
//
EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
//
// Main BIOS FVB
//
{
FV_MAIN_BASE_ADDRESS,
{
{0,}, //ZeroVector[16]
EFI_FIRMWARE_FILE_SYSTEM2_GUID,
FVB_MEDIA_BLOCK_SIZE * MAIN_BIOS_BLOCK_NUM,
EFI_FVH_SIGNATURE,
0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on EFI_FVB_ATTRIBUTES_2
sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
0, //CheckSum which will be calucated dynamically.
0, //ExtHeaderOffset
{0,}, //Reserved[1]
2, //Revision
{
{
MAIN_BIOS_BLOCK_NUM,
FVB_MEDIA_BLOCK_SIZE,
}
}
},
{
{
0,
0
}
}
},
//
// Systen NvStorage FVB
//
{
NV_STORAGE_BASE_ADDRESS,
{
{0,}, //ZeroVector[16]
EFI_SYSTEM_NV_DATA_FV_GUID,
FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
EFI_FVH_SIGNATURE,
0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on EFI_FVB_ATTRIBUTES_2
sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
0, //CheckSum which will be calucated dynamically.
0, //ExtHeaderOffset
{0,}, //Reserved[1]
2, //Revision
{
{
SYSTEM_NV_BLOCK_NUM,
FVB_MEDIA_BLOCK_SIZE,
}
}
},
{
{
0,
0
}
}
},
//
// Recovery BIOS FVB
//
{
FV_RECOVERY_BASE_ADDRESS,
{
{0,}, //ZeroVector[16]
EFI_FIRMWARE_FILE_SYSTEM2_GUID,
FVB_MEDIA_BLOCK_SIZE * RECOVERY_BIOS_BLOCK_NUM,
EFI_FVH_SIGNATURE,
0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on EFI_FVB_ATTRIBUTES_2
sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
0, //CheckSum which will be calucated dynamically.
0, //ExtHeaderOffset
{0,}, //Reserved[1]
2, //Revision
{
{
RECOVERY_BIOS_BLOCK_NUM,
FVB_MEDIA_BLOCK_SIZE,
}
}
},
{
{
0,
0
}
}
}
};
EFI_STATUS
GetFvbInfo (
IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
)
{
UINTN Index;
EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_FVB2_MEDIA_INFO); Index += 1) {
if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
FvHeader = &mPlatformFvbMediaInfo[Index].FvbInfo;
//
// Update the checksum value of FV header.
//
FvHeader->Checksum = CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength / sizeof (UINT16));
*FvbInfo = FvHeader;
DEBUG ((EFI_D_INFO, "\nBaseAddr: 0x%lx \n", FvBaseAddress));
DEBUG ((EFI_D_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
DEBUG ((EFI_D_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLength));
DEBUG ((EFI_D_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)->BlockMap[0].NumBlocks));

85
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbRuntimeDxe.inf Normal file
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## @file
# This driver implement the EFI_FIRMWARE_VOLUMEN_PROTOCOL.
#
# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FvbRuntimeDxe
FILE_GUID = FD3B7E55-FA7B-4e07-AE1D-208B81FB0BAD
MODULE_TYPE = DXE_RUNTIME_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = DxeFvbInitialize
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
# VIRTUAL_ADDRESS_MAP_CALLBACK = FvbVirtualddressChangeEvent
#
[Sources]
FvbInfo.c
FvbService.h
FvbService.c
FvbServiceDxe.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
Vlv2TbltDevicePkg/PlatformPkg.dec
Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
[LibraryClasses]
FlashDeviceLib
PcdLib
MemoryAllocationLib
CacheMaintenanceLib
IoLib
BaseMemoryLib
DebugLib
BaseLib
UefiLib
UefiRuntimeLib
UefiBootServicesTableLib
UefiDriverEntryPoint
[Guids]
gEfiFirmwareFileSystem2Guid # ALWAYS_CONSUMED
gEfiSystemNvDataFvGuid # ALWAYS_CONSUMED
gEfiEventVirtualAddressChangeGuid
[Protocols]
gEfiDevicePathProtocolGuid # PROTOCOL ALWAYS_PRODUCED
gEfiFirmwareVolumeBlockProtocolGuid # PROTOCOL ALWAYS_PRODUCED
[FixedPcd]
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase
[Pcd]
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize

1114
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187
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbService.h Normal file
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/** @file
The header file for Firmware volume block driver.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _FW_BLOCK_SERVICE_H
#define _FW_BLOCK_SERVICE_H
#include <Guid/EventGroup.h>
#include <Guid/FirmwareFileSystem2.h>
#include <Guid/SystemNvDataGuid.h>
#include <Protocol/DevicePath.h>
#include <Protocol/FirmwareVolumeBlock.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/IoLib.h>
#include <Library/CacheMaintenanceLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PcdLib.h>
#include <Library/FlashDeviceLib.h>
#include <Library/DevicePathLib.h>
//
// Define two helper macro to extract the Capability field or Status field in FVB
// bit fields.
//
#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
EFI_FVB2_READ_ENABLED_CAP | \
EFI_FVB2_WRITE_DISABLED_CAP | \
EFI_FVB2_WRITE_ENABLED_CAP | \
EFI_FVB2_LOCK_CAP \
)
#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
typedef struct {
UINTN FvBase;
UINTN NumOfBlocks;
//
// Note!!!: VolumeHeader must be the last element
// of the structure.
//
EFI_FIRMWARE_VOLUME_HEADER VolumeHeader;
} EFI_FW_VOL_INSTANCE;
typedef struct {
EFI_FW_VOL_INSTANCE *FvInstance;
UINT32 NumFv;
} FWB_GLOBAL;
//
// Fvb Protocol instance data.
//
#define FVB_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FwVolBlockInstance, FVB_DEVICE_SIGNATURE)
#define FVB_EXTEND_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FvbExtension, FVB_DEVICE_SIGNATURE)
#define FVB_DEVICE_SIGNATURE SIGNATURE_32('F','V','B','C')
typedef struct {
MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
} FV_PIWG_DEVICE_PATH;
typedef struct {
MEMMAP_DEVICE_PATH MemMapDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
} FV_MEMMAP_DEVICE_PATH;
typedef struct {
UINT32 Signature;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
UINTN Instance;
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FwVolBlockInstance;
} EFI_FW_VOL_BLOCK_DEVICE;
EFI_STATUS
GetFvbInfo (
IN EFI_PHYSICAL_ADDRESS FvBaseAddress,
OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo
);
//
// Protocol APIs
//
EFI_STATUS
EFIAPI
FvbProtocolGetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
);
EFI_STATUS
EFIAPI
FvbProtocolSetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
);
EFI_STATUS
EFIAPI
FvbProtocolGetPhysicalAddress (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
);
EFI_STATUS
EFIAPI
FvbProtocolGetBlockSize (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumOfBlocks
);
EFI_STATUS
EFIAPI
FvbProtocolRead (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
);
EFI_STATUS
EFIAPI
FvbProtocolWrite (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
);
EFI_STATUS
EFIAPI
FvbProtocolEraseBlocks (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
...
);
EFI_FW_VOL_INSTANCE *
GetFvbInstance (
IN UINTN Instance
);
BOOLEAN
IsFvHeaderValid (
IN EFI_PHYSICAL_ADDRESS FvBase,
IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
);
VOID
InstallFvbProtocol (
IN EFI_FW_VOL_INSTANCE *FwhInstance,
IN UINTN InstanceNum
);
EFI_STATUS
FvbInitialize (
VOID
);

204
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbServiceDxe.c Normal file
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/** @file
Firmware Volume Block Driver for Lakeport Platform.
Firmware volume block driver for FWH or SPI device.
It depends on which Flash Device Library to be linked with this driver.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiDxe.h>
#include <Library/UefiRuntimeLib.h>
#include "FvbService.h"
extern FWB_GLOBAL mFvbModuleGlobal;
/**
Call back function on EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event.
Fixup internal data so that the driver is callable in EFI runtime
in virtual mode. Convert the mFvbModuleGlobal date items to there
virtual address.
@param Event Event whose notification function is being invoked.
@param Context The context of the Notification context. Not used in
this call back function.
**/
VOID
EFIAPI
FvbVirtualddressChangeEvent (
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_FW_VOL_INSTANCE *FwhInstance;
UINTN Index;
//
// Convert the base address of all the instances.
//
for (Index = 0; Index < mFvbModuleGlobal.NumFv; Index++) {
FwhInstance = GetFvbInstance (Index);
EfiConvertPointer (0, (VOID **) &FwhInstance->FvBase);
}
EfiConvertPointer (0, (VOID **) &mFvbModuleGlobal.FvInstance);
}
/**
The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol
for each FV in the system.
@param[in] FwhInstance The pointer to a FW volume instance structure,
which contains the information about one FV.
@param[in] InstanceNum The instance number which can be used as a ID
to locate this FwhInstance in other functions.
@retval VOID
**/
VOID
InstallFvbProtocol (
IN EFI_FW_VOL_INSTANCE *FwhInstance,
IN UINTN InstanceNum
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
EFI_STATUS Status;
EFI_HANDLE FwbHandle;
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *OldFwbInterface;
FvbDevice = (EFI_FW_VOL_BLOCK_DEVICE *) AllocateRuntimeCopyPool (
sizeof (EFI_FW_VOL_BLOCK_DEVICE),
&mFvbDeviceTemplate
);
ASSERT (FvbDevice != NULL);
FvbDevice->Instance = InstanceNum;
FwVolHeader = &FwhInstance->VolumeHeader;
//
// Set up the devicepath.
//
DEBUG ((EFI_D_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx:\n", FwhInstance->FvBase));
if (FwVolHeader->ExtHeaderOffset == 0) {
//
// FV does not contains extension header, then produce MEMMAP_DEVICE_PATH.
//
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
((FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath)->MemMapDevPath.StartingAddress = FwhInstance->FvBase;
((FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath)->MemMapDevPath.EndingAddress = FwhInstance->FvBase + FwVolHeader->FvLength - 1;
} else {
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
CopyGuid (
&((FV_PIWG_DEVICE_PATH *)FvbDevice->DevicePath)->FvDevPath.FvName,
(GUID *)(UINTN)(FwhInstance->FvBase + FwVolHeader->ExtHeaderOffset)
);
}
//
// Find a handle with a matching device path that has supports FW Block protocol.
//
Status = gBS->LocateDevicePath (
&gEfiFirmwareVolumeBlockProtocolGuid,
&FvbDevice->DevicePath,
&FwbHandle
);
if (EFI_ERROR (Status) ) {
//
// LocateDevicePath fails so install a new interface and device path.
//
DEBUG ((EFI_D_INFO, "FwBlockService.c: LocateDevicePath failed, install new interface 0x%lx:\n", FwhInstance->FvBase));
FwbHandle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&FwbHandle,
&gEfiFirmwareVolumeBlockProtocolGuid,
&FvbDevice->FwVolBlockInstance,
&gEfiDevicePathProtocolGuid,
FvbDevice->DevicePath,
NULL
);
ASSERT_EFI_ERROR (Status);
DEBUG ((EFI_D_INFO, "FwBlockService.c: IMPI FirmwareVolBlockProt, DevPath 0x%lx: %r\n", FwhInstance->FvBase, Status));
} else if (IsDevicePathEnd (FvbDevice->DevicePath)) {
//
// Device allready exists, so reinstall the FVB protocol.
//
DEBUG ((EFI_D_ERROR, "FwBlockService.c: LocateDevicePath succeeded, reinstall interface 0x%lx:\n", FwhInstance->FvBase));
Status = gBS->HandleProtocol (
FwbHandle,
&gEfiFirmwareVolumeBlockProtocolGuid,
(VOID **) &OldFwbInterface
);
ASSERT_EFI_ERROR (Status);
Status = gBS->ReinstallProtocolInterface (
FwbHandle,
&gEfiFirmwareVolumeBlockProtocolGuid,
OldFwbInterface,
&FvbDevice->FwVolBlockInstance
);
ASSERT_EFI_ERROR (Status);
} else {
//
// There was a FVB protocol on an End Device Path node.
//
ASSERT (FALSE);
}
}
/**
The driver entry point for Firmware Volume Block Driver.
The function does the necessary initialization work for
Firmware Volume Block Driver.
@param[in] ImageHandle The firmware allocated handle for the UEFI image.
@param[in] SystemTable A pointer to the EFI system table.
@retval EFI_SUCCESS This funtion always return EFI_SUCCESS.
It will ASSERT on errors.
**/
EFI_STATUS
EFIAPI
DxeFvbInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_EVENT Event;
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_NOTIFY,
FvbVirtualddressChangeEvent,
NULL,
&gEfiEventVirtualAddressChangeGuid,

132
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbServiceSmm.c Normal file
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/** @file
SMM Firmware Volume Block Driver for Lakeport Platform.
Firmware volume block driver for FWH or SPI device.
It depends on which Flash Device Library to be linked with this driver.
Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <PiSmm.h>
#include <Library/SmmServicesTableLib.h>
#include "FvbSmmCommon.h"
#include "FvbService.h"
/**
The function installs EFI_SMM_FIRMWARE_VOLUME_BLOCK protocol
for each FV in the system.
@param[in] FwhInstance The pointer to a FW volume instance structure,
which contains the information about one FV.
@param[in] InstanceNum The instance number which can be used as a ID
to locate this FwhInstance in other functions.
@retval VOID
**/
VOID
InstallFvbProtocol (
IN EFI_FW_VOL_INSTANCE *FwhInstance,
IN UINTN InstanceNum
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
EFI_STATUS Status;
EFI_HANDLE FvbHandle;
FvbDevice = (EFI_FW_VOL_BLOCK_DEVICE *) AllocateRuntimeCopyPool (
sizeof (EFI_FW_VOL_BLOCK_DEVICE),
&mFvbDeviceTemplate
);
ASSERT (FvbDevice != NULL);
FvbDevice->Instance = InstanceNum;
FwVolHeader = &FwhInstance->VolumeHeader;
//
// Set up the devicepath.
//
if (FwVolHeader->ExtHeaderOffset == 0) {
//
// FV does not contains extension header, then produce MEMMAP_DEVICE_PATH.
//
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
((FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath)->MemMapDevPath.StartingAddress = FwhInstance->FvBase;
((FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath)->MemMapDevPath.EndingAddress = FwhInstance->FvBase + FwVolHeader->FvLength - 1;
} else {
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
CopyGuid (
&((FV_PIWG_DEVICE_PATH *)FvbDevice->DevicePath)->FvDevPath.FvName,
(GUID *)(UINTN)(FwhInstance->FvBase + FwVolHeader->ExtHeaderOffset)
);
}
//
// Install the SMM Firmware Volume Block Protocol and Device Path Protocol.
//
FvbHandle = NULL;
Status = gSmst->SmmInstallProtocolInterface (
&FvbHandle,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
EFI_NATIVE_INTERFACE,
&FvbDevice->FwVolBlockInstance
);
ASSERT_EFI_ERROR (Status);
Status = gSmst->SmmInstallProtocolInterface (
&FvbHandle,
&gEfiDevicePathProtocolGuid,
EFI_NATIVE_INTERFACE,
FvbDevice->DevicePath
);
ASSERT_EFI_ERROR (Status);
//
// Notify the Fvb wrapper driver SMM fvb is ready.
//
FvbHandle = NULL;
Status = gBS->InstallProtocolInterface (
&FvbHandle,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
EFI_NATIVE_INTERFACE,
&FvbDevice->FwVolBlockInstance
);
}
/**
The driver entry point for SMM Firmware Volume Block Driver.
The function does the necessary initialization work
Firmware Volume Block Driver.
@param[in] ImageHandle The firmware allocated handle for the UEFI image.
@param[in] SystemTable A pointer to the EFI system table.
@retval EFI_SUCCESS This funtion always return EFI_SUCCESS.
It will ASSERT on errors.
**/
EFI_STATUS
EFIAPI
FvbSmmInitialize (

87
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmm.inf Normal file
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## @file
# This driver implement the EFI_SMM_FIRMWARE_VOLUMEN_PROTOCOL.
#
# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FvbSmm
FILE_GUID = A4EC8ADB-B7A8-47d1-8E52-EC820D0ACF6F
MODULE_TYPE = DXE_SMM_DRIVER
VERSION_STRING = 1.0
PI_SPECIFICATION_VERSION = 0x0001000A
ENTRY_POINT = FvbSmmInitialize
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
# VIRTUAL_ADDRESS_MAP_CALLBACK = FvbVirtualddressChangeEvent
#
[Sources]
FvbInfo.c
FvbService.h
FvbService.c
FvbServiceSmm.c
FvbSmmCommon.h
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
Vlv2TbltDevicePkg/PlatformPkg.dec
Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
[LibraryClasses]
FlashDeviceLib
PcdLib
MemoryAllocationLib
CacheMaintenanceLib
IoLib
BaseMemoryLib
DebugLib
BaseLib
UefiLib
SmmLib
SmmServicesTableLib
UefiBootServicesTableLib
UefiDriverEntryPoint
[Guids]
gEfiFirmwareFileSystem2Guid # ALWAYS_CONSUMED
gEfiSystemNvDataFvGuid # ALWAYS_CONSUMED
gEfiEventVirtualAddressChangeGuid
[Protocols]
gEfiDevicePathProtocolGuid # PROTOCOL ALWAYS_PRODUCED
gEfiSmmFirmwareVolumeBlockProtocolGuid # PROTOCOL ALWAYS_PRODUCED
[FixedPcd]
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase
[Pcd]

78
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmmCommon.h Normal file
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/** @file
The common header file for SMM FVB module and SMM FVB runtime Module.
Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved. <BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _SMM_FVB_COMMON_H_
#define _SMM_FVB_COMMON_H_
#include <Protocol/SmmFirmwareVolumeBlock.h>
#define EFI_FUNCTION_GET_ATTRIBUTES 1
#define EFI_FUNCTION_SET_ATTRIBUTES 2
#define EFI_FUNCTION_GET_PHYSICAL_ADDRESS 3
#define EFI_FUNCTION_GET_BLOCK_SIZE 4
#define EFI_FUNCTION_READ 5
#define EFI_FUNCTION_WRITE 6
#define EFI_FUNCTION_ERASE_BLOCKS 7
typedef struct {
UINTN Function;
EFI_STATUS ReturnStatus;
UINT8 Data[1];
} SMM_FVB_COMMUNICATE_FUNCTION_HEADER;
///
/// Size of SMM communicate header, without including the payload.
///
#define SMM_COMMUNICATE_HEADER_SIZE (OFFSET_OF (EFI_SMM_COMMUNICATE_HEADER, Data))
///
/// Size of SMM FVB communicate function header, without including the payload.
///
#define SMM_FVB_COMMUNICATE_HEADER_SIZE (OFFSET_OF (SMM_FVB_COMMUNICATE_FUNCTION_HEADER, Data))
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_ATTRIBUTES_2 Attributes;
} SMM_FVB_ATTRIBUTES_HEADER;
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_PHYSICAL_ADDRESS Address;
} SMM_FVB_PHYSICAL_ADDRESS_HEADER;
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA Lba;
UINTN BlockSize;
UINTN NumOfBlocks;
} SMM_FVB_BLOCK_SIZE_HEADER;
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA Lba;
UINTN Offset;
UINTN NumBytes;

949
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmmDxe.c Normal file
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/** @file
Implement the Firmware Volume Block (FVB) services based on SMM FVB
module and install FVB protocol.
Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved. <BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "FvbSmmDxe.h"
EFI_HANDLE mHandle = NULL;
EFI_SMM_COMMUNICATION_PROTOCOL *mSmmCommunication = NULL;
//
// Template structure used when installing FVB protocol.
//
EFI_FVB_DEVICE mFvbDeviceTemplate = {
FVB_DEVICE_SIGNATURE,
NULL,
{
FvbGetAttributes,
FvbSetAttributes,
FvbGetPhysicalAddress,
FvbGetBlockSize,
FvbRead,
FvbWrite,
FvbEraseBlocks,
NULL
},
NULL
};
FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
{
{
HARDWARE_DEVICE_PATH,
HW_MEMMAP_DP,
{
(UINT8)(sizeof (MEMMAP_DEVICE_PATH)),
(UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8)
}
},
EfiMemoryMappedIO,
(EFI_PHYSICAL_ADDRESS) 0,
(EFI_PHYSICAL_ADDRESS) 0,
},
{
END_DEVICE_PATH_TYPE,
END_ENTIRE_DEVICE_PATH_SUBTYPE,
{
END_DEVICE_PATH_LENGTH,
0
}
}
};
FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
{
{
MEDIA_DEVICE_PATH,
MEDIA_PIWG_FW_VOL_DP,
{
(UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)),
(UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8)
}
},
{ 0 }
},
{
END_DEVICE_PATH_TYPE,
END_ENTIRE_DEVICE_PATH_SUBTYPE,
{
END_DEVICE_PATH_LENGTH,
0
}
}
};
/**
Initialize the communicate buffer using DataSize and Function.
The communicate size is: SMM_COMMUNICATE_HEADER_SIZE + SMM_VARIABLE_COMMUNICATE_HEADER_SIZE +
DataSize.
@param[out] CommunicateBuffer The communicate buffer. Caller should free it after use.
@param[out] DataPtr Points to the data in the communicate buffer. Caller should not free it.
@param[in] DataSize The payload size.
@param[in] Function The function number used to initialize the communicate header.
@retval EFI_INVALID_PARAMETER The data size is too big.
@retval EFI_SUCCESS Find the specified variable.
**/
EFI_STATUS
InitCommunicateBuffer (
OUT VOID **CommunicateBuffer,
OUT VOID **DataPtr,
IN UINTN DataSize,
IN UINTN Function
)
{
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_COMMUNICATE_FUNCTION_HEADER *SmmFvbFunctionHeader;
//
// The whole buffer size: SMM_COMMUNICATE_HEADER_SIZE + SMM_FVB_COMMUNICATE_HEADER_SIZE + DataSize.
//
SmmCommunicateHeader = AllocatePool (DataSize + SMM_COMMUNICATE_HEADER_SIZE + SMM_FVB_COMMUNICATE_HEADER_SIZE);
ASSERT (SmmCommunicateHeader != NULL);
//
// Prepare data buffer.
//
CopyGuid (&SmmCommunicateHeader->HeaderGuid, &gEfiSmmFirmwareVolumeBlockProtocolGuid);
SmmCommunicateHeader->MessageLength = DataSize + SMM_FVB_COMMUNICATE_HEADER_SIZE;
SmmFvbFunctionHeader = (SMM_FVB_COMMUNICATE_FUNCTION_HEADER *) SmmCommunicateHeader->Data;
SmmFvbFunctionHeader->Function = Function;
*CommunicateBuffer = SmmCommunicateHeader;
*DataPtr = SmmFvbFunctionHeader->Data;
return EFI_SUCCESS;
}
/**
Send the data in communicate buffer to SMM.
@param[out] SmmCommunicateHeader The communicate buffer.
@param[in] DataSize The payload size.
**/
EFI_STATUS
SendCommunicateBuffer (
IN EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader,
IN UINTN DataSize
)
{
EFI_STATUS Status;
UINTN CommSize;
SMM_FVB_COMMUNICATE_FUNCTION_HEADER *SmmFvbFunctionHeader;
CommSize = DataSize + SMM_COMMUNICATE_HEADER_SIZE + SMM_FVB_COMMUNICATE_HEADER_SIZE;
Status = mSmmCommunication->Communicate (
mSmmCommunication,
SmmCommunicateHeader,
&CommSize
);
ASSERT_EFI_ERROR (Status);
SmmFvbFunctionHeader = (SMM_FVB_COMMUNICATE_FUNCTION_HEADER *) SmmCommunicateHeader->Data;
return SmmFvbFunctionHeader->ReturnStatus;
}
/**
This function retrieves the attributes and current settings of the block.
@param[in] This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
@param[out] Attributes Pointer to EFI_FVB_ATTRIBUTES_2 in which the attributes
and current settings are returned. Type EFI_FVB_ATTRIBUTES_2
is defined in EFI_FIRMWARE_VOLUME_HEADER.
@retval EFI_SUCCESS The firmware volume attributes were returned.
@retval EFI_INVALID_PARAMETER Attributes is NULL.
**/
EFI_STATUS
EFIAPI
FvbGetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
)
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_ATTRIBUTES_HEADER *SmmFvbAttributesHeader;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_DEVICE *FvbDevice;
if (Attributes == NULL) {
return EFI_INVALID_PARAMETER;
}
FvbDevice = FVB_DEVICE_FROM_THIS (This);
SmmFvb = FvbDevice->SmmFvbInstance;
//
// Initialize the communicate buffer.
//
PayloadSize = sizeof (SMM_FVB_ATTRIBUTES_HEADER);
Status = InitCommunicateBuffer (
(VOID **)&SmmCommunicateHeader,
(VOID **)&SmmFvbAttributesHeader,
PayloadSize,
EFI_FUNCTION_GET_ATTRIBUTES
);
if (EFI_ERROR (Status)) {
return Status;
}
SmmFvbAttributesHeader->SmmFvb = SmmFvb;
SmmFvbAttributesHeader->Attributes = 0;
//
// Send data to SMM.
//
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
//
// Get data from SMM.
//
*Attributes = SmmFvbAttributesHeader->Attributes;
FreePool (SmmCommunicateHeader);
return Status;
}
/**
Sets Volume attributes. No polarity translations are done.
@param[in] This Calling context.
@param[out] Attributes Output buffer which contains attributes.
@retval EFI_SUCCESS Set the Attributes successfully.
@retval EFI_INVALID_PARAMETER Attributes is NULL.
**/
EFI_STATUS
EFIAPI
FvbSetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
)
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_ATTRIBUTES_HEADER *SmmFvbAttributesHeader;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_DEVICE *FvbDevice;
if (Attributes == NULL) {
return EFI_INVALID_PARAMETER;
}
FvbDevice = FVB_DEVICE_FROM_THIS (This);
SmmFvb = FvbDevice->SmmFvbInstance;
//
// Initialize the communicate buffer.
//
PayloadSize = sizeof (SMM_FVB_ATTRIBUTES_HEADER);
Status = InitCommunicateBuffer (
(VOID **)&SmmCommunicateHeader,
(VOID **)&SmmFvbAttributesHeader,
PayloadSize,
EFI_FUNCTION_SET_ATTRIBUTES
);
if (EFI_ERROR (Status)) {
return Status;
}
SmmFvbAttributesHeader->SmmFvb = SmmFvb;
SmmFvbAttributesHeader->Attributes = *Attributes;
//
// Send data to SMM.
//
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
//
// Get data from SMM.
//
*Attributes = SmmFvbAttributesHeader->Attributes;
FreePool (SmmCommunicateHeader);
return Status;
}
/**
Retrieves the physical address of the FVB instance.
@param[in] SmmFvb A pointer to EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
@param[out] Address Output buffer containing the address.
@retval EFI_SUCCESS Get the address successfully.
@retval Others Failed to get address.
**/
EFI_STATUS
GetPhysicalAddress (
IN EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb,
OUT EFI_PHYSICAL_ADDRESS *Address
)
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_PHYSICAL_ADDRESS_HEADER *SmmFvbPhysicalAddressHeader;
//
// Initialize the communicate buffer.
//
PayloadSize = sizeof (SMM_FVB_PHYSICAL_ADDRESS_HEADER);
Status = InitCommunicateBuffer (
(VOID **)&SmmCommunicateHeader,
(VOID **)&SmmFvbPhysicalAddressHeader,
PayloadSize,
EFI_FUNCTION_GET_PHYSICAL_ADDRESS
);
if (EFI_ERROR (Status)) {
return Status;
}
SmmFvbPhysicalAddressHeader->SmmFvb = SmmFvb;
SmmFvbPhysicalAddressHeader->Address = 0;
//
// Send data to SMM.
//
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
//
// Get data from SMM.
//
*Address = SmmFvbPhysicalAddressHeader->Address;
FreePool (SmmCommunicateHeader);
return Status;
}
/**
Retrieves the physical address of the FVB instance.
@param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
@param[out] Address Output buffer containing the address.
@retval EFI_SUCCESS Get the address successfully.
@retval Others Failed to get the address.
**/
EFI_STATUS
EFIAPI
FvbGetPhysicalAddress (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
)
{
EFI_STATUS Status;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_DEVICE *FvbDevice;
if (Address == NULL) {
return EFI_INVALID_PARAMETER;
}
FvbDevice = FVB_DEVICE_FROM_THIS (This);
SmmFvb = FvbDevice->SmmFvbInstance;
Status = GetPhysicalAddress (SmmFvb, Address);
return Status;
}
/**
Retrieve the size of a logical block.
@param[in] This Calling context.
@param[in] Lba Indicates which block to return the size for.
@param[out] BlockSize A pointer to a caller allocated UINTN in which
the size of the block is returned.
@param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
number of consecutive blocks starting with Lba is
returned. All blocks in this range have a size of
BlockSize.
@retval EFI_SUCCESS Get BlockSize and NumOfBlocks successfully.
@retval EFI_INVALID_PARAMETER BlockSize or NumOfBlocks are NULL.
**/
EFI_STATUS
EFIAPI
FvbGetBlockSize (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumOfBlocks
)
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_BLOCK_SIZE_HEADER *SmmFvbBlockSizeHeader;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_DEVICE *FvbDevice;
if ((BlockSize == NULL) || (NumOfBlocks == NULL)) {
return EFI_INVALID_PARAMETER;
}
FvbDevice = FVB_DEVICE_FROM_THIS (This);
SmmFvb = FvbDevice->SmmFvbInstance;
//
// Initialize the communicate buffer.
//
PayloadSize = sizeof (SMM_FVB_BLOCK_SIZE_HEADER);
Status = InitCommunicateBuffer (
(VOID **)&SmmCommunicateHeader,
(VOID **)&SmmFvbBlockSizeHeader,
PayloadSize,
EFI_FUNCTION_GET_BLOCK_SIZE
);
if (EFI_ERROR (Status)) {
return Status;
}
SmmFvbBlockSizeHeader->SmmFvb = SmmFvb;
SmmFvbBlockSizeHeader->Lba = Lba;
//
// Send data to SMM.
//
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
//
// Get data from SMM.
//
*BlockSize = SmmFvbBlockSizeHeader->BlockSize;
*NumOfBlocks = SmmFvbBlockSizeHeader->NumOfBlocks;
FreePool (SmmCommunicateHeader);
return Status;
}
/**
Reads data beginning at Lba:Offset from FV. The Read terminates either
when *NumBytes of data have been read, or when a block boundary is
reached. *NumBytes is updated to reflect the actual number of bytes
written. The write opertion does not include erase. This routine will
attempt to write only the specified bytes. If the writes do not stick,
it will return an error.
@param[in] This Calling context
@param[in] Lba Block in which to begin write
@param[in] Offset Offset in the block at which to begin write
@param[in,out] NumBytes On input, indicates the requested write size. On
output, indicates the actual number of bytes written
@param[in] Buffer Buffer containing source data for the write.
@retval EFI_SUCCESS The firmware volume was read successfully and
contents are in Buffer.
@retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
NumBytes contains the total number of bytes returned
in Buffer.
@retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
@retval EFI_DEVICE_ERROR The block device is not functioning correctly and
could not be read.
@retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL.
**/
EFI_STATUS
EFIAPI
FvbRead (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
)
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_READ_WRITE_HEADER *SmmFvbReadWriteHeader;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_DEVICE *FvbDevice;
if ((NumBytes == NULL) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
FvbDevice = FVB_DEVICE_FROM_THIS (This);
SmmFvb = FvbDevice->SmmFvbInstance;
//
// Initialize the communicate buffer.
//
PayloadSize = sizeof (SMM_FVB_READ_WRITE_HEADER) + *NumBytes;
Status = InitCommunicateBuffer (
(VOID **)&SmmCommunicateHeader,
(VOID **)&SmmFvbReadWriteHeader,
PayloadSize, EFI_FUNCTION_READ
);
if (EFI_ERROR (Status)) {
return Status;
}
SmmFvbReadWriteHeader->SmmFvb = SmmFvb;
SmmFvbReadWriteHeader->Lba = Lba;
SmmFvbReadWriteHeader->Offset = Offset;
SmmFvbReadWriteHeader->NumBytes = *NumBytes;
//
// Send data to SMM.
//
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
//
// Get data from SMM.
//
*NumBytes = SmmFvbReadWriteHeader->NumBytes;
if (!EFI_ERROR (Status)) {
CopyMem (Buffer, (UINT8 *)(SmmFvbReadWriteHeader + 1), *NumBytes);
}
FreePool (SmmCommunicateHeader);
return Status;
}
/**
Writes data beginning at Lba:Offset from FV. The write terminates either
when *NumBytes of data have been written, or when a block boundary is
reached. *NumBytes is updated to reflect the actual number of bytes
written. The write opertion does not include erase. This routine will
attempt to write only the specified bytes. If the writes do not stick,
it will return an error.
@param[in] This Calling context.
@param[in] Lba Block in which to begin write.
@param[in] Offset Offset in the block at which to begin write.
@param[in,out] NumBytes On input, indicates the requested write size. On
output, indicates the actual number of bytes written.
@param[in] Buffer Buffer containing source data for the write.
@retval EFI_SUCCESS The firmware volume was written successfully.
@retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
NumBytes contains the total number of bytes
actually written.
@retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state.
@retval EFI_DEVICE_ERROR The block device is not functioning correctly and
could not be written.
@retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL.
**/
EFI_STATUS
EFIAPI
FvbWrite (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
)
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_READ_WRITE_HEADER *SmmFvbReadWriteHeader;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_DEVICE *FvbDevice;
if ((NumBytes == NULL) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
FvbDevice = FVB_DEVICE_FROM_THIS (This);
SmmFvb = FvbDevice->SmmFvbInstance;
//
// Initialize the communicate buffer.
//
PayloadSize = sizeof (SMM_FVB_READ_WRITE_HEADER) + *NumBytes;
Status = InitCommunicateBuffer (
(VOID **)&SmmCommunicateHeader,
(VOID **)&SmmFvbReadWriteHeader,
PayloadSize,
EFI_FUNCTION_WRITE
);
if (EFI_ERROR (Status)) {
return Status;
}
SmmFvbReadWriteHeader->SmmFvb = SmmFvb;
SmmFvbReadWriteHeader->Lba = Lba;
SmmFvbReadWriteHeader->Offset = Offset;
SmmFvbReadWriteHeader->NumBytes = *NumBytes;
CopyMem ((UINT8 *)(SmmFvbReadWriteHeader + 1), Buffer, *NumBytes);
//
// Send data to SMM.
//
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
//
// Get data from SMM.
//
*NumBytes = SmmFvbReadWriteHeader->NumBytes;
FreePool (SmmCommunicateHeader);
return Status;
}
/**
The EraseBlock() function erases NumOfLba blocks started from StartingLba.
@param[in] This Calling context.
@param[in] StartingLba Starting LBA followed to erase.
@param[in] NumOfLba Number of block to erase.
@retval EFI_SUCCESS The erase request was successfully completed.
@retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state.
@retval EFI_DEVICE_ERROR The block device is not functioning correctly and
could not be written. Firmware device may have been
partially erased.
**/
EFI_STATUS
EraseBlock (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA StartingLba,
IN UINTN NumOfLba
)
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_SMM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FVB_BLOCKS_HEADER *SmmFvbBlocksHeader;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_DEVICE *FvbDevice;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
SmmFvb = FvbDevice->SmmFvbInstance;
//
// Initialize the communicate buffer.
//
PayloadSize = sizeof (SMM_FVB_BLOCKS_HEADER);
Status = InitCommunicateBuffer (
(VOID **)&SmmCommunicateHeader,
(VOID **)&SmmFvbBlocksHeader,
PayloadSize,
EFI_FUNCTION_ERASE_BLOCKS
);
if (EFI_ERROR (Status)) {
return Status;
}
SmmFvbBlocksHeader->SmmFvb = SmmFvb;
SmmFvbBlocksHeader->StartLba = StartingLba;
SmmFvbBlocksHeader->NumOfLba = NumOfLba;
//
// Send data to SMM.
//
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
//
// Get data from SMM.
//
FreePool (SmmCommunicateHeader);
return Status;
}
/**
The EraseBlocks() function erases one or more blocks as denoted by the
variable argument list. The entire parameter list of blocks must be verified
prior to erasing any blocks. If a block is requested that does not exist
within the associated firmware volume (it has a larger index than the last
block of the firmware volume), the EraseBlock() function must return
EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
@param[in] This Calling context/
@param[in] ... Starting LBA followed by Number of Lba to erase.
a -1 to terminate the list.
/
@retval EFI_SUCCESS The erase request was successfully completed
@retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state/
@retval EFI_DEVICE_ERROR The block device is not functioning correctly and
could not be written. Firmware device may have been
partially erased/
**/
EFI_STATUS
EFIAPI
FvbEraseBlocks (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
...
)
{
EFI_STATUS Status;
VA_LIST Marker;
EFI_LBA StartingLba;
UINTN NumOfLba;
Status = EFI_SUCCESS;
//
// Check the parameter.
//
VA_START (Marker, This);
do {
StartingLba = VA_ARG (Marker, EFI_LBA);
if (StartingLba == EFI_LBA_LIST_TERMINATOR ) {
break;
}
NumOfLba = VA_ARG (Marker, UINT32);
if (NumOfLba == 0) {
return EFI_INVALID_PARAMETER;
}
} while ( 1 );
VA_END (Marker);
//
// Erase the blocks.
//
VA_START (Marker, This);
do {
StartingLba = VA_ARG (Marker, EFI_LBA);
if (StartingLba == EFI_LBA_LIST_TERMINATOR ) {
break;
}
NumOfLba = VA_ARG (Marker, UINT32);
Status = EraseBlock (This, StartingLba, NumOfLba);
if (EFI_ERROR (Status)) {
break;
}
} while ( 1 );
VA_END (Marker);
return Status;
}
/**
Install the FVB protocol which based on SMM FVB protocol.
@param[in] SmmFvb The SMM FVB protocol.
**/
VOID
InstallFvb (
IN EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb
)
{
EFI_STATUS Status;
EFI_HANDLE FvbHandle;
EFI_FVB_DEVICE *FvbDevice;
EFI_FIRMWARE_VOLUME_HEADER *VolumeHeader;
EFI_PHYSICAL_ADDRESS Address;
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *OldFvbInterface;
FvbDevice = AllocateRuntimeCopyPool (sizeof (EFI_FVB_DEVICE), &mFvbDeviceTemplate);
ASSERT (FvbDevice != NULL);
FvbDevice->SmmFvbInstance = SmmFvb;
Status = gBS->LocateProtocol (
&gEfiSmmCommunicationProtocolGuid,
NULL,
(VOID **) &mSmmCommunication
);
ASSERT_EFI_ERROR (Status);
Status = GetPhysicalAddress (SmmFvb, &Address);
ASSERT_EFI_ERROR (Status);
VolumeHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN)Address;
//
// Set up the devicepath.
//
if (VolumeHeader->ExtHeaderOffset == 0) {
//
// FV does not contains extension header, then produce MEMMAP_DEVICE_PATH.
//
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
((FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath)->MemMapDevPath.StartingAddress = (UINTN)Address;
((FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath)->MemMapDevPath.EndingAddress = (UINTN)Address + VolumeHeader->FvLength - 1;
} else {
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
CopyGuid (
&((FV_PIWG_DEVICE_PATH *)FvbDevice->DevicePath)->FvDevPath.FvName,
(GUID *)(UINTN)((UINTN)Address + VolumeHeader->ExtHeaderOffset)
);
}
//
// Find a handle with a matching device path that has supports FW Block protocol.
//
Status = gBS->LocateDevicePath (
&gEfiFirmwareVolumeBlockProtocolGuid,
&FvbDevice->DevicePath,
&FvbHandle
);
if (EFI_ERROR (Status) ) {
//
// LocateDevicePath fails so install a new interface and device path.
//
FvbHandle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&FvbHandle,
&gEfiFirmwareVolumeBlockProtocolGuid,
&FvbDevice->FvbInstance,
&gEfiDevicePathProtocolGuid,
FvbDevice->DevicePath,
NULL
);
ASSERT_EFI_ERROR (Status);
} else if (IsDevicePathEnd (FvbDevice->DevicePath)) {
//
// Device allready exists, so reinstall the FVB protocol.
//
Status = gBS->HandleProtocol (
FvbHandle,
&gEfiFirmwareVolumeBlockProtocolGuid,
(VOID **) &OldFvbInterface
);
ASSERT_EFI_ERROR (Status);
Status = gBS->ReinstallProtocolInterface (
FvbHandle,
&gEfiFirmwareVolumeBlockProtocolGuid,
OldFvbInterface,
&FvbDevice->FvbInstance
);
ASSERT_EFI_ERROR (Status);
} else {
//
// There was a FVB protocol on an End Device Path node.
//
ASSERT (FALSE);
}
}
/**
SMM Firmware Volume Block Protocol notification event handler.
Discover NV Variable Store and install Variable Write Arch Protocol.
@param[in] Event Event whose notification function is being invoked.
@param[in] Context Pointer to the notification function's context.
**/
VOID
EFIAPI
SmmFvbReady (
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
EFI_HANDLE *HandleBuffer;
UINTN HandleCount;
UINTN Index;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
//
// Locate all handles of Smm Fvb protocol.
//
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
NULL,
&HandleCount,
&HandleBuffer
);
if (EFI_ERROR (Status)) {
return ;
}
//
// Install FVB protocol.
//
for (Index = 0; Index < HandleCount; Index++) {
SmmFvb = NULL;
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
(VOID **) &SmmFvb
);
if (EFI_ERROR (Status)) {
break;
}
InstallFvb (SmmFvb);
}
FreePool (HandleBuffer);
}
/**
The driver entry point for Firmware Volume Block Driver.
The function does the necessary initialization work
Firmware Volume Block Driver.
@param[in] ImageHandle The firmware allocated handle for the UEFI image.
@param[in] SystemTable A pointer to the EFI system table.
@retval EFI_SUCCESS This funtion always return EFI_SUCCESS.
It will ASSERT on errors.
**/
EFI_STATUS
EFIAPI
FvbSmmDxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
VOID *SmmFvbRegistration;
//
// Smm FVB driver is ready.
//
EfiCreateProtocolNotifyEvent (
&gEfiSmmFirmwareVolumeBlockProtocolGuid,

237
Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmmDxe.h Normal file
View File

@@ -0,0 +1,237 @@
/** @file
The internal header file includes the common header files, defines
internal structure and functions used by FVB module.
Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved. <BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _SMM_FVB_DXE_H_
#define _SMM_FVB_DXE_H_
#include <PiDxe.h>
#include <Protocol/SmmFirmwareVolumeBlock.h>
#include <Protocol/SmmCommunication.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/UefiLib.h>
#include <Library/BaseLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/DevicePathLib.h>
#include <Guid/EventGroup.h>
#include "FvbSmmCommon.h"
#define FVB_DEVICE_SIGNATURE SIGNATURE_32 ('F', 'V', 'B', 'S')
#define FVB_DEVICE_FROM_THIS(a) CR (a, EFI_FVB_DEVICE, FvbInstance, FVB_DEVICE_SIGNATURE)
typedef struct {
MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
} FV_PIWG_DEVICE_PATH;
typedef struct {
MEMMAP_DEVICE_PATH MemMapDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
} FV_MEMMAP_DEVICE_PATH;
typedef struct {
UINTN Signature;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbInstance;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvbInstance;
} EFI_FVB_DEVICE;
/**
This function retrieves the attributes and current settings of the block.
@param[in] This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
@param[out] Attributes Pointer to EFI_FVB_ATTRIBUTES_2 in which the attributes
and current settings are returned. Type EFI_FVB_ATTRIBUTES_2
is defined in EFI_FIRMWARE_VOLUME_HEADER.
@retval EFI_SUCCESS The firmware volume attributes were returned.
**/
EFI_STATUS
EFIAPI
FvbGetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
);
/**
Sets Volume attributes. No polarity translations are done.
@param[in] This Calling context.
@param[out] Attributes Output buffer which contains attributes.
@retval EFI_SUCCESS The function always return successfully.
**/
EFI_STATUS
EFIAPI
FvbSetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
);
/**
Retrieves the physical address of the device.
@param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL.
@param[out] Address Output buffer containing the address.
@retval EFI_SUCCESS The function always return successfully.
**/
EFI_STATUS
EFIAPI
FvbGetPhysicalAddress (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
);
/**
Retrieve the size of a logical block.
@param[in] This Calling context.
@param[in] Lba Indicates which block to return the size for.
@param[out] BlockSize A pointer to a caller allocated UINTN in which
the size of the block is returned.
@param[out] NumOfBlocks A pointer to a caller allocated UINTN in which the
number of consecutive blocks starting with Lba is
returned. All blocks in this range have a size of
BlockSize.
@retval EFI_SUCCESS The function always return successfully.
**/
EFI_STATUS
EFIAPI
FvbGetBlockSize (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumOfBlocks
);
/**
Reads data beginning at Lba:Offset from FV. The Read terminates either
when *NumBytes of data have been read, or when a block boundary is
reached. *NumBytes is updated to reflect the actual number of bytes
written. The write opertion does not include erase. This routine will
attempt to write only the specified bytes. If the writes do not stick,
it will return an error.
@param[in] This Calling context.
@param[in] Lba Block in which to begin write.
@param[in] Offset Offset in the block at which to begin write
@param[in,out] NumBytes On input, indicates the requested write size. On
output, indicates the actual number of bytes written
@param[in] Buffer Buffer containing source data for the write.
@retval EFI_SUCCESS The firmware volume was read successfully and
contents are in Buffer
@retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On output,
NumBytes contains the total number of bytes returned
in Buffer
@retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled state
@retval EFI_DEVICE_ERROR The block device is not functioning correctly and
could not be read
@retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL
**/
EFI_STATUS
EFIAPI
FvbRead (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
);
/**
Writes data beginning at Lba:Offset from FV. The write terminates either
when *NumBytes of data have been written, or when a block boundary is
reached. *NumBytes is updated to reflect the actual number of bytes
written. The write opertion does not include erase. This routine will
attempt to write only the specified bytes. If the writes do not stick,
it will return an error.
@param[in] This Calling context.
@param[in] Lba Block in which to begin write.
@param[in] Offset Offset in the block at which to begin write.
@param[in,out] NumBytes On input, indicates the requested write size. On
output, indicates the actual number of bytes written
@param[in] Buffer Buffer containing source data for the write.
@retval EFI_SUCCESS The firmware volume was written successfully
@retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On output,
NumBytes contains the total number of bytes
actually written.
@retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
@retval EFI_DEVICE_ERROR The block device is not functioning correctly and
could not be written.
@retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL.
**/
EFI_STATUS
EFIAPI
FvbWrite (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
);
/**
The EraseBlock() function erases one or more blocks as denoted by the
variable argument list. The entire parameter list of blocks must be verified
prior to erasing any blocks. If a block is requested that does not exist
within the associated firmware volume (it has a larger index than the last
block of the firmware volume), the EraseBlock() function must return
EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
@param[in] This Calling context.
@param[in] ... Starting LBA followed by Number of Lba to erase.
a -1 to terminate the list.
@retval EFI_SUCCESS The erase request was successfully completed.
@retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled state
@retval EFI_DEVICE_ERROR The block device is not functioning correctly and
could not be written. Firmware device may have been
partially erased.

55
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## @file
# Component description file for Firmware Volume Block module.
#
# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FvbSmmDxe
FILE_GUID = 9E8AD3F4-383D-4ec3-816E-7A4749371290
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = FvbSmmDxeInitialize
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
[Sources]
FvbSmmDxe.c
FvbSmmDxe.h
FvbSmmCommon.h
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
[LibraryClasses]
BaseLib
UefiBootServicesTableLib
DebugLib
DxeServicesTableLib
UefiDriverEntryPoint

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
AlertStandardFormatTable.h
Abstract:
ACPI Alert Standard Format Description Table ASF! as described
in the ASF2.0 Specification
--*/
#ifndef _ALERT_STANDARD_FORMAT_TABLE_H
#define _ALERT_STANDARD_FORMAT_TABLE_H
#include <IndustryStandard/Acpi20.h>
//
// Ensure proper structure formats.
//
#pragma pack (1)
//
// Information Record header that appears at the beginning of each record.
//
typedef struct {
UINT8 Type;
UINT8 Reserved;
UINT16 RecordLength;
} EFI_ACPI_ASF_RECORD_HEADER;
//
// This structure contains information that identifies the system type
// and configuration.
//
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 MinWatchDogResetValue;
UINT8 MinPollingInterval;
UINT16 SystemID;
UINT32 IANAManufactureID;
UINT8 FeatureFlags;
UINT8 Reserved[3];
} EFI_ACPI_ASF_INFO;
//
// Alert sensors definition.
//
#define ASF_ALRT_SENSOR_ARRAY_LENGTH 36
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 AssertionEventBitMask;
UINT8 DeassertionEventBitMask;
UINT8 NumberOfAlerts;
UINT8 ArrayElementLength;
UINT8 DeviceArray[ASF_ALRT_SENSOR_ARRAY_LENGTH];
} EFI_ACPI_ASF_ALRT;
//
// Alert Remote Control System Actions.
//
#define ASF_RCTL_DEVICES_ARRAY_LENGTH 16
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 NumberOfControls;
UINT8 ArrayElementLength;
UINT16 RctlReserved;
UINT8 ControlArray[ASF_RCTL_DEVICES_ARRAY_LENGTH];
} EFI_ACPI_ASF_RCTL;
//
// Remote Control Capabilities.
//
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 RemoteControlCapabilities[7];
UINT8 RMCPCompletionCode;
UINT32 RMCPIANA;
UINT8 RMCPSpecialCommand;
UINT8 RMCPSpecialCommandParameter[2];
UINT8 RMCPBootOptions[2];
UINT8 RMCPOEMParameters[2];
} EFI_ACPI_ASF_RMCP;
//
// SMBus Devices with fixed addresses.
//
#define ASF_ADDR_DEVICE_ARRAY_LENGTH 16
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 SEEPROMAddress;
UINT8 NumberOfDevices;
UINT8 FixedSmbusAddresses[ASF_ADDR_DEVICE_ARRAY_LENGTH];
} EFI_ACPI_ASF_ADDR;
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
EFI_ACPI_ASF_INFO AsfInfo;
EFI_ACPI_ASF_ALRT AsfAlert;
EFI_ACPI_ASF_RCTL AsfRctl;
EFI_ACPI_ASF_RMCP AsfRmcp;
EFI_ACPI_ASF_ADDR AsfAddr;
} EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE;

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Vlv2TbltDevicePkg/Include/ChipsetAccess.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
ChipsetAccess.h
Abstract:
Common Include file for Platform Drivers to access the Chipset registers.
--*/

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Vlv2TbltDevicePkg/Include/CommonIncludes.h Normal file
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/**
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@file
CommonIncludes.h
@brief
This file defines common equates.
**/
#ifndef _COMMON_INCLUDES_H_
#define _COMMON_INCLUDES_H_
#define V_INTEL_VID 0x8086
#ifndef STALL_ONE_MICRO_SECOND
#define STALL_ONE_MICRO_SECOND 1
#endif
#ifndef STALL_ONE_MILLI_SECOND
#define STALL_ONE_MILLI_SECOND 1000
#endif
///
/// Min Max
///
#define V_MIN(a, b) (((a) < (b)) ? (a) : (b))
#define V_MAX(a, b) (((a) > (b)) ? (a) : (b))
///
/// Bit map macro
///
#ifndef BIT0
#define BIT63 0x8000000000000000
#define BIT62 0x4000000000000000
#define BIT61 0x2000000000000000
#define BIT60 0x1000000000000000
#define BIT59 0x0800000000000000
#define BIT58 0x0400000000000000
#define BIT57 0x0200000000000000
#define BIT56 0x0100000000000000
#define BIT55 0x0080000000000000
#define BIT54 0x0040000000000000
#define BIT53 0x0020000000000000
#define BIT52 0x0010000000000000
#define BIT51 0x0008000000000000
#define BIT50 0x0004000000000000
#define BIT49 0x0002000000000000
#define BIT48 0x0001000000000000
#define BIT47 0x0000800000000000
#define BIT46 0x0000400000000000
#define BIT45 0x0000200000000000
#define BIT44 0x0000100000000000
#define BIT43 0x0000080000000000
#define BIT42 0x0000040000000000
#define BIT41 0x0000020000000000
#define BIT40 0x0000010000000000
#define BIT39 0x0000008000000000
#define BIT38 0x0000004000000000
#define BIT37 0x0000002000000000
#define BIT36 0x0000001000000000
#define BIT35 0x0000000800000000
#define BIT34 0x0000000400000000
#define BIT33 0x0000000200000000
#define BIT32 0x0000000100000000
#define BIT31 0x80000000
#define BIT30 0x40000000
#define BIT29 0x20000000
#define BIT28 0x10000000
#define BIT27 0x08000000
#define BIT26 0x04000000
#define BIT25 0x02000000
#define BIT24 0x01000000
#define BIT23 0x00800000
#define BIT22 0x00400000
#define BIT21 0x00200000
#define BIT20 0x00100000
#define BIT19 0x00080000
#define BIT18 0x00040000
#define BIT17 0x00020000
#define BIT16 0x00010000
#define BIT15 0x00008000
#define BIT14 0x00004000
#define BIT13 0x00002000
#define BIT12 0x00001000
#define BIT11 0x00000800
#define BIT10 0x00000400
#define BIT9 0x00000200
#define BIT8 0x00000100
#define BIT7 0x00000080
#define BIT6 0x00000040
#define BIT5 0x00000020
#define BIT4 0x00000010
#define BIT3 0x00000008
#define BIT2 0x00000004
#define BIT1 0x00000002
#define BIT0 0x00000001
#endif
#define BITS(x) (1 << (x))

64
Vlv2TbltDevicePkg/Include/CpuType.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CpuType.h
Abstract:
--*/
#ifndef _CPU_TYPE_H
#define _CPU_TYPE_H
#pragma pack(1)
typedef enum {
EnumCpuUarchUnknown = 0,
EnumNehalemUarch,
} EFI_CPU_UARCH;
typedef enum {
EnumCpuPlatformUnknown = 0,
EnumDesktop,
EnumMobile,
EnumServer,
EnumNetTop
} EFI_CPU_PLATFORM;
typedef enum {
EnumCpuTypeUnknown = 0,
EnumAtom,
EnumNehalemEx,
EnumBloomfield,
EnumGainestown,
EnumHavendale,
EnumLynnfield,
EnumAuburndale,
EnumClarksfield,
EnumPineview,
EnumCedarview,
EnumValleyview,
EnumClarkdale // Havendale 32nm
} EFI_CPU_TYPE;

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Vlv2TbltDevicePkg/Include/FileHandleLib.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _FILE_HANDLE_LIBRARY_HEADER_
#define _FILE_HANDLE_LIBRARY_HEADER_
#include <Protocol/SimpleFileSystem.h>
//
// The tag for use in identifying UNICODE files.
// If the file is UNICODE, the first 16 bits of the file will equal this value.
//
extern CONST UINT16 gUnicodeFileTag;
/**
This function retrieves information about the file for the handle
specified and stores it in the allocated pool memory.
This function allocates a buffer to store the file's information. It is the
caller's responsibility to free the buffer.
@param[in] FileHandle The file handle of the file for which information is
being requested.
@retval NULL Information could not be retrieved.
@retval !NULL The information about the file.
**/
EFI_FILE_INFO*
EFIAPI
FileHandleGetInfo (
IN EFI_FILE_HANDLE FileHandle
);
/**
This function sets the information about the file for the opened handle
specified.
@param[in] FileHandle The file handle of the file for which information
is being set.
@param[in] FileInfo The information to set.
@retval EFI_SUCCESS The information was set.
@retval EFI_INVALID_PARAMETER A parameter was out of range or invalid.
@retval EFI_UNSUPPORTED The FileHandle does not support FileInfo.
@retval EFI_NO_MEDIA The device has no medium.
@retval EFI_DEVICE_ERROR The device reported an error.
@retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
@retval EFI_WRITE_PROTECTED The file or medium is write protected.
@retval EFI_ACCESS_DENIED The file was opened read only.
@retval EFI_VOLUME_FULL The volume is full.
**/
EFI_STATUS
EFIAPI
FileHandleSetInfo (
IN EFI_FILE_HANDLE FileHandle,
IN CONST EFI_FILE_INFO *FileInfo
);
/**
This function reads information from an opened file.
If FileHandle is not a directory, the function reads the requested number of
bytes from the file at the file's current position and returns them in Buffer.
If the read goes beyond the end of the file, the read length is truncated to the
end of the file. The file's current position is increased by the number of bytes
returned. If FileHandle is a directory, the function reads the directory entry
at the file's current position and returns the entry in Buffer. If the Buffer
is not large enough to hold the current directory entry, then
EFI_BUFFER_TOO_SMALL is returned and the current file position is not updated.
BufferSize is set to be the size of the buffer needed to read the entry. On
success, the current position is updated to the next directory entry. If there
are no more directory entries, the read returns a zero-length buffer.
EFI_FILE_INFO is the structure returned as the directory entry.
@param[in] FileHandle The opened file handle.
@param[in, out] BufferSize On input, the size of buffer in bytes. On return,
the number of bytes written.
@param[out] Buffer The buffer to put read data into.
@retval EFI_SUCCESS Data was read.
@retval EFI_NO_MEDIA The device has no media.
@retval EFI_DEVICE_ERROR The device reported an error.
@retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
@retval EFI_BUFFER_TO_SMALL Buffer is too small. ReadSize contains required
size.
**/
EFI_STATUS
EFIAPI
FileHandleRead(
IN EFI_FILE_HANDLE FileHandle,
IN OUT UINTN *BufferSize,
OUT VOID *Buffer
);
/**
Write data to a file.
This function writes the specified number of bytes to the file at the current
file position. The current file position is advanced the actual number of bytes
written, which is returned in BufferSize. Partial writes only occur when there
has been a data error during the write attempt (such as "volume space full").
The file is automatically grown to hold the data if required. Direct writes to
opened directories are not supported.
@param[in] FileHandle The opened file for writing.
@param[in, out] BufferSize On input, the number of bytes in Buffer. On output,
the number of bytes written.
@param[in] Buffer The buffer containing data to write is stored.
@retval EFI_SUCCESS Data was written.
@retval EFI_UNSUPPORTED Writes to an open directory are not supported.
@retval EFI_NO_MEDIA The device has no media.
@retval EFI_DEVICE_ERROR The device reported an error.
@retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
@retval EFI_WRITE_PROTECTED The device is write-protected.
@retval EFI_ACCESS_DENIED The file was opened for read only.
@retval EFI_VOLUME_FULL The volume is full.
**/
EFI_STATUS
EFIAPI
FileHandleWrite(
IN EFI_FILE_HANDLE FileHandle,
IN OUT UINTN *BufferSize,
IN VOID *Buffer
);
/**
Close an open file handle.
This function closes a specified file handle. All "dirty" cached file data is
flushed to the device, and the file is closed. In all cases the handle is
closed.
@param[in] FileHandle The file handle to close.
@retval EFI_SUCCESS The file handle was closed successfully.
**/
EFI_STATUS
EFIAPI
FileHandleClose (
IN EFI_FILE_HANDLE FileHandle
);
/**
Delete a file and close the handle.
This function closes and deletes a file. In all cases the file handle is closed.
If the file cannot be deleted, the warning code EFI_WARN_DELETE_FAILURE is
returned, but the handle is still closed.
@param[in] FileHandle The file handle to delete.
@retval EFI_SUCCESS The file was closed successfully.
@retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not
deleted.
@retval INVALID_PARAMETER One of the parameters has an invalid value.
**/
EFI_STATUS
EFIAPI
FileHandleDelete (
IN EFI_FILE_HANDLE FileHandle
);
/**
Set the current position in a file.
This function sets the current file position for the handle to the position
supplied. With the exception of moving to position 0xFFFFFFFFFFFFFFFF, only
absolute positioning is supported, and moving past the end of the file is
allowed (a subsequent write would grow the file). Moving to position
0xFFFFFFFFFFFFFFFF causes the current position to be set to the end of the file.
If FileHandle is a directory, the only position that may be set is zero. This
has the effect of starting the read process of the directory entries over again.
@param[in] FileHandle The file handle on which the position is being set.
@param[in] Position The byte position from the begining of the file.
@retval EFI_SUCCESS The operation completed sucessfully.
@retval EFI_UNSUPPORTED The request for non-zero is not valid on
directories.
@retval INVALID_PARAMETER One of the parameters has an invalid value.
**/
EFI_STATUS
EFIAPI
FileHandleSetPosition (
IN EFI_FILE_HANDLE FileHandle,
IN UINT64 Position
);
/**
Gets a file's current position.
This function retrieves the current file position for the file handle. For
directories, the current file position has no meaning outside of the file
system driver. As such, the operation is not supported. An error is returned
if FileHandle is a directory.
@param[in] FileHandle The open file handle on which to get the position.
@param[out] Position The byte position from begining of file.
@retval EFI_SUCCESS The operation completed successfully.
@retval INVALID_PARAMETER One of the parameters has an invalid value.
@retval EFI_UNSUPPORTED The request is not valid on directories.
**/
EFI_STATUS
EFIAPI
FileHandleGetPosition (
IN EFI_FILE_HANDLE FileHandle,
OUT UINT64 *Position
);
/**
Flushes data on a file.
This function flushes all modified data associated with a file to a device.
@param[in] FileHandle The file handle on which to flush data.
@retval EFI_SUCCESS The data was flushed.
@retval EFI_NO_MEDIA The device has no media.
@retval EFI_DEVICE_ERROR The device reported an error.
@retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
@retval EFI_WRITE_PROTECTED The file or medium is write protected.
@retval EFI_ACCESS_DENIED The file was opened for read only.
**/
EFI_STATUS
EFIAPI
FileHandleFlush (
IN EFI_FILE_HANDLE FileHandle
);
/**
Function to determine if a given handle is a directory handle.
If DirHandle is NULL, then ASSERT().
Open the file information on the DirHandle, and verify that the Attribute
includes EFI_FILE_DIRECTORY bit set.
@param[in] DirHandle The handle to open the file.
@retval EFI_SUCCESS DirHandle is a directory.
@retval EFI_INVALID_PARAMETER DirHandle did not have EFI_FILE_INFO available.
@retval EFI_NOT_FOUND DirHandle is not a directory.
**/
EFI_STATUS
EFIAPI
FileHandleIsDirectory (
IN EFI_FILE_HANDLE DirHandle
);
/**
Retrieve first entry from a directory.
This function takes an open directory handle and gets information from the
first entry in the directory. A buffer is allocated to contain
the information and a pointer to the buffer is returned in *Buffer. The
caller can use FileHandleFindNextFile() to get subsequent directory entries.
The buffer will be freed by FileHandleFindNextFile() when the last directory
entry is read. Otherwise, the caller must free the buffer, using FreePool,
when finished with it.
@param[in] DirHandle The file handle of the directory to search.
@param[out] Buffer The pointer to pointer to buffer for file's information.
@retval EFI_SUCCESS Found the first file.
@retval EFI_NOT_FOUND Cannot find the directory.
@retval EFI_NO_MEDIA The device has no media.
@retval EFI_DEVICE_ERROR The device reported an error.
@retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
@return Others The status of FileHandleGetInfo, FileHandleSetPosition,
or FileHandleRead.
**/
EFI_STATUS
EFIAPI
FileHandleFindFirstFile (
IN EFI_FILE_HANDLE DirHandle,
OUT EFI_FILE_INFO **Buffer
);
/**
Retrieve next entries from a directory.
To use this function, the caller must first call the FileHandleFindFirstFile()
function to get the first directory entry. Subsequent directory entries are
retrieved by using the FileHandleFindNextFile() function. This function can
be called several times to get each entry from the directory. If the call of
FileHandleFindNextFile() retrieved the last directory entry, the next call of
this function will set *NoFile to TRUE and free the buffer.
@param[in] DirHandle The file handle of the directory.
@param[out] Buffer The pointer to buffer for file's information.
@param[out] NoFile The pointer to boolean when last file is found.
@retval EFI_SUCCESS Found the next file, or reached last file.
@retval EFI_NO_MEDIA The device has no media.
@retval EFI_DEVICE_ERROR The device reported an error.
@retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
**/
EFI_STATUS
EFIAPI
FileHandleFindNextFile(
IN EFI_FILE_HANDLE DirHandle,
OUT EFI_FILE_INFO *Buffer,
OUT BOOLEAN *NoFile
);
/**
Retrieve the size of a file.
If FileHandle is NULL then ASSERT().
If Size is NULL then ASSERT().
This function extracts the file size info from the FileHandle's EFI_FILE_INFO
data.
@param[in] FileHandle The file handle from which size is retrieved.
@param[out] Size The pointer to size.
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_DEVICE_ERROR Cannot access the file.
**/
EFI_STATUS
EFIAPI
FileHandleGetSize (
IN EFI_FILE_HANDLE FileHandle,
OUT UINT64 *Size
);
/**
Set the size of a file.
If FileHandle is NULL then ASSERT().
This function changes the file size info from the FileHandle's EFI_FILE_INFO
data.
@param[in] FileHandle The file handle whose size is to be changed.
@param[in] Size The new size.
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_DEVICE_ERROR Cannot access the file.
**/
EFI_STATUS
EFIAPI
FileHandleSetSize (
IN EFI_FILE_HANDLE FileHandle,
IN UINT64 Size
);
/**
Function to get a full filename given a EFI_FILE_HANDLE somewhere lower on the
directory 'stack'.
@param[in] Handle Handle to the Directory or File to create path to.
@param[out] FullFileName Pointer to pointer to generated full file name. It
is the responsibility of the caller to free this memory
with a call to FreePool().
@retval EFI_SUCCESS The operation was successful and FullFileName is valid.
@retval EFI_INVALID_PARAMETER Handle was NULL.
@retval EFI_INVALID_PARAMETER FullFileName was NULL.
@retval EFI_OUT_OF_MEMORY A memory allocation failed.
**/
EFI_STATUS
EFIAPI
FileHandleGetFileName (
IN CONST EFI_FILE_HANDLE Handle,
OUT CHAR16 **FullFileName
);
/**
Function to read a single line (up to but not including the \n) from a file.
If the position upon start is 0, then the Ascii Boolean will be set. This should be
maintained and not changed for all operations with the same file.
@param[in] Handle FileHandle to read from.
@param[in, out] Buffer The pointer to buffer to read into.
@param[in, out] Size The pointer to number of bytes in Buffer.
@param[in] Truncate If the buffer is large enough, this has no effect.
If the buffer is is too small and Truncate is TRUE,
the line will be truncated.
If the buffer is is too small and Truncate is FALSE,
then no read will occur.
@param[in, out] Ascii Boolean value for indicating whether the file is
Ascii (TRUE) or UCS2 (FALSE).
@retval EFI_SUCCESS The operation was successful. The line is stored in
Buffer.
@retval EFI_INVALID_PARAMETER Handle was NULL.
@retval EFI_INVALID_PARAMETER Size was NULL.
@retval EFI_BUFFER_TOO_SMALL Size was not large enough to store the line.
Size was updated to the minimum space required.
@sa FileHandleRead
**/
EFI_STATUS
EFIAPI
FileHandleReadLine(
IN EFI_FILE_HANDLE Handle,
IN OUT CHAR16 *Buffer,
IN OUT UINTN *Size,
IN BOOLEAN Truncate,
IN OUT BOOLEAN *Ascii
);
/**
Function to read a single line from a file. The \n is not included in the returned
buffer. The returned buffer must be callee freed.
If the position upon start is 0, then the Ascii Boolean will be set. This should be
maintained and not changed for all operations with the same file.
@param[in] Handle FileHandle to read from.
@param[in, out] Ascii Boolean value for indicating whether the file is
Ascii (TRUE) or UCS2 (FALSE).
@return The line of text from the file.
@sa FileHandleReadLine
**/
CHAR16*
EFIAPI
FileHandleReturnLine(
IN EFI_FILE_HANDLE Handle,
IN OUT BOOLEAN *Ascii
);
/**
Function to write a line of unicode text to a file.
If Handle is NULL, ASSERT.
@param[in] Handle FileHandle to write to.
@param[in] Buffer Buffer to write, if NULL the function will
take no action and return EFI_SUCCESS.
@retval EFI_SUCCESS The data was written.
@retval other Failure.
@sa FileHandleWrite
**/
EFI_STATUS
EFIAPI
FileHandleWriteLine(
IN EFI_FILE_HANDLE Handle,
IN CHAR16 *Buffer
);
/**
Function to take a formatted argument and print it to a file.
@param[in] Handle The file handle for the file to write to.
@param[in] Format The format argument (see printlib for the format specifier).
@param[in] ... The variable arguments for the format.
@retval EFI_SUCCESS The operation was successful.
@retval other A return value from FileHandleWriteLine.
@sa FileHandleWriteLine
**/
EFI_STATUS
EFIAPI
FileHandlePrintLine(
IN EFI_FILE_HANDLE Handle,
IN CONST CHAR16 *Format,
...
);
/**
Function to determine if a FILE_HANDLE is at the end of the file.
This will NOT work on directories.
If Handle is NULL, then ASSERT().
@param[in] Handle The file handle.
@retval TRUE The position is at the end of the file.
@retval FALSE The position is not at the end of the file.

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
AcpiTableStorage.h
Abstract:
GUID for the ACPI Table Storage filename.
This GUID is defined in the Tiano ACPI Table Storage EPS.
--*/

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Asf.h
Abstract:
Alert Standard Format address variable
--*/
#ifndef AlertStandardFormat_h_included
#define AlertStandardFormat_h_included
#pragma pack(1)
//
// ASF address
//
//
// {3D995FB4-4F05-4073-BE72-A19CFB5DE690}
//
#define ALERT_STANDARD_FORMAT_VARIABLE_GUID \
{0x3d995fb4, 0x4f05, 0x4073, 0xbe, 0x72, 0xa1, 0x9c, 0xfb, 0x5d, 0xe6, 0x90}
#define ALERT_STANDARD_FORMAT_VARIABLE_NAME (L"ASF")
#define ASCII_ALERT_STANDARD_FORMAT_VARIABLE_NAME ("ASF")
extern EFI_GUID gAlertStandardFormatGuid;
extern CHAR16 gAlertStandardFormatName[];
typedef struct {
UINT8 SmbusAddr;
struct {
UINT32 VendorSpecificId;
UINT16 SubsystemDeviceId;
UINT16 SubsystemVendorId;
UINT16 Interface;
UINT16 DeviceId;
UINT16 VendorId;
UINT8 VendorRevision;
UINT8 DeviceCapabilities;
} Udid;
struct {
UINT8 SubCommand;
UINT8 Version;
UINT32 IanaId;
UINT8 SpecialCommand;
UINT16 SpecialCommandParam;
UINT16 BootOptionsBits;
UINT16 OemParam;
} AsfBootOptions;
struct {
UINT8 Bus;
UINT8 Device;
UINT8 Function;
UINT16 VendorId;
UINT16 DeviceId;
UINT16 IderCmdBar;
UINT16 IderCtrlBar;
UINT8 IderIrq;
UINT16 SolBar;
UINT8 SolIrq;
} PciInfo;
struct {
UINT8 IamtProvisioningStatus;
BOOLEAN IamtIsProvisioned;
} IamtInfo;
struct {

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/*++
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
BiosId.h
Abstract:
GUIDs used for Bios ID.
--*/
#ifndef _BIOS_ID_H_
#define _BIOS_ID_H_

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
BoardFeatures.h
Abstract:
EFI Platform Board Features
--*/
#ifndef BoardFeatures_h_included
#define BoardFeatures_h_included
#include <Base.h>
#pragma pack(1)
//
// Board Features
//
#if defined LEGACY_BOARD_FEATURES && LEGACY_BOARD_FEATURES
#define B_BOARD_FEATURES_CHIPSET_LAN BIT0
#define B_BOARD_FEATURES_LAN_MARVELL BIT1
#define B_BOARD_FEATURES_AA_NOT_FOUND BIT2
#define B_BOARD_FEATURES_SIO_NO_COM1 BIT3
#define B_BOARD_FEATURES_SIO_COM2 BIT4
#define B_BOARD_FEATURES_SIO_NO_PARALLEL BIT5
#define B_BOARD_FEATURES_CHIPSET_VIDEO BIT6
#define B_BOARD_FEATURES_CHIPSET_VIDEO_OPTION0 BIT7
#define B_BOARD_FEATURES_VIDEO_SLOT BIT8
#define B_BOARD_FEATURES_MINI_CARD BIT9
#define B_BOARD_FEATURES_DISCRETE_1394 BIT10
#define B_BOARD_FEATURES_LEGACY_FREE BIT11
#define B_BOARD_FEATURES_USB_HUB BIT12
#define B_BOARD_FEATURES_TPM BIT13
#define B_BOARD_FEATURES_VIIV BIT14
#define B_BOARD_FEATURES_FORM_FACTOR_MASK (BIT15|BIT16|BIT17|BIT18|BIT19)
#define B_BOARD_FEATURES_FORM_FACTOR_PBTX BIT15
#define B_BOARD_FEATURES_FORM_FACTOR_ATX BIT16
#define B_BOARD_FEATURES_FORM_FACTOR_BTX BIT17
#define B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX BIT18
#define B_BOARD_FEATURES_FORM_FACTOR_MICRO_BTX BIT19
#define B_BOARD_FEATURES_MEMORY_TYPE_DDR1 BIT20
#define B_BOARD_FEATURES_MEMORY_TYPE_DDR2 BIT21
#define B_BOARD_FEATURES_MEMORY_SLOT_MASK BIT23 | BIT22
#define V_BOARD_FEATURES_1_MEMORY_SLOT 0 // BIT22=0, BIT23=0
#define V_BOARD_FEATURES_2_MEMORY_SLOT BIT22 // BIT22=1, BIT23=0
#define V_BOARD_FEATURES_3_MEMORY_SLOT BIT23 // BIT22=0, BIT23=1
#define V_BOARD_FEATURES_4_MEMORY_SLOT BIT23 | BIT22 // BIT22=1, BIT23=1
#define B_BOARD_FEATURES_ALT_MEM_CLK_RT BIT24
#define B_BOARD_FEATURES_SLEEP_MASK BIT25
#define V_BOARD_FEATURES_SLEEP_S1 0 // BIT25=0
#define V_BOARD_FEATURES_SLEEP_S3 BIT25 // BIT25=1
#define B_BOARD_FEATURES_3JACK_AUDIO_SOLUTION BIT26 // 0/1= 5/3 Rear Jacks
#define B_BOARD_FEATURES_DISCRETE_SATA BIT27
#define B_BOARD_FEATURES_2_SATA BIT28 // 2SATA instead of 4(pre Ich8) or 4 SATA instead of 6(Ich8)
#define B_BOARD_FEATURES_RVP BIT29 // Board is an RVP board
#define B_BOARD_FEATURES_PORT80_LPC BIT30 // Port80 PCI(0) or LPC(1)
#define B_BOARD_FEATURES_LIMITED_CPU_SUPPORT BIT31 // Limited CPU support
#define B_BOARD_FEATURES_PMP_SUPPORT BIT32 // Support for over-voltaging memory
#define B_BOARD_FEATURES_HW_WATCHDOG_TIMER BIT33 // Support for the HW-based 555 Watchdog Timer feature
#define B_BOARD_FEATURES_NO_QRT BIT34 // disable QRT
#define B_BOARD_FEATURES_VERB_TABLE1 BIT35 // Verb table 1
#define B_BOARD_FEATURES_VERB_TABLE2 BIT36 // Verb table 2
#define B_BOARD_FEATURES_VERB_TABLE3 BIT37 // Verb table 3
#define B_BOARD_FEATURES_VERB_TABLE4 BIT38 // Verb table 4
#define B_BOARD_FEATURES_VERB_TABLE5 BIT39 // Reserved for Verb table 5
#define B_BOARD_FEATURES_VERB_TABLE_MASK BIT35 | BIT36 | BIT37 | BIT38 | BIT39
#define B_BOARD_FEATURES_KENTSFIELD_BLOCK BIT40 // Kentsfield not supported
#define B_BOARD_FEATURES_KENTSFIELD_WARNING BIT41 // Kentsfield warning
#define B_BOARD_FEATURES_ESATA_PORT0 BIT42 // E-SATA on Port0
#define B_BOARD_FEATURES_ESATA_PORT1 BIT43 // E-SATA on Port1
#define B_BOARD_FEATURES_ESATA_PORT2 BIT44 // E-SATA on Port2
#define B_BOARD_FEATURES_ESATA_PORT3 BIT45 // E-SATA on Port3
#define B_BOARD_FEATURES_ESATA_PORT4 BIT46 // E-SATA on Port4
#define B_BOARD_FEATURES_ESATA_PORT5 BIT47 // E-SATA on Port5
#define B_BOARD_FEATURES_ECIR BIT48 // Enhanced Consumer IR
#define B_BOARD_FEATURES_PS2WAKEFROMS5 BIT49 // Wake from S5 via PS2 keyboard
#define B_BOARD_FEATURES_HDAUDIOLINK BIT50 // HD audio link support
#define B_BOARD_FEATURES_1_PATA BIT51
#define B_BOARD_FEATURES_MOBILE BIT52
#define B_BOARD_FEATURES_NO_FLOPPY BIT53
#define B_BOARD_FEATURES_DISABLE_UNUSED_FSB BIT54
//
// Bit 55-58 reserved by PSID support. CPU power requirement below are preliminary.
// They might be changed.
// This is not same as 8.6.1 products so be careful.
//
#define B_BOARD_FEATURES_CPU_POWER_BITNUM 55
#define B_BOARD_FEATURES_CPU_POWER_MASK (BIT55 | BIT56 | BIT57 | BIT58)
#define B_BOARD_FEATURES_CPU_POWER_35W 0 // Theoretically doesn't exist.
#define B_BOARD_FEATURES_CPU_POWER_40W BIT55 // 0001
#define B_BOARD_FEATURES_CPU_POWER_45W BIT56 // 0010
#define B_BOARD_FEATURES_CPU_POWER_50W (BIT55 | BIT56) // 0011
#define B_BOARD_FEATURES_CPU_POWER_65W BIT57 // 0100 Wolfdale-H/-M
#define B_BOARD_FEATURES_CPU_POWER_70W (BIT55 | BIT57) // 0101
#define B_BOARD_FEATURES_CPU_POWER_75W (BIT56 | BIT57) // 0110
#define B_BOARD_FEATURES_CPU_POWER_80W (BIT55 | BIT56 | BIT57) // 0111
#define B_BOARD_FEATURES_CPU_POWER_95W BIT58 // 1000 Yorkfield
#define B_BOARD_FEATURES_CPU_POWER_100W (BIT55 | BIT58) // 1001
#define B_BOARD_FEATURES_CPU_POWER_105W (BIT56 | BIT58) // 1010
#define B_BOARD_FEATURES_CPU_POWER_110W (BIT55 | BIT56 | BIT58) // 1011
#define B_BOARD_FEATURES_CPU_POWER_130W (BIT57 | BIT58) // 1100 XE Yorkfield
#define B_BOARD_FEATURES_CPU_POWER_135W (BIT55 | BIT57 | BIT58) // 1101
#define B_BOARD_FEATURES_CPU_POWER_Over135W (BIT56 | BIT57 | BIT58) // 1110 Reserved
#define B_BOARD_FEATURES_CPU_POWER_140W (BIT55 | BIT56 | BIT57 | BIT58) // 1111 Reserved
#define B_VV_BOARD_FEATURES BIT59
#define B_BOARD_FEATURES_IDCC2_SUPPORT BIT60 // Include IDCC2 support
#define B_BOARD_FEATURES_NO_SATA_PORT2_3 BIT61 // No SATA Port2&3 Connector, used with B_BOARD_FEATURES_2_SATA flag
#define B_BOARD_FEATURES_FORM_FACTOR_MINI_ITX BIT62
#define B_BOARD_FEATURES_NPI_QPI_VOLTAGE BIT63
#else
#define B_BOARD_FEATURES_CHIPSET_LAN BIT0
#define B_BOARD_FEATURES_CHIPSET_VIDEO BIT1
#define B_BOARD_FEATURES_VIDEO_SLOT BIT2
#define B_BOARD_FEATURES_AA_NOT_FOUND BIT3
#define B_BOARD_FEATURES_SIO_NO_COM1 BIT4
#define B_BOARD_FEATURES_SIO_COM2 BIT5
#define B_BOARD_FEATURES_SIO_NO_PARALLEL BIT6
#define B_BOARD_FEATURES_NO_FLOPPY BIT7
#define B_BOARD_FEATURES_PS2WAKEFROMS5 BIT8 // Wake from S5 via PS2 keyboard
#define B_BOARD_FEATURES_ECIR BIT9 // Enhanced Consumer IR
#define B_BOARD_FEATURES_LEGACY_FREE BIT10
#define B_BOARD_FEATURES_MINI_CARD BIT11
#define B_BOARD_FEATURES_DISCRETE_1394 BIT12
#define B_BOARD_FEATURES_USB_HUB BIT13
#define B_BOARD_FEATURES_TPM BIT14
#define B_BOARD_FEATURES_FORM_FACTOR_MASK (BIT15|BIT16|BIT17|BIT18|BIT19|BIT20)
#define B_BOARD_FEATURES_FORM_FACTOR_PBTX BIT15
#define B_BOARD_FEATURES_FORM_FACTOR_ATX BIT16
#define B_BOARD_FEATURES_FORM_FACTOR_BTX BIT17
#define B_BOARD_FEATURES_FORM_FACTOR_MICRO_ATX BIT18
#define B_BOARD_FEATURES_FORM_FACTOR_MICRO_BTX BIT19
#define B_BOARD_FEATURES_FORM_FACTOR_MINI_ITX BIT20
#define B_BOARD_FEATURES_MEMORY_TYPE_DDR2 BIT21
#define B_BOARD_FEATURES_MEMORY_TYPE_DDR3 BIT22
#define B_BOARD_FEATURES_MEMORY_SLOT_MASK (BIT24 | BIT23)
#define V_BOARD_FEATURES_1_MEMORY_SLOT 0 // BIT23=0, BIT24=0
#define V_BOARD_FEATURES_2_MEMORY_SLOT BIT23 // BIT23=1, BIT24=0
#define V_BOARD_FEATURES_3_MEMORY_SLOT BIT24 // BIT23=0, BIT24=1
#define V_BOARD_FEATURES_4_MEMORY_SLOT (BIT24 | BIT23) // BIT23=1, BIT24=1
#define B_BOARD_FEATURES_2_C0_MEMORY_SLOT BIT25 // 2 Channel 0 memory slot
#define B_BOARD_FEATURES_SLEEP_MASK BIT26
#define V_BOARD_FEATURES_SLEEP_S1 0 // BIT26=0
#define V_BOARD_FEATURES_SLEEP_S3 BIT26 // BIT26=1
#define B_BOARD_FEATURES_3JACK_AUDIO_SOLUTION BIT27 // 0/1= 5/3 Rear Jacks
#define B_BOARD_FEATURES_HDAUDIOLINK BIT28 // HD audio link support
#define B_BOARD_FEATURES_DISCRETE_SATA BIT29
#define B_BOARD_FEATURES_2_SATA BIT30 // 2SATA instead of 4(pre Ich8) or 4 SATA instead of 6(Ich8)
#define B_BOARD_FEATURES_NO_SATA_PORT2_3 BIT31 // No SATA Port2&3 Connector, used with B_BOARD_FEATURES_2_SATA flag
#define B_BOARD_FEATURES_RVP BIT32 // Board is an RVP board
#define B_BOARD_FEATURES_ESATA_PORT0 BIT33 // E-SATA on Port0
#define B_BOARD_FEATURES_ESATA_PORT1 BIT34 // E-SATA on Port1
#define B_BOARD_FEATURES_ESATA_PORT2 BIT35 // E-SATA on Port2
#define B_BOARD_FEATURES_ESATA_PORT3 BIT36 // E-SATA on Port3
#define B_BOARD_FEATURES_ESATA_PORT4 BIT37 // E-SATA on Port4
#define B_BOARD_FEATURES_ESATA_PORT5 BIT38 // E-SATA on Port5
#define B_BOARD_FEATURES_IDCC2_SUPPORT BIT39 // Include IDCC2 support
#define B_BOARD_FEATURES_NPI_QPI_VOLTAGE BIT40
#define B_BOARD_FEATURES_LIMITED_CPU_SUPPORT BIT41 // Limited CPU support
#define B_BOARD_FEATURES_PMP_SUPPORT BIT42 // Support for over-voltaging memory
#define B_BOARD_FEATURES_HW_WATCHDOG_TIMER BIT43 // Support for the HW-based 555 Watchdog Timer feature
#define B_BOARD_FEATURES_LVDS BIT44 // Support for LVDS
#define B_BOARD_FEATURES_VERB_TABLE_MASK (BIT45|BIT46|BIT47|BIT48) // Verb table
#define B_BOARD_FEATURES_VERB_TABLE1 BIT45 // Verb table 1
#define B_BOARD_FEATURES_VERB_TABLE2 BIT46 // Verb table 2
#define B_BOARD_FEATURES_VERB_TABLE3 BIT47 // Verb table 3
#define B_BOARD_FEATURES_VERB_TABLE4 BIT48 // Verb table 4
#define B_BOARD_FEATURES_NO_MINIPCIE BIT49 // Mini PCIe slot
#define B_BOARD_FEATURES_HDMI_SLOT BIT50 // HDMI slot
#define B_BOARD_FEATURES_PS2_HIDE BIT51 // PS2 hide
#define B_BOARD_FEATURES_DVID_SLOT BIT52 // DVID slot
#define B_BOARD_FEATURES_SIO_COM3 BIT53
#define B_BOARD_FEATURES_SIO_COM4 BIT54
#define B_BOARD_FEATURES_LAN2 BIT55
#define B_BOARD_FEATURES_PCIe_SLOT BIT56
#endif
typedef UINT64 EFI_BOARD_FEATURES;
#pragma pack()
//
// Global ID for the Platform Boot Mode Protocol.
//
#define EFI_BOARD_FEATURES_GUID \
{ 0x94b9e8ae, 0x8877, 0x479a, 0x98, 0x42, 0xf5, 0x97, 0x4b, 0x82, 0xce, 0xd3 }
extern EFI_GUID gEfiBoardFeaturesGuid;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
EfiVpdData.h
Abstract:
Constants and declarations that are common accross PEI and DXE.
--*/
#ifndef _EFI_VPD_DATA_H_
#define _EFI_VPD_DATA_H_
#pragma pack(1)
//
// DMI data
//
typedef struct {
CHAR8 DmiGpnvHeader[4]; // $DMI
CHAR8 SystemInfoManufacturer[0x20]; // Structure Type 1 String 1
CHAR8 SystemInfoProductName[0x20]; // Structure Type 1 String 2
CHAR8 SystemInfoVersion[0x18]; // Structure Type 1 String 3
CHAR8 SystemInfoSerialNumber[0x20]; // Structure Type 1 String 4
CHAR8 BaseBoardManufacturer[0x20]; // Structure Type 2 String 1
CHAR8 BaseBoardProductName[0x20]; // Structure Type 2 String 2
CHAR8 BaseBoardVersion[0x18]; // Structure Type 2 String 3
CHAR8 BaseBoardSerialNumber[0x20]; // Structure Type 2 String 4
CHAR8 ChassisManufacturer[0x20]; // Structure Type 3 String 1
UINT8 ChassisType; // Enumerated
CHAR8 ChassisVersion[0x18]; // Structure Type 3 String 2
CHAR8 ChassisSerialNumber[0x20]; // Structure Type 3 String 3
CHAR8 ChassisAssetTag[0x20]; // Structure Type 3 String 4
UINT8 MfgAccessKeyWorkspace;
UINT8 ChecksumFixupPool[0xd]; // Checksum Fix-ups
UINT8 SwitchboardData[4]; // 32 switch switchboard
UINT8 IntelReserved; // Reserved for Future Use
} DMI_DATA;
#define DMI_DATA_GUID \
{ \
0x70e56c5e, 0x280c, 0x44b0, 0xa4, 0x97, 0x09, 0x68, 0x1a, 0xbc, 0x37, 0x5e \
}
#define DMI_DATA_NAME (L"DmiData")
#define ASCII_DMI_DATA_NAME ("DmiData")
extern EFI_GUID gDmiDataGuid;
extern CHAR16 gDmiDataName[];
//
// UUID - universally unique system id.
//
#define UUID_VARIABLE_GUID \
{ \
0xd357c710, 0x0ada, 0x4717, 0x8d, 0xba, 0xc6, 0xad, 0xc7, 0xcd, 0x2b, 0x2a \
}
#define UUID_VARIABLE_NAME (L"UUID")
#define ASCII_UUID_VARIABLE_NAME ("UUID")
//
// UUID data
//
typedef struct {
UINT32 UuidHigh;
UINT32 UuidLow;
} SYSTEM_1394_UUID;
typedef struct {
EFI_GUID SystemUuid; // System Unique ID
SYSTEM_1394_UUID System1394Uuid; // Onboard 1394 UUID
} UUID_DATA;
extern EFI_GUID gUuidVariableGuid;
extern CHAR16 gUuidVariableName[];
//
// MB32GUID for Computrace.
//
#define MB32_GUID \
{ 0x539D62BA, 0xDE35, 0x453E, 0xBA, 0xB0, 0x85, 0xDB, 0x8D, 0xA2, 0x42, 0xF9 }
#define MB32_VARIABLE_NAME (L"MB32")
#define ASCII_MB32_VARIABLE_NAME ("MB32")
extern EFI_GUID gMb32Guid;
extern CHAR16 gMb32VariableName[];
//
// ACPI OSFR Manufacturer String.
//
// {72234213-0FD7-48a1-A59F-B41BC107FBCD}
//
#define ACPI_OSFR_MFG_STRING_VARIABLE_GUID \
{0x72234213, 0xfd7, 0x48a1, 0xa5, 0x9f, 0xb4, 0x1b, 0xc1, 0x7, 0xfb, 0xcd}
#define ACPI_OSFR_MFG_STRING_VARIABLE_NAME (L"OcurMfg")
#define ASCII_ACPI_OSFR_MF_STRING_VARIABLE_NAME ("OcurMfg")
extern EFI_GUID gACPIOSFRMfgStringVariableGuid;
//
// ACPI OSFR Model String.
//
// {72234213-0FD7-48a1-A59F-B41BC107FBCD}
//
#define ACPI_OSFR_MODEL_STRING_VARIABLE_GUID \
{0x72234213, 0xfd7, 0x48a1, 0xa5, 0x9f, 0xb4, 0x1b, 0xc1, 0x7, 0xfb, 0xcd}
#define ACPI_OSFR_MODEL_STRING_VARIABLE_NAME (L"OcurModel")
#define ASCII_ACPI_OSFR_MODEL_STRING_VARIABLE_NAME ("OcurModel")
extern EFI_GUID gACPIOSFRModelStringVariableGuid;
//
// ACPI OSFR Reference Data Block.
//
// {72234213-0FD7-48a1-A59F-B41BC107FBCD}
//
#define ACPI_OSFR_REF_DATA_BLOCK_VARIABLE_GUID \
{0x72234213, 0xfd7, 0x48a1, 0xa5, 0x9f, 0xb4, 0x1b, 0xc1, 0x7, 0xfb, 0xcd}
#define ACPI_OSFR_REF_DATA_BLOCK_VARIABLE_NAME (L"OcurRef")
#define ASCII_ACPI_OSFR_REF_DATA_BLOCK_VARIABLE_NAME ("OcurRef")
extern EFI_GUID gACPIOSFRRefDataBlockVariableGuid;
//
// Manufacturing mode GUID
//
#define MfgMode_GUID \
{ 0xEF14FD78, 0x0793, 0x4e2b, 0xAC, 0x6D, 0x06, 0x28, 0x47, 0xE0, 0x17, 0x91 }
#define MFGMODE_VARIABLE_NAME (L"MfgMode")
#define ASCII_MFGMODE_VARIABLE_NAME ("MfgMode")
typedef struct {

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
FirmwareId.h
--*/
#ifndef _FirmwareId_h_GUID_included
#define _FirmwareId_h_GUID_included
#pragma pack(1)
//
// Firmware ID
//
#define FIRMWARE_ID_MAX_LENGTH 35
typedef struct {
CHAR8 BiosId[8];
CHAR8 Separator1;
CHAR8 OemId[3];
CHAR8 Separator2;
CHAR8 BuildId[4];
CHAR8 Separator3;
CHAR8 Century[2];
CHAR8 Year[2];
CHAR8 Separator4;
CHAR8 Month[2];
CHAR8 Date[2];
CHAR8 Separator5;
CHAR8 Hour[2];
CHAR8 Minute[2];
CHAR8 Dummy[3];
} FIRMWARE_ID_DATA;
#define OLD_FIRMWARE_ID_GUID \
{0xefc071ae, 0x41b8, 0x4018, 0xaf, 0xa7, 0x31, 0x4b, 0x18, 0x5e, 0x57, 0x8b}
#define FIRMWARE_ID_GUID \
{0x5e559c23, 0x1faa, 0x4ae1, 0x8d, 0x4a, 0xc6, 0xcf, 0x02, 0x6c, 0x76, 0x6f}
#define FIRMWARE_ID_NAME L"FirmwareId"

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Vlv2TbltDevicePkg/Include/Guid/HwWatchdogTimerHob.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
HwWatchdogTimerHob.h
Abstract:
GUID used for Watchdog Timer status in the HOB list.
--*/
#ifndef _EFI_WATCHDOG_TIMER_HOB_GUID_H_
#define _EFI_WATCHDOG_TIMER_HOB_GUID_H_
#define EFI_WATCHDOG_TIMER_HOB_GUID \
{ 0x226cd3f, 0x69b5, 0x4150, 0xac, 0xbe, 0xbf, 0xbf, 0x18, 0xe3, 0x3, 0xd5 }
#define EFI_WATCHDOG_TIMER_DEFINITION_HOB_GUID \
{ 0xd29302b0, 0x11ba, 0x4073, 0xa2, 0x27, 0x53, 0x8d, 0x25, 0x42, 0x70, 0x9f }
typedef enum {
HWWD_NONE,
HWWD_TIMER_EXPIRED,
HWWD_SPONTANEOUS_REBOOT,
HWWD_FORCED_TIMEOUT
} HW_WATCHDOG_TIMEOUT;
typedef struct {
HW_WATCHDOG_TIMEOUT TimeoutStatus;
} HW_WATCHDOG_INFO;
//
// Watchdog timer action values.
//
#define WDT_ACTION_RESET 0x01 // reload/reset timer
#define WDT_ACTION_QUERY_CURRENT_VALUE 0x04 // get current value // DON'T NEED FOR OVERCLOCK UTILITY
#define WDT_ACTION_QUERY_COUNTDOWN_PERIOD 0x05 // get countdown period
#define WDT_ACTION_SET_COUNTDOWN_PERIOD 0x06 // set countdown period
#define WDT_ACTION_QUERY_RUNNING_STATE 0x08 // query if running
#define WDT_ACTION_SET_RUNNING_STATE 0x09 // start timer
#define WDT_ACTION_QUERY_STOPPED_STATE 0x0A // query if stopped
#define WDT_ACTION_SET_STOPPED_STATE 0x0B // stop timer
#define WDT_ACTION_QUERY_STATUS 0x20 // is current boot cause by wdt timeout?
#define WDT_ACTION_SET_STATUS 0x21 // resets wdt status bit
//
// Watchdog timer instruction values.
//
#define WDT_INSTR_VALUE_MASK 0x03 // Mask for just the value
#define WDT_INSTR_READ_CMP_VALUE 0x00 // Read / compare value
#define WDT_INSTR_READ_COUNTDOWN 0x01 // read countdown value
#define WDT_INSTR_WRITE_VALUE 0x02 // Write value
#define WDT_INSTR_WRITE_COUNTDOWN 0x03 // write countdown value
#define WDT_INSTR_PRESERVE_REG 0x80 // preserve reg; used in Write Value / Write Countdown
#define WDT_INSTR_WRITE_VALUE_PRES (0x02 | WDT_INSTR_PRESERVE_REG) // Write value with preserve
#define WDT_INSTR_WRITE_COUNTDOWN_PRES (0x03 | WDT_INSTR_PRESERVE_REG) // write countdown value with preserve
//
// The Generic Address Structure is defined in the ACPI Specification and should only be
// changed to match updated revisions of that specification. The GAS_ADDRESS_SPACE and
// GAS_ACCESS_SIZE enumerations are also defined by the ACPI Specification.
//
typedef enum {
GAS_SYSTEM_MEMORY,
GAS_SYSTEM_IO,
GAS_PCI_CONFIG_SPACE,
GAS_EMBEDDED_CONTROLLER,
GAS_SMBUS
} GAS_ADDRESS_SPACE;
typedef enum {
GAS_UNDEFINED,
GAS_BYTE_ACCESS,
GAS_WORD_ACCESS,
GAS_DWORD_ACCESS,
GAS_QWORD_ACCESS
} GAS_ACCESS_SIZE;
#pragma pack(1)
typedef struct {
UINT8 AddressSpaceId;
UINT8 RegisterBitWidth;
UINT8 RegisterBitOffset;
UINT8 AccessSize;
UINT64 Address;
} GENERIC_ADDRESS_STRUCTURE;
//
// GAS_SYSTEM_MEMORY - When used as the AddressSpaceId, the 64-bit physical memory address
// of the register. 32-bit platforms must have the high DWORD set to 0.
// GAS_SYSTEM_IO - The 64-bit I/O address of the register. 32-bit platforms must have
// the high DWORD set to 0.
// GAS_PCI_CONFIG_SPACE - PCI Configuration space addresses must be confined to devices on PCI
// Sepment Group 0, Bus 0. This restriction exists to accommodate access
// to fixed hardware prior to PCI bus enumeration. The format of addresses
// are defined as follows:
// Highest WORD: Reserved and must be -0-
// ... PCI Device number on bus 0
// ... PCI Function number
// Lowest WORD: Offset in the configuration space header.
//
typedef struct {
UINT8 WdAction;
UINT8 Flag;
UINT16 Res;
GENERIC_ADDRESS_STRUCTURE GenericAddressStructures;
UINT32 Value;
UINT32 Mask;
} WD_INSTRUCTION;
typedef struct {
UINT32 TimerPeriod;
UINT32 MaxTimerCount;
UINT32 MinTimerCount;
UINT16 InstructionCount;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
IdccData.h
Abstract:
--*/
#ifndef _IDCCDATAHUB_GUID_H_
#define _IDCCDATAHUB_GUID_H_
//
// This GUID is for the IDCC related data found in the Data Hub.
//
#define IDCC_DATA_HUB_GUID \
{ 0x788e1d9f, 0x1eab, 0x47d2, 0xa2, 0xf3, 0x78, 0xca, 0xe8, 0x7d, 0x60, 0x12 }
extern EFI_GUID gIdccDataHubGuid;
#pragma pack(1)
typedef struct {
UINT32 Type;
UINT32 RecordLength;
} EFI_IDCC_DATA_HEADER;
typedef struct {
EFI_IDCC_DATA_HEADER IdccHeader;
UINT32 Tcontrol;
} EFI_IDCC_TCONTROL;
typedef struct {
UINT32 EntryCount;
} EFI_IDCC_CLOCK_COMMON;
typedef struct {
UINT8 Polarity;
UINT8 Percent;
UINT32 FpValue;
} EFI_IDCC_TYPE_2_DATA;
typedef struct {
UINT8 SetupVal;
UINT32 FpValue;
} EFI_IDCC_TYPE_3_4_DATA;
typedef struct {
EFI_IDCC_DATA_HEADER IdccHeader;
UINT32 ProcessorRatio;
} EFI_IDCC_PROCESSOR_RATIO;
typedef struct {
EFI_IDCC_DATA_HEADER IdccHeader;
UINT32 BoardFormFactor;
} EFI_IDCC_BOARD_FORM_FACTOR;
typedef struct {
EFI_IDCC_DATA_HEADER IdccHeader;
UINT32 ProcessorInfo;
} EFI_IDCC_PROCESSOR_INFO;
#define EFI_IDCC_PROCESSOR_UNCON (1 << 0) // Bit 0: UnCon CPU
#define EFI_IDCC_PROCESSOR_UNLOCK (1 << 1) // Bit 1: UnLock CPU
#define EFI_IDCC_PROCESSOR_CNR (1 << 2) // Bit 2: CNR CPU
#define EFI_IDCC_PROCESSOR_KNF (1 << 3) // Bit 3: KNF CPU
typedef struct {
EFI_IDCC_DATA_HEADER IdccHeader;
UINT32 MinFSB;
UINT32 MaxFSB;
UINT8 StepFSB;
} EFI_IDCC_FSB_DATA;
#pragma pack()
#define EFI_IDCC_POSITIVE 0
#define EFI_IDCC_NEGATIVE 1
//
// Board Form Factor equates.
//
#define ATX_FORM_FACTOR 0x00
#define BTX_FORM_FACTOR 0x01
#define EFI_IDCC_TCONTROL_TYPE 1

75
Vlv2TbltDevicePkg/Include/Guid/ItkData.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
ItkData.h
Abstract:
--*/
#ifndef _ITKDATAHUB_GUID_H_
#define _ITKDATAHUB_GUID_H_
//
// This GUID is for the ITK related data found in the Data Hub {E7060843-A336-4d5b-9598-13402F5D7375}
//
#define ITK_DATA_HUB_GUID \
{ 0xe7060843, 0xa336, 0x4d5b, 0x95, 0x98, 0x13, 0x40, 0x2f, 0x5d, 0x73, 0x75 }
extern EFI_GUID gItkDataHubGuid;
//
// This GUID is for the ITK related data found in a Variable {3812723D-7E48-4e29-BC27-F5A39AC94EF1}
//
#define ITK_DATA_VAR_GUID \
{ 0x3812723d, 0x7e48, 0x4e29, 0xbc, 0x27, 0xf5, 0xa3, 0x9a, 0xc9, 0x4e, 0xf1 }
extern EFI_GUID gItkDataVarGuid;
#define ITK_DATA_VAR_NAME L"ItkDataVar"
extern CHAR16 gItkDataVarName[];
#define ITK_BIOS_MOD_VAR_NAME L"ItkBiosModVar"
extern CHAR16 gItkBiosModVarName[];
#pragma pack(1)
typedef struct {
UINT32 Type;
UINT32 RecordLength;
} EFI_ITK_DATA_HEADER;
typedef struct {
EFI_ITK_DATA_HEADER ItkHeader;
UINT32 HecetaAddress;
} EFI_ITK_HECETA_ADDRESS;
typedef struct {
UINT16 VarEqName;
UINT16 VarEqValue;
} EFI_ITK_VAR_EQ_RECORD;
typedef struct {
EFI_ITK_DATA_HEADER ItkHeader;

37
Vlv2TbltDevicePkg/Include/Guid/MemoryConfigData.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
MemoryConfigData.h
Abstract:
GUID used for Memory Configuration Data entries in the HOB list.
--*/
#ifndef _MEMORY_CONFIG_DATA_GUID_H_
#define _MEMORY_CONFIG_DATA_GUID_H_

90
Vlv2TbltDevicePkg/Include/Guid/OsSelection.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
OsSelection.h
Abstract:
GUID used for LPSS, SCC and LPE configuration data entries in the HOB list.
--*/
#ifndef _OS_SELECTION_GUID_H_
#define _OS_SELECTION_GUID_H_
#ifndef ECP_FLAG
#include <PiPei.h>
#include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#endif
#define ANDROID 1
#define EFI_OS_SELECTION_VARIABLE_GUID \
{ \
0x86843f56, 0x675d, 0x40a5, 0x95, 0x30, 0xbc, 0x85, 0x83, 0x72, 0xf1, 0x03 \
}
extern EFI_GUID gOsSelectionVariableGuid;
#pragma pack(1)
typedef struct {
UINT8 LpssPciModeEnabled;
//SCC
UINT8 LpsseMMCEnabled;
UINT8 LpssSdioEnabled;
UINT8 LpssSdcardEnabled;
UINT8 LpssSdCardSDR25Enabled;
UINT8 LpssSdCardDDR50Enabled;
UINT8 LpssMipiHsi;
UINT8 LpsseMMC45Enabled;
UINT8 LpsseMMC45DDR50Enabled;
UINT8 LpsseMMC45HS200Enabled;
UINT8 LpsseMMC45RetuneTimerValue;
UINT8 eMMCBootMode;
//LPSS2
UINT8 LpssDma1Enabled;
UINT8 LpssI2C0Enabled;
UINT8 LpssI2C1Enabled;
UINT8 LpssI2C2Enabled;
UINT8 LpssI2C3Enabled;
UINT8 LpssI2C4Enabled;
UINT8 LpssI2C5Enabled;
UINT8 LpssI2C6Enabled;
//LPSS1
UINT8 LpssDma0Enabled;
UINT8 LpssPwm0Enabled;
UINT8 LpssPwm1Enabled;
UINT8 LpssHsuart0Enabled;
UINT8 LpssHsuart1Enabled;
UINT8 LpssSpiEnabled;
UINT8 I2CTouchAd;
} EFI_PLATFORM_LPSS_DATA;
typedef struct _EFI_OS_SELECTION_HOB {
UINT8 OsSelection;

44
Vlv2TbltDevicePkg/Include/Guid/PciLanInfo.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PciLanInfo.h
Abstract:
--*/
#ifndef _PCI_LAN_INFO_GUID_H_
#define _PCI_LAN_INFO_GUID_H_
#pragma pack(1)
//
// structure used for Pci Lan variable
//
typedef struct {
UINT8 PciBus;
UINT8 PciDevice;
UINT8 PciFunction;
} PCI_LAN_INFO;

185
Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PlatformCpuInfo.h
Abstract:
GUID used for Platform CPU Info Data entries in the HOB list.
--*/
#ifndef _PLATFORM_CPU_INFO_GUID_H_
#define _PLATFORM_CPU_INFO_GUID_H_
#include "CpuType.h"
#include <Library/CpuIA32.h>
#define EFI_PLATFORM_CPU_INFO_GUID \
{\
0xbb9c7ab7, 0xb8d9, 0x4bf3, 0x9c, 0x29, 0x9b, 0xf3, 0x41, 0xe2, 0x17, 0xbc \
}
extern EFI_GUID gEfiPlatformCpuInfoGuid;
extern CHAR16 EfiPlatformCpuInfoVariable[];
//
// Tri-state for feature capabilities and enable/disable.
// [0] clear=feature isn't capable
// [0] set =feature is capable
// [1] clear=feature is disabled
// [1] set =feature is enabled
//
#define CPU_FEATURES_CAPABLE BIT0
#define CPU_FEATURES_ENABLE BIT1
#define MAX_CACHE_DESCRIPTORS 64
#define MAXIMUM_CPU_BRAND_STRING_LENGTH 48
#pragma pack(1)
typedef struct {
UINT32 FullCpuId; // [31:0] & 0x0FFF0FFF
UINT32 FullFamilyModelId; // [31:0] & 0x0FFF0FF0
UINT8 ExtendedFamilyId; // [27:20]
UINT8 ExtendedModelId; // [19:16]
UINT8 ProcessorType; // [13:11]
UINT8 FamilyId; // [11:8]
UINT8 Model; // [7:4]
UINT8 SteppingId; // [3:0]
} EFI_CPU_VERSION_INFO; // CPUID.1.EAX
typedef struct {
UINT32 L1InstructionCacheSize;
UINT32 L1DataCacheSize;
UINT32 L2CacheSize;
UINT32 L3CacheSize;
UINT32 TraceCacheSize;
UINT8 CacheDescriptor[MAX_CACHE_DESCRIPTORS];
} EFI_CPU_CACHE_INFO; // CPUID.2.EAX
typedef struct {
UINT8 PhysicalPackages;
UINT8 LogicalProcessorsPerPhysicalPackage;
UINT8 CoresPerPhysicalPackage;
UINT8 ThreadsPerCore;
} EFI_CPU_PACKAGE_INFO; // CPUID.4.EAX
typedef struct {
UINT32 RegEdx; // CPUID.5.EAX
UINT8 MaxCState;
UINT8 C0SubCStatesMwait; // EDX [3:0]
UINT8 C1SubCStatesMwait; // EDX [7:4]
UINT8 C2SubCStatesMwait; // EDX [11:8]
UINT8 C3SubCStatesMwait; // EDX [15:12]
UINT8 C4SubCStatesMwait; // EDX [19:16]
UINT8 C5SubCStatesMwait; // EDX [23:20]
UINT8 C6SubCStatesMwait; // EDX [27:24]
UINT8 C7SubCStatesMwait; // EDX [31:28]
UINT8 MonitorMwaitSupport; // ECX [0]
UINT8 InterruptsBreakMwait; // ECX [1]
} EFI_CPU_CSTATE_INFO; // CPUID.5.EAX
typedef struct {
UINT8 Turbo; // EAX [1]
UINT8 PECI; // EAX [0]
UINT8 NumIntThresholds; // EBX [3:0]
UINT8 HwCoordinationFeedback; // ECX [0]
} EFI_CPU_POWER_MANAGEMENT; // CPUID.6.EAX
//
// IMPORTANT: Each CPU feature enabling entry is assumed a tri-state variable.
// - Keep the respective feature entry variable as default value (0x00)
// if the CPU is not capable for the feature.
// - Use the specially defined programming convention to update the variable
// to indicate capable, enable or disable.
// ie. F_CAPABLE for feature available
// F_ENABLE for feature enable
// F_DISABLE for feature disable
//
typedef struct {
EFI_CPUID_REGISTER Regs; // CPUID.1.EAX
UINT8 Xapic; // ECX [21]
UINT8 SSE4_2; // ECX [20]
UINT8 SSE4_1; // ECX [19]
UINT8 Dca; // ECX [18]
UINT8 SupSSE3; // ECX [9]
UINT8 Tm2; // ECX [8]
UINT8 Eist; // ECX [7]
UINT8 Lt; // ECX [6]
UINT8 Vt; // ECX [5]
UINT8 Mwait; // ECX [3]
UINT8 SSE3; // ECX [0]
UINT8 Tcc; // EDX [29]
UINT8 Mt; // EDX [28]
UINT8 SSE2; // EDX [26]
UINT8 SSE; // EDX [25]
UINT8 MMX; // EDX [23]
EFI_CPUID_REGISTER ExtRegs; // CPUID.80000001.EAX
UINT8 ExtLahfSahf64; // ECX [0]
UINT8 ExtIntel64; // EDX [29]
UINT8 ExtXd; // EDX [20]
UINT8 ExtSysCallRet64; // EDX [11]
UINT16 Ht; // CPUID.0B.EAX EBX [15:0]
} EFI_CPU_FEATURES; // CPUID.1.EAX, CPUID.0B.EAX, CPUID.80000001.EAX
typedef struct {
UINT8 PhysicalBits;
UINT8 VirtualBits;
} EFI_CPU_ADDRESS_BITS; // CPUID.80000008.EAX
typedef struct {
UINT8 PlatformID; // MSR 0x17 [52:50]
UINT32 MicrocodeRevision; // MSR 0x8B [63:32]
UINT8 MaxEfficiencyRatio; // MSR 0xCE [47:40]
UINT8 DdrRatioUnlockCap; // MSR 0xCE [30]
UINT8 TdcTdpLimitsTurbo; // MSR 0xCE [29]
UINT8 RatioLimitsTurbo; // MSR 0xCE [28]
UINT8 PreProduction; // MSR 0xCE [27]
UINT8 DcuModeSelect; // MSR 0xCE [26]
UINT8 MaxNonTurboRatio; // MSR 0xCE [15:8]
UINT8 Emrr; // MSR 0xFE [12]
UINT8 Smrr; // MSR 0xFE [11]
UINT8 VariableMtrrCount; // MSR 0xFE [7:0]
UINT16 PState; // MSR 0x198 [15:0]
UINT8 TccActivationTemperature; // MSR 0x1A2 [23:16]
UINT8 TemperatureControlOffset; // MSR 0x1A2 [15:8]
UINT32 PCIeBar; // MSR 0x300 [39:20]
UINT8 PCIeBarSizeMB; // MSR 0x300 [3:1]
} EFI_MSR_FEATURES;
typedef struct {
BOOLEAN IsIntelProcessor;
UINT8 BrandString[MAXIMUM_CPU_BRAND_STRING_LENGTH + 1];
UINT32 CpuidMaxInputValue;
UINT32 CpuidMaxExtInputValue;
EFI_CPU_UARCH CpuUarch;
EFI_CPU_FAMILY CpuFamily;
EFI_CPU_PLATFORM CpuPlatform;
EFI_CPU_TYPE CpuType;
EFI_CPU_VERSION_INFO CpuVersion;
EFI_CPU_CACHE_INFO CpuCache;
EFI_CPU_FEATURES CpuFeatures;
EFI_CPU_CSTATE_INFO CpuCState;

437
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PlatformInfo.h
Abstract:
GUID used for Platform Info Data entries in the HOB list.
--*/
#ifndef _PLATFORM_INFO_GUID_H_
#define _PLATFORM_INFO_GUID_H_
#ifndef ECP_FLAG
#include <PiPei.h>
#include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/SmbusLib.h>
#include <IndustryStandard/SmBus.h>
#endif
#define PLATFORM_INFO_REVISION = 1 // Revision id for current platform information struct.
//
// Start::BayLake Board Defines
//
#define BOARD_REVISION_DEFAULT = 0xff
#define UNKNOWN_FABID 0x0F
#define FAB_ID_MASK 0x0F
#define BOARD_ID_2 0x01
#define BOARD_ID_1 0x40
#define BOARD_ID_0 0x04
#define BOARD_ID_DT_CRB 0x0
#define BOARD_ID_DT_VLVR 0x1
#define BOARD_ID_SVP_VLV 0xC
#define BOARD_ID_SVP_EV_VLV 0xD
//
// End::BayLake Board Defines
//
//
// Start::Alpine Valley Board Defines
//
#define DC_ID_DDR3L 0x00
#define DC_ID_DDR3 0x04
#define DC_ID_LPDDR3 0x02
#define DC_ID_LPDDR2 0x06
#define DC_ID_DDR4 0x01
#define DC_ID_DDR3L_ECC 0x05
#define DC_ID_NO_MEM 0x07
//
// End::Alpine Valley Board Defines
//
#define MAX_FAB_ID_RETRY_COUNT 100
#define MAX_FAB_ID_CHECK_COUNT 3
#define PLATFORM_INFO_HOB_REVISION 0x1
#define EFI_PLATFORM_INFO_GUID \
{ \
0x1e2acc41, 0xe26a, 0x483d, 0xaf, 0xc7, 0xa0, 0x56, 0xc3, 0x4e, 0x8, 0x7b \
}
extern EFI_GUID gEfiPlatformInfoGuid;
typedef enum {
FlavorUnknown = 0,
//
// Mobile
//
FlavorMobile = 1,
//
// Desktop
//
FlavorDesktop = 2,
//
// Tablet
//
FlavorTablet = 3
} PLATFORM_FLAVOR;
#pragma pack(1)
typedef struct {
UINT16 PciResourceIoBase;
UINT16 PciResourceIoLimit;
UINT32 PciResourceMem32Base;
UINT32 PciResourceMem32Limit;
UINT64 PciResourceMem64Base;
UINT64 PciResourceMem64Limit;
UINT64 PciExpressBase;
UINT32 PciExpressSize;
UINT8 PciHostAddressWidth;
UINT8 PciResourceMinSecBus;
} EFI_PLATFORM_PCI_DATA;
typedef struct {
UINT8 CpuAddressWidth;
UINT32 CpuFamilyStepping;
} EFI_PLATFORM_CPU_DATA;
typedef struct {
UINT8 SysIoApicEnable;
UINT8 SysSioExist;
} EFI_PLATFORM_SYS_DATA;
typedef struct {
UINT32 MemTolm;
UINT32 MemMaxTolm;
UINT32 MemTsegSize;
UINT32 MemTsegBase;
UINT32 MemIedSize;
UINT32 MemIgdSize;
UINT32 MemIgdBase;
UINT32 MemIgdGttSize;
UINT32 MemIgdGttBase;
UINT64 MemMir0;
UINT64 MemMir1;
UINT32 MemConfigSize;
UINT16 MmioSize;
UINT8 DdrFreq;
UINT8 DdrType;
UINT32 MemSize;
BOOLEAN EccSupport;
UINT8 Reserved[3];
UINT16 DimmSize[2];
} EFI_PLATFORM_MEM_DATA;
typedef struct {
UINT32 IgdOpRegionAddress; // IGD OpRegion Starting Address
UINT8 IgdBootType; // IGD Boot Display Device
UINT8 IgdPanelType; // IGD Panel Type CMOs option
UINT8 IgdTvFormat; // IGD TV Format CMOS option
UINT8 IgdTvMinor; // IGD TV Minor Format CMOS option
UINT8 IgdPanelScaling; // IGD Panel Scaling
UINT8 IgdBlcConfig; // IGD BLC Configuration
UINT8 IgdBiaConfig; // IGD BIA Configuration
UINT8 IgdSscConfig; // IGD SSC Configuration
UINT8 IgdDvmtMemSize; // IGD DVMT Memory Size
UINT8 IgdFunc1Enable; // IGD Function 1 Enable
UINT8 IgdHpllVco; // HPLL VCO
UINT8 IgdSciSmiMode; // GMCH SMI/SCI mode (0=SCI)
UINT8 IgdPAVP; // IGD PAVP data
} EFI_PLATFORM_IGD_DATA;
typedef enum {
BOARD_ID_AV_SVP = 0x0, // Alpine Valley Board
BOARD_ID_BL_RVP = 0x2, // BayLake Board (RVP)
BOARD_ID_BL_FFRD8 = 0x3, // FFRD8 b'0011
BOARD_ID_BL_FFRD = 0x4, // BayLake Board (FFRD)
BOARD_ID_BL_RVP_DDR3L = 0x5, // BayLake Board (RVP DDR3L)
BOARD_ID_BL_STHI = 0x7, // PPV- STHI Board
BOARD_ID_BB_RVP = 0x20, // Bayley Bay Board
BOARD_ID_BS_RVP = 0x30, // Bakersport Board
BOARD_ID_CVH = 0x90, // Crestview Hills
BOARD_ID_MINNOW2 = 0xA0 // Minnow2
} BOARD_ID_LIST;
typedef enum {
FAB1 = 0,
FAB2 = 1,
FAB3 = 2
} FAB_ID_LIST;
typedef enum {
PR0 = 0, // FFRD PR0
PR05 = 1, // FFRD PR0.3 and PR 0.5
PR1 = 2, // FFRD PR1
PR11 = 3 // FFRD PR1.1
} FFRD_ID_LIST;
//
// VLV2 GPIO GROUP OFFSET
//
#define GPIO_SCORE_OFFSET 0x0000
#define GPIO_NCORE_OFFSET 0x1000
#define GPIO_SSUS_OFFSET 0x2000
//
// GPIO Initialization Data Structure for BayLake.
// SC = SCORE, SS= SSUS
// Note: NC doesn't support GPIO functionality in IO access mode, only support in MMIO access mode.
//
//
// IO space
//
typedef struct{
UINT32 Use_Sel_SC0;
UINT32 Use_Sel_SC1;
UINT32 Use_Sel_SC2;
UINT32 Use_Sel_SS;
UINT32 Io_Sel_SC0;
UINT32 Io_Sel_SC1;
UINT32 Io_Sel_SC2;
UINT32 Io_Sel_SS;
UINT32 GP_Lvl_SC0;
UINT32 GP_Lvl_SC1;
UINT32 GP_Lvl_SC2;
UINT32 GP_Lvl_SS;
UINT32 TPE_SC0;
UINT32 TPE_SS;
UINT32 TNE_SC0;
UINT32 TNE_SS;
UINT32 TS_SC0;
UINT32 TS_SS;
UINT32 WE_SS;
} CFIO_INIT_STRUCT;
//
// CFIO PAD configuration Registers
//
//
// Memory space
//
typedef union {
UINT32 dw;
struct {
UINT32 Func_Pin_Mux:3; // 0:2 Function of CFIO selection
UINT32 ipslew:2; // 3:4 Pad (P) Slew Rate Controls PAD slew rate check Width
UINT32 inslew:2; // 5:6 Pad (N) Slew Rate Controls PAD slew rate
UINT32 Pull_assign:2; // 7:8 Pull assignment
UINT32 Pull_strength:2; // 9:10 Pull strength
UINT32 Bypass_flop:1; // 11 Bypass flop
UINT32 Filter_en:1; // 12 Filter Enable
UINT32 Hist_ctrl:2; // 13:14 hysteresis control
UINT32 Hist_enb:1; // 15 Hysteresis enable, active low
UINT32 Delay_line:6; // 16:21 Delay line values - Delay values for input or output
UINT32 Reserved:3; // 22:24 Reserved
UINT32 TPE:1; // 25 Trigger Positive Edge Enable
UINT32 TNE:1; // 26 Trigger Negative Edge Enable
UINT32 Reserved2:3; // 27:29 Reserved
UINT32 i1p5sel:1; // 30
UINT32 IODEN:1; // 31 : Open Drain enable. Active high
} r;
} PAD_CONF0;
typedef union{
UINT32 dw;
struct {
UINT32 instr:16; // 0:15 Pad (N) strength.
UINT32 ipstr:16; // 16:31 Pad (P) strength.
}r;
} PAD_CONF1;
typedef union{
UINT32 dw;
struct {
UINT32 pad_val:1; // 0 These registers are implemented as dual read/write with dedicated storage each.
UINT32 ioutenb:1; // 1 output enable
UINT32 iinenb:1; // 2 input enable
UINT32 Reserved:29; // 3:31 Reserved
}r;
} PAD_VAL;
typedef union{
UINT32 GPI;
struct {
UINT32 ihbpen:1; // 0 Pad high by pass enable
UINT32 ihbpinen:1; // 1 Pad high by pass input
UINT32 instaticen:1; // 2 TBD
UINT32 ipstaticen:1; // 3 TBD
UINT32 Overide_strap_pin :1; // 4 DFX indicates if it wants to override the strap pin value on this pad, if exists.
UINT32 Overide_strap_pin_val:1; // 5 In case DFX need to override strap pin value and it exist for the specific pad, this value will be used.
UINT32 TestMode_Pin_Mux:3; // 6:9 DFX Pin Muxing
}r;
} PAD_DFT;
//
// GPIO_USAGE value need to matche the PAD_VAL input/output enable bits.
//
typedef enum {
Native = 0xFF, // Native, no need to set PAD_VALUE
GPI = 2, // GPI, input only in PAD_VALUE
GPO = 4, // GPO, output only in PAD_VALUE
GPIO = 0, // GPIO, input & output
TRISTS = 6, // Tri-State
GPIO_NONE
} GPIO_USAGE;
typedef enum {
LO = 0,
HI = 1,
NA = 0xFF
} GPO_D4;
typedef enum {
F0 = 0,
F1 = 1,
F2 = 2,
F3 = 3,
F4 = 4,
F5 = 5,
F6 = 6,
F7 = 7
} GPIO_FUNC_NUM;
//
// Mapping to CONF0 bit 27:24
// Note: Assume "Direct Irq En" is not set, unless specially notified.
//
typedef enum {
TRIG_ = 0,
TRIG_Edge_High = /*BIT3 |*/ BIT1, // Positive Edge (Rasing)
TRIG_Edge_Low = /*BIT3 |*/ BIT2, // Negative Edge (Falling)
TRIG_Edge_Both = /*BIT3 |*/ BIT2 | BIT1, // Both Edge
TRIG_Level_High= /*BIT3 |*/ BIT1 | BIT0, // Level High
TRIG_Level_Low = /*BIT3 |*/ BIT2 | BIT0, // Level Low
} INT_TYPE;
typedef enum {
P_20K_H, // Pull Up 20K
P_20K_L, // Pull Down 20K
P_10K_H, // Pull Up 10K
P_10K_L, // Pull Down 10K
P_2K_H, // Pull Up 2K
P_2K_L, // Pull Down 2K
P_NONE // Pull None
} PULL_TYPE;
#ifdef EFI_DEBUG
#define GPIO_INIT_ITEM(pad_name, usage, gpod4, func, int_cap, int_type, pull, offset) {pad_name, usage, gpod4, func, /*int_cap,*/ TRIG_##int_type, P_##pull, offset}
#else
#define GPIO_INIT_ITEM(pad_name, usage, gpod4, func, int_cap, int_type, pull, offset) { usage, gpod4, func, /*int_cap,*/ TRIG_##int_type, P_##pull, offset}
#endif
//
// GPIO CONF & PAD Initialization Data Structure for BayLake GPIOs bits.
// NC = NCORE, SC = SCORE, SS= SSUS
//
typedef struct {
#ifdef EFI_DEBUG
char pad_name[32];// GPIO Pin Name for debug purpose
#endif
GPIO_USAGE usage; // GPIO pin used as Native mode or GPI/GPO/GPIO mode
GPO_D4 gpod4; // GPO default value
GPIO_FUNC_NUM func; // Function Number (F0~F7)
INT_TYPE int_type; // Edge or Level trigger, low or high active
PULL_TYPE pull; // Pull Up or Down
UINT8 offset; // Equal with (PCONF0 register offset >> 4 bits)
} GPIO_CONF_PAD_INIT;
//
//typedef UINT64 BOARD_FEATURES
//
typedef struct _EFI_PLATFORM_INFO_HOB {
UINT16 PlatformType; // Platform Type
UINT8 BoardId; // Board ID
UINT8 BoardRev; // Board Revision
PLATFORM_FLAVOR PlatformFlavor; // Platform Flavor
UINT8 DDRDaughterCardCh0Id;// DDR daughter card channel 0 id
UINT8 DDRDaughterCardCh1Id;// DDR daughter card channel 1 id
UINT8 ECOId; // ECO applied on platform
UINT16 IohSku;
UINT8 IohRevision;
UINT16 IchSku;
UINT8 IchRevision;
EFI_PLATFORM_PCI_DATA PciData;
EFI_PLATFORM_CPU_DATA CpuData;
EFI_PLATFORM_MEM_DATA MemData;
EFI_PLATFORM_SYS_DATA SysData;
EFI_PLATFORM_IGD_DATA IgdData;
UINT8 RevisonId; // Structure Revision ID
EFI_PHYSICAL_ADDRESS PlatformCfioData;
EFI_PHYSICAL_ADDRESS PlatformGpioData_NC;
EFI_PHYSICAL_ADDRESS PlatformGpioData_SC;
EFI_PHYSICAL_ADDRESS PlatformGpioData_SUS;
EFI_PHYSICAL_ADDRESS PlatformGpioData_NC_TRI;
EFI_PHYSICAL_ADDRESS PlatformGpioData_SC_TRI;
EFI_PHYSICAL_ADDRESS PlatformGpioData_SUS_TRI;
EFI_PHYSICAL_ADDRESS PlatformGpioData_SUS_PR1;
EFI_PHYSICAL_ADDRESS PlatformGpioData_SC_PR1_1;
EFI_PHYSICAL_ADDRESS PlatformGpioData_SUS_PR1_1;
UINT8 CfioEnabled;
UINT32 SsidSvid;
UINT16 AudioSubsystemDeviceId;
UINT64 AcpiOemId;
UINT64 AcpiOemTableId;
UINT16 MemCfgID;
} EFI_PLATFORM_INFO_HOB;
#pragma pack()
EFI_STATUS
GetPlatformInfoHob (
IN CONST EFI_PEI_SERVICES **PeiServices,
OUT EFI_PLATFORM_INFO_HOB **PlatformInfoHob
);
EFI_STATUS
InstallPlatformClocksNotify (

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
SensorInfoVariable.h
Abstract:
GUID used for Sensor Info variable.
--*/
//
// Module: SensorInfoVariable.h
//
// Description: Provides structure and literal definitions for the
// Sensor Information Variable. The BIOS will provide
// this variable to runtime applications via the EFI
// GetVariable function.
//
// Notes: 1. When defining and initializing the variable within the
// BIOS, the module will define the structure using the
// typedef macros in a block. For an ATX board using a
// single Heceta 6P, which has 4 temperature sensors, 6
// voltage sensors, 4 fan speed sensors and 3 fan speed
// controllers, this block would be declared as follows:
//
// TYPEDEF_TEMP_SENSOR_SECTION(4);
// TYPEDEF_VOLT_SENSOR_SECTION(6);
// TYPEDEF_FAN_SENSOR_SECTION(4);
// TYPEDEF_FAN_CONTROLLER_SENSOR(3);
// TYPEDEF_SENSOR_INFO_VAR;
//
// 2. When crafting code to access the variable, the module
// will also need to invoke the typedef macros in a
// block but, since it cannot declare a structure for the
// overall variable (because array lengths will vary), it
// cannot use TYPEDEF_SENSOR_INFO_VAR. The block will
// typically be used as follows:
//
// TYPEDEF_TEMP_SENSOR_SECTION(1);
// TYPEDEF_VOLT_SENSOR_SECTION(1);
// TYPEDEF_FAN_SENSOR_SECTION(1);
// TYPEDEF_FAN_CONTROLLER_SENSOR(1);
//
// The structure buffer should instead be declared as a
// BYTE array. Pointers to the various sections can then
// be built using the XXXX_SECTION_LEN macros...
//
#ifndef _SENSOR_INFO_VAR_GUID_H_
#define _SENSOR_INFO_VAR_GUID_H_
#define SENSOR_INFO_VAR_GUID \
{ \
0xE59E7B4D, 0x06DC, 0x44AB, 0xB3, 0x6D, 0x5E, 0xD7, 0x78, 0x9C, 0x53, 0x0A \
}
extern EFI_GUID gEfiSensorInfoVarGuid;
extern CHAR16 gEfiSensorInfoVarName[];
extern CHAR16 gEfiSensorInfoVarNameWithPassword[];
#define SENSOR_INFO_VAR_NAME L"SensorInfoVar"
#define SENSOR_INFO_VAR_NAME_WITH_PASSWORD SENSOR_INFO_VAR_NAME L"S4k?A^7!"
//
// Sensor/Controller usage definitions
//
#define UNKNOWN_OTHER 0
//
// Temperature Sensors
//
#define CPU_CORE_TEMPERATURE 1
#define CPU_DIE_TEMPERATURE 2
#define ICH_TEMPERATURE 3
#define MCH_TEMPERATURE 4
#define VR_TEMPERATURE 5
#define MEMORY_TEMPERATURE 6
#define MOTHERBOARD_AMBIENT_TEMPERATURE 7
#define SYSTEM_AMBIENT_AIR_TEMPERATURE 8
#define CPU_INLET_AIR_TEMPERATURE 9
#define SYSTEM_INLET_AIR_TEMPERATURE 10
#define SYSTEM_OUTLET_AIR_TEMPERATURE 11
#define PSU_HOTSPOT_TEMPERATURE 12
#define PSU_INLET_AIR_TEMPERATURE 13
#define PSU_OUTLET_AIR_TEMPERATURE 14
#define DRIVE_TEMPERATURE 15
#define GPU_TEMPERATURE 16
#define IOH_TEMPERATURE 17
#define LAST_TEMPERATURE 17
//
// Voltage Sensors
//
#define PLUS_12_VOLTS 1
#define NEG_12_VOLTS 2
#define PLUS_5_VOLTS 3
#define PLUS_5_VOLT_BACKUP 4
#define NEG_5_VOLTS 5
#define PLUS_3P3_VOLTS 6
#define PLUS_2P5_VOLTS 7
#define PLUS_1P5_VOLTS 8
#define CPU_1_VCCP_VOLTAGE 9
#define CPU_2_VCCP_VOLTAGE 10
#define CPU_3_VCCP_VOLTAGE 11
#define CPU_4_VCCP_VOLTAGE 12
#define PSU_INPUT_VOLTAGE 13
#define MCH_VCC_VOLTAGE 14
#define PLUS_3P3_VOLT_STANDBY 15
#define CPU_VTT_VOLTAGE 16
#define PLUS_1P8_VOLTS 17
#define LAST_VOLTAGE 17
//
// Fan Speed Sensors and Controllers.
//
#define CPU_COOLING_FAN 1
#define SYSTEM_COOLING_FAN 2
#define MCH_COOLING_FAN 3
#define VR_COOLING_FAN 4
#define CHASSIS_COOLING_FAN 5
#define CHASSIS_INLET_FAN 6
#define CHASSIS_OUTLET_FAN 7
#define PSU_COOLING_FAN 8
#define PSU_INLET_FAN 9
#define PSU_OUTLET_FAN 10
#define DRIVE_COOLING_FAN 11
#define GPU_COOLING_FAN 12
#define AUX_COOLING_FAN 13
#define IOH_COOLING_FAN 14
#define LAST_FAN 14
//
// Fan Type Definitions
//
#define FAN_TYPE_UNKNOWN 0
#define FAN_3WIRE_PULSE 1
#define FAN_3WIRE_VOLTAGE 2
#define FAN_4WIRE 3
#pragma pack(1)
//
// TEMP_SENSOR_INFO - Structure providing info for a temperature sensor.
//
typedef struct _TEMP_SENSOR_INFO
{
UINT8 byDevice; // Device index
UINT8 byIndex; // Physical sensor index
UINT8 byUsage; // Usage indicator
UINT8 bRelative; // Relative vs. Absolute readings
} TEMP_SENSOR_INFO, *P_TEMP_SENSOR_INFO;
//
// TYPEDEF_TEMP_SENSOR_SECTION - Macro that can be used to typedef the
// TEMP_SENSOR_SECTION structure, which provides information about all
// temperature sensors.
//
#define TYPEDEF_TEMP_SENSOR_SECTION(count) \
typedef struct _TEMP_SENSOR_SECTION \
{ \
UINT8 byCount; \
TEMP_SENSOR_INFO stSensor[count]; \
\
} TEMP_SENSOR_SECTION, *P_TEMP_SENSOR_SECTION
//
// VOLT_SENSOR_INFO - Structure providing info for a voltage sensor.
//
typedef struct _VOLT_SENSOR_INFO
{
UINT8 byDevice; // Device index
UINT8 byIndex; // Physical sensor index
UINT8 byUsage; // Usage indicator
} VOLT_SENSOR_INFO, *P_VOLT_SENSOR_INFO;
//
// TYPEDEF_VOLT_SENSOR_SECTION - Macro that can be used to typedef the
// VOLT_SENSOR_SECTION structure, which provides information about all
// voltage sensors.
//
#define TYPEDEF_VOLT_SENSOR_SECTION(count) \
typedef struct _VOLT_SENSOR_SECTION \
{ \
UINT8 byCount; \
VOLT_SENSOR_INFO stSensor[count]; \
\
} VOLT_SENSOR_SECTION, *P_VOLT_SENSOR_SECTION
//
// FAN_SENSOR_INFO - Structure providing info for a fan speed sensor.
//
typedef struct _FAN_SENSOR_INFO
{
UINT8 byDevice; // Device index
UINT8 byIndex; // Physical sensor index
UINT8 byUsage; // Usage indicator
UINT8 byType; // Fan type
UINT8 byController; // Associated Fan Controller
} FAN_SENSOR_INFO, *P_FAN_SENSOR_INFO;
//
// TYPEDEF_FAN_SENSOR_SECTION - Macro that can be used to typedef the
// FAN_SENSOR_SECTION structure, which provides information about all fan
// speed sensors.
//
#define TYPEDEF_FAN_SENSOR_SECTION(count) \
typedef struct _FAN_SENSOR_SECTION \
{ \
UINT8 byCount; \
FAN_SENSOR_INFO stSensor[count]; \
\
} FAN_SENSOR_SECTION, *P_FAN_SENSOR_SECTION
//
// FAN_CONTROLLER_INFO - Structure providing info for a fan speed controller.
//
#define MAX_ASSOC_FANS 4
#define ASSOC_UNUSED 0xFF
typedef struct _FAN_CONTROLLER_INFO
{
UINT8 byDevice; // Device index
UINT8 byIndex; // Physical Controller Index
UINT8 byUsage; // Usage Indicator
UINT8 byFan[MAX_ASSOC_FANS]; // Associated Fan Sensors
} FAN_CONTROLLER_INFO, *P_FAN_CONTROLLER_INFO;
//
// TYPEDEF_FAN_CONTROLLER_SECTION - Macro that can be used to typedef the
// FAN_CONTROLLER_SECTION structure, which provides information about all
// fan speed controllers.
//
#define TYPEDEF_FAN_CONTROLLER_SECTION(count) \
typedef struct _FAN_CONTROLLER_SECTION \
{ \
UINT8 byCount; \
FAN_CONTROLLER_INFO stController[count]; \
\
} FAN_CONTROLLER_SECTION, *P_FAN_CONTROLLER_SECTION
//
// TYPEDEF_SENSOR_INFO_VAR - Macro that can be used to typedef the
// SENSOR_INFO_VAR structure, which provides information about all sensors
// and fan speed controllers. The other TYPEDEF macros must be invoked
// before using this one...
//
#define TYPEDEF_SENSOR_INFO_VAR \
typedef struct _SENSOR_INFO_VAR \
{ \
TEMP_SENSOR_SECTION stTemps; \

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Vlv2TbltDevicePkg/Include/Hpet.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Mseg.h
Abstract:
This file describes the contents of the ACPI HEPT Table.
--*/
#ifndef _HPET_H
#define _HPET_H
//
// Statements that include other files
//
#include <IndustryStandard/Acpi10.h>
#include <IndustryStandard/Acpi20.h>
#include <IndustryStandard/Acpi30.h>
#include <IndustryStandard/HighPrecisionEventTimerTable.h>
//

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Vlv2TbltDevicePkg/Include/Library/BiosIdLib.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
BiosIdLib.h
Abstract:
BIOS ID library definitions.
This library provides functions to get BIOS ID, VERSION, DATE and TIME
--*/
#ifndef _BIOS_ID_LIB_H_
#define _BIOS_ID_LIB_H_
//
// BIOS ID string format:
//
// $(BOARD_ID)$(BOARD_REV).$(OEM_ID).$(VERSION_MAJOR).$(BUILD_TYPE)$(VERSION_MINOR).YYMMDDHHMM
//
// Example: "TRFTCRB1.86C.0008.D03.0506081529"
//
#pragma pack(1)
typedef struct {
CHAR16 BoardId[7]; // "TRFTCRB"
CHAR16 BoardRev; // "1"
CHAR16 Dot1; // "."
CHAR16 OemId[3]; // "86C"
CHAR16 Dot2; // "."
CHAR16 VersionMajor[4]; // "0008"
CHAR16 Dot3; // "."
CHAR16 BuildType; // "D"
CHAR16 VersionMinor[2]; // "03"
CHAR16 Dot4; // "."
CHAR16 TimeStamp[10]; // "YYMMDDHHMM"
CHAR16 NullTerminator; // 0x0000
} BIOS_ID_STRING;
#define MEM_IFWIVER_START 0x7E0000
#define MEM_IFWIVER_LENGTH 0x1000
typedef struct _MANIFEST_OEM_DATA{
UINT32 Signature;
unsigned char FillNull[0x39];
UINT32 IFWIVersionLen;
unsigned char IFWIVersion[32];
}MANIFEST_OEM_DATA;
//
// A signature precedes the BIOS ID string in the FV to enable search by external tools.
//
typedef struct {
UINT8 Signature[8]; // "$IBIOSI$"
BIOS_ID_STRING BiosIdString; // "TRFTCRB1.86C.0008.D03.0506081529"
} BIOS_ID_IMAGE;
#pragma pack()
/**
This function returns BIOS ID by searching HOB or FV.
@param[in] BiosIdImage The BIOS ID got from HOB or FV
@retval EFI_SUCCESS All parameters were valid and BIOS ID has been got.
@retval EFI_NOT_FOUND BiosId image is not found, and no parameter will be modified.
@retval EFI_INVALID_PARAMETER The parameter is NULL.
**/
EFI_STATUS
GetBiosId (
OUT BIOS_ID_IMAGE *BiosIdImage
);
/**
This function returns the Version & Release Date and Time by getting and converting
BIOS ID.
@param[in] BiosVersion The Bios Version out of the conversion.
@param[in] BiosReleaseDate The Bios Release Date out of the conversion.
@param[in] BiosReleaseTime The Bios Release Time out of the conversion.
@retval EFI_SUCCESS BIOS Version & Release Date and Time have been got successfully.
@retval EFI_NOT_FOUND BiosId image is not found, and no parameter will be modified.
@retval EFI_INVALID_PARAMETER All the parameters are NULL.

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CpuIA32.h
Abstract:
--*/
#ifndef _CPU_IA32_H
#define _CPU_IA32_H
typedef struct {
UINT32 RegEax;
UINT32 RegEbx;
UINT32 RegEcx;
UINT32 RegEdx;
} EFI_CPUID_REGISTER;
typedef struct {
UINT32 HeaderVersion;
UINT32 UpdateRevision;
UINT32 Date;
UINT32 ProcessorId;
UINT32 Checksum;
UINT32 LoaderRevision;
UINT32 ProcessorFlags;
UINT32 DataSize;
UINT32 TotalSize;
UINT8 Reserved[12];
} EFI_CPU_MICROCODE_HEADER;
typedef struct {
UINT32 ExtendedSignatureCount;
UINT32 ExtendedTableChecksum;
UINT8 Reserved[12];
} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
typedef struct {
UINT32 ProcessorSignature;
UINT32 ProcessorFlag;
UINT32 ProcessorChecksum;
} EFI_CPU_MICROCODE_EXTENDED_TABLE;
typedef struct {
UINT32 Stepping : 4;
UINT32 Model : 4;
UINT32 Family : 4;
UINT32 Type : 2;
UINT32 Reserved1 : 2;
UINT32 ExtendedModel : 4;
UINT32 ExtendedFamily : 8;
UINT32 Reserved2 : 4;
} EFI_CPU_VERSION;
#define EFI_CPUID_SIGNATURE 0x0
#define EFI_CPUID_VERSION_INFO 0x1
#define EFI_CPUID_CACHE_INFO 0x2
#define EFI_CPUID_SERIAL_NUMBER 0x3
#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000
#define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001
#define EFI_CPUID_BRAND_STRING1 0x80000002
#define EFI_CPUID_BRAND_STRING2 0x80000003
#define EFI_CPUID_BRAND_STRING3 0x80000004
#define EFI_MSR_IA32_PLATFORM_ID 0x17
#define EFI_MSR_IA32_APIC_BASE 0x1B
#define EFI_MSR_EBC_HARD_POWERON 0x2A
#define EFI_MSR_EBC_SOFT_POWERON 0x2B
#define BINIT_DRIVER_DISABLE 0x40
#define INTERNAL_MCERR_DISABLE 0x20
#define INITIATOR_MCERR_DISABLE 0x10
#define EFI_MSR_EBC_FREQUENCY_ID 0x2C
#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79
#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B
#define EFI_MSR_PSB_CLOCK_STATUS 0xCD
#define EFI_APIC_GLOBAL_ENABLE 0x800
#define EFI_MSR_IA32_MISC_ENABLE 0x1A0
#define LIMIT_CPUID_MAXVAL_ENABLE_BIT 0x00400000
#define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT 0x00000008
#define COMPATIBLE_FPU_OPCODE_ENABLE_BIT 0x00000004
#define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002
#define FAST_STRING_ENABLE_BIT 0x00000001
#define EFI_CACHE_VARIABLE_MTRR_BASE 0x200
#define EFI_CACHE_VARIABLE_MTRR_END 0x20F
#define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF
#define EFI_CACHE_MTRR_VALID 0x800
#define EFI_CACHE_FIXED_MTRR_VALID 0x400
#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000
#define EFI_MSR_VALID_MASK 0xFFFFFFFFF
#define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000
#define EFI_MSR_VALID_EXTENDED_MASK 0xFFFFFFFFFFFFF
#define EFI_IA32_MTRR_FIX64K_00000 0x250
#define EFI_IA32_MTRR_FIX16K_80000 0x258
#define EFI_IA32_MTRR_FIX16K_A0000 0x259
#define EFI_IA32_MTRR_FIX4K_C0000 0x268
#define EFI_IA32_MTRR_FIX4K_C8000 0x269
#define EFI_IA32_MTRR_FIX4K_D0000 0x26A
#define EFI_IA32_MTRR_FIX4K_D8000 0x26B
#define EFI_IA32_MTRR_FIX4K_E0000 0x26C
#define EFI_IA32_MTRR_FIX4K_E8000 0x26D
#define EFI_IA32_MTRR_FIX4K_F0000 0x26E
#define EFI_IA32_MTRR_FIX4K_F8000 0x26F
#define EFI_IA32_MCG_CAP 0x179
#define EFI_IA32_MCG_CTL 0x17B
#define EFI_IA32_MC0_CTL 0x400
#define EFI_IA32_MC0_STATUS 0x401
#define EFI_IA32_PERF_STATUS 0x198
#define EFI_IA32_PERF_CTL 0x199
#define EFI_CACHE_UNCACHEABLE 0
#define EFI_CACHE_WRITECOMBINING 1
#define EFI_CACHE_WRITETHROUGH 4
#define EFI_CACHE_WRITEPROTECTED 5
#define EFI_CACHE_WRITEBACK 6
//
// Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number
//
#define EfiMakeCpuVersion(f, m, s) \
(((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))
/**
Halt the Cpu
@param[in] None
@retval None
**/
VOID
EFIAPI
EfiHalt (
VOID
);
/**
Write back and invalidate the Cpu cache
@param[in] None
@retval None
**/
VOID
EFIAPI
EfiWbinvd (
VOID
);
/**
Invalidate the Cpu cache
@param[in] None
@retval None
**/
VOID
EFIAPI
EfiInvd (
VOID
);
/**
Get the Cpu info by excute the CPUID instruction
@param[in] RegisterInEax The input value to put into register EAX
@param[in] Regs The Output value
@retval None
**/
VOID
EFIAPI
EfiCpuid (
IN UINT32 RegisterInEax,
OUT EFI_CPUID_REGISTER *Regs
);
/**
When RegisterInEax != 4, the functionality is the same as EfiCpuid.
When RegisterInEax == 4, the function return the deterministic cache
parameters by excuting the CPUID instruction.
@param[in] RegisterInEax The input value to put into register EAX.
@param[in] CacheLevel The deterministic cache level.
@param[in] Regs The Output value.
@retval None
**/
VOID
EFIAPI
EfiCpuidExt (
IN UINT32 RegisterInEax,
IN UINT32 CacheLevel,
OUT EFI_CPUID_REGISTER *Regs
);
/**
Read Cpu MSR
@param[in] Index The index value to select the register
@retval Return the read data
**/
UINT64
EFIAPI
EfiReadMsr (
IN UINT32 Index
);
/**
Write Cpu MSR
@param[in] Index The index value to select the register
@param[in] Value The value to write to the selected register
@retval None
**/
VOID
EFIAPI
EfiWriteMsr (
IN UINT32 Index,
IN UINT64 Value
);
/**
Read Time stamp
@param[in] None
@retval Return the read data
**/
UINT64
EFIAPI
EfiReadTsc (
VOID
);
/**
Writing back and invalidate the cache,then diable it
@param[in] None
@retval None
**/
VOID
EFIAPI
EfiDisableCache (
VOID
);
/**
Invalidate the cache,then Enable it
@param[in] None
@retval None
**/
VOID
EFIAPI
EfiEnableCache (
VOID
);
/**
Get Eflags
@param[in] None
@retval Return the Eflags value
**/
UINT32
EFIAPI
EfiGetEflags (
VOID
);
/**
Disable Interrupts
@param[in] None
@retval None
**/
VOID
EFIAPI
EfiDisableInterrupts (
VOID
);
/**
Enable Interrupts
@param[in] None
@retval None
**/
VOID
EFIAPI
EfiEnableInterrupts (
VOID
);
/**
Extract CPU detail version infomation
@param[in] FamilyId FamilyId, including ExtendedFamilyId
@param[in] Model Model, including ExtendedModel
@param[in] SteppingId SteppingId
@param[in] Processor Processor
**/
VOID

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
EfiRegTableLib.h
Abstract:
Definitions and macros for building register tables for chipset
initialization..
Components linking this lib must include CpuIo, PciRootBridgeIo, and
BootScriptSave protocols in their DPX.
--*/
#ifndef EFI_REG_TABLE_H
#define EFI_REG_TABLE_H
#include <PiDxe.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/UefiLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Protocol/CpuIo.h>
#include <Protocol/BootScriptSave.h>
#include <Framework/BootScript.h>
#include <Protocol/PciRootBridgeIo.h>
#define OPCODE_BASE(OpCode) ((UINT8)((OpCode) & 0xFF))
#define OPCODE_FLAGS(OpCode) ((UINT8)(((OpCode) >> 8) & 0xFF))
#define OPCODE_EXTRA_DATA(OpCode) ((UINT16)((OpCode) >> 16))
//
// RegTable Base OpCodes
//
#define OP_TERMINATE_TABLE 0
#define OP_MEM_WRITE 1
#define OP_MEM_READ_MODIFY_WRITE 2
#define OP_IO_WRITE 3
#define OP_IO_READ_MODIFY_WRITE 4
#define OP_PCI_WRITE 5
#define OP_PCI_READ_MODIFY_WRITE 6
#define OP_STALL 7
//
// RegTable OpCode Flags
//
#define OPCODE_FLAG_S3SAVE 1
#define TERMINATE_TABLE { (UINT32) OP_TERMINATE_TABLE, (UINT32) 0, (UINT32) 0 }
//
// REG_TABLE_ENTRY_PCI_WRITE encodes the width in the upper bits of the OpCode
// as one of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH values
//
typedef struct {
UINT32 OpCode;
UINT32 PciAddress;
UINT32 Data;
} EFI_REG_TABLE_PCI_WRITE;
#define PCI_WRITE(Bus, Dev, Fnc, Reg, Width, Data, S3Flag) \
{ \
(UINT32) (OP_PCI_WRITE | ((S3Flag) << 8) | ((Width) << 16)), \
(UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
(UINT32) (Data), \
(UINT32) (0) \
}
typedef struct {
UINT32 OpCode;
UINT32 MemAddress;
UINT32 Data;
} EFI_REG_TABLE_MEM_WRITE;
typedef struct {
UINT32 OpCode;
UINT32 PciAddress;
UINT32 OrMask;
UINT32 AndMask;
} EFI_REG_TABLE_PCI_READ_MODIFY_WRITE;
#define PCI_READ_MODIFY_WRITE(Bus, Dev, Fnc, Reg, Width, OrMask, AndMask, S3Flag) \
{ \
(UINT32) (OP_PCI_READ_MODIFY_WRITE | ((S3Flag) << 8) | ((Width) << 16)), \
(UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
(UINT32) (OrMask), \
(UINT32) (AndMask) \
}
typedef struct {
UINT32 OpCode;
UINT32 MemAddress;
UINT32 OrMask;
UINT32 AndMask;
} EFI_REG_TABLE_MEM_READ_MODIFY_WRITE;
#define MEM_READ_MODIFY_WRITE(Address, Width, OrMask, AndMask, S3Flag) \
{ \
(UINT32) (OP_MEM_READ_MODIFY_WRITE | ((S3Flag) << 8) | ((Width) << 16)), \
(UINT32) (Address), \
(UINT32) (OrMask), \
(UINT32) (AndMask) \
}
typedef struct {
UINT32 OpCode;
UINT32 Field2;
UINT32 Field3;
UINT32 Field4;
} EFI_REG_TABLE_GENERIC;
typedef union {
EFI_REG_TABLE_GENERIC Generic;
EFI_REG_TABLE_PCI_WRITE PciWrite;
EFI_REG_TABLE_PCI_READ_MODIFY_WRITE PciReadModifyWrite;
EFI_REG_TABLE_MEM_READ_MODIFY_WRITE MemReadModifyWrite;
} EFI_REG_TABLE;
/**
Processes register table assuming which may contain PCI, IO, MEM, and STALL
entries.
No parameter checking is done so the caller must be careful about omitting
values for PciRootBridgeIo or CpuIo parameters. If the regtable does
not contain any PCI accesses, it is safe to omit the PciRootBridgeIo (supply
NULL). If the regtable does not contain any IO or Mem entries, it is safe to
omit the CpuIo (supply NULL).
The RegTableEntry parameter is not checked, but is required.
gBS is assumed to have been defined and is used when processing stalls.
The function processes each entry sequentially until an OP_TERMINATE_TABLE
entry is encountered.
@param[in] RegTableEntry A pointer to the register table to process
@param[in] PciRootBridgeIo A pointer to the instance of PciRootBridgeIo that is used
when processing PCI table entries
@param[in] CpuIo A pointer to the instance of CpuIo that is used when processing IO and
MEM table entries
@retval Nothing.
**/
VOID
ProcessRegTablePci (
EFI_REG_TABLE * RegTableEntry,
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * PciRootBridgeIo,
EFI_CPU_IO_PROTOCOL * CpuIo
);
/**
Processes register table assuming which may contain IO, MEM, and STALL
entries, but must NOT contain any PCI entries. Any PCI entries cause an
ASSERT in a DEBUG build and are skipped in a free build.
No parameter checking is done. Both RegTableEntry and CpuIo parameters are
required.
gBS is assumed to have been defined and is used when processing stalls.
The function processes each entry sequentially until an OP_TERMINATE_TABLE
entry is encountered.
@param[in] RegTableEntry - A pointer to the register table to process
@param[in] CpuIo - A pointer to the instance of CpuIo that is used when processing IO and
MEM table entries
@retval Nothing.

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Esrt.h
Abstract:
--*/
#ifndef _DFU_ESRT_H_
#define _DFU_ESRT_H_
typedef struct {
EFI_GUID FwClass;
UINT32 FwType;
UINT32 FwVersion;
UINT32 FwLstCompatVersion;
UINT32 CapsuleFlags;
UINT32 LastAttemptVersion;
UINT32 LastAttemptStatus;
} FW_RES_ENTRY;
typedef struct {
UINT32 NumEntries;
FW_RES_ENTRY FwEntries[256];
} FW_RES_ENTRY_LIST;
typedef struct {
UINT32 FwResourceCount;
UINT32 FwResourceMax;
UINT64 FwResourceVersion;
} EFI_SYSTEM_RESOURCE_TABLE;
typedef
EFI_STATUS
(EFIAPI *ESRT_POPULATE_TABLE) (
);
typedef
EFI_STATUS
(EFIAPI *ESRT_UPDATE_TABLE_ENTRY_BY_GUID) (
IN EFI_GUID FwEntryGuid,
IN FW_RES_ENTRY *FwEntry
);
typedef
EFI_STATUS
(EFIAPI *ESRT_GET_FW_ENTRY_BY_GUID) (
IN EFI_GUID FwEntryGuid,
OUT FW_RES_ENTRY *FwEntry
);
#pragma pack()

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Fd.h
Abstract:
EFI Intel82802AB/82802AC Firmware Hub.
--*/
//
// Supported SPI devices
//
//
// MFG and Device code
//
#define SST_25LF040A 0x0044BF
#define SST_25LF040 0x0040BF
#define SST_25LF080A 0x0080BF
#define SST_25VF080B 0x008EBF
#define SST_25VF016B 0x0041BF
#define SST_25VF032B 0x004ABF
#define PMC_25LV040 0x007E9D
#define ATMEL_26DF041 0x00441F
#define Atmel_AT26F004 0x00041F
#define Atmel_AT26DF081A 0x01451F
#define Atmel_AT25DF161 0x02461F
#define Atmel_AT26DF161 0x00461F
#define Atmel_AT25DF641 0x00481F
#define Atmel_AT26DF321 0x00471F
#define Macronix_MX25L8005 0x1420C2
#define Macronix_MX25L1605A 0x1520C2
#define Macronix_MX25L3205D 0x1620C2
#define STMicro_M25PE80 0x148020
#define Winbond_W25X40 0x1330EF
#define Winbond_W25X80 0x1430EF
#define Winbond_W25Q80 0x1440EF
#define Winbond_W25X16 0x1540EF // W25Q16
#define Winbond_W25X32 0x1630EF
//
// NOTE: Assuming that 8Mbit flash will only contain a 4Mbit binary.
// Treating 4Mbit and 8Mbit devices the same.
//
//
// BIOS Base Address
//
#define BIOS_BASE_ADDRESS_4M 0xFFF80000
#define BIOS_BASE_ADDRESS_8M 0xFFF00000
#define BIOS_BASE_ADDRESS_16M 0xFFE00000
//
// block and sector sizes
//
#define SECTOR_SIZE_256BYTE 0x100 // 256byte page size
#define SECTOR_SIZE_4KB 0x1000 // 4kBytes sector size
#define BLOCK_SIZE_32KB 0x00008000 // 32Kbytes block size
#define MAX_FLASH_SIZE 0x00400000 // 32Mbit (Note that this can also be used for the 4Mbit & 8Mbit)
//
// Flash commands
//
#define SPI_SST25LF_COMMAND_WRITE 0x02
#define SPI_SST25LF_COMMAND_READ 0x03
#define SPI_SST25LF_COMMAND_ERASE 0x20
#define SPI_SST25LF_COMMAND_WRITE_DISABLE 0x04
#define SPI_SST25LF_COMMAND_READ_STATUS 0x05
#define SPI_SST25LF_COMMAND_WRITE_ENABLE 0x06
#define SPI_SST25LF_COMMAND_READ_ID 0xAB
#define SPI_SST25LF_COMMAND_WRITE_S_EN 0x50
#define SPI_SST25LF_COMMAND_WRITE_S 0x01
#define SPI_PMC25LV_COMMAND_WRITE 0x02
#define SPI_PMC25LV_COMMAND_READ 0x03
#define SPI_PMC25LV_COMMAND_ERASE 0xD7
#define SPI_PMC25LV_COMMAND_WRITE_DISABLE 0x04
#define SPI_PMC25LV_COMMAND_READ_STATUS 0x05
#define SPI_PMC25LV_COMMAND_WRITE_ENABLE 0x06
#define SPI_PMC25LV_COMMAND_READ_ID 0xAB
#define SPI_PMC25LV_COMMAND_WRITE_S_EN 0x06
#define SPI_PMC25LV_COMMAND_WRITE_S 0x01
#define SPI_AT26DF_COMMAND_WRITE 0x02
#define SPI_AT26DF_COMMAND_READ 0x03
#define SPI_AT26DF_COMMAND_ERASE 0x20
#define SPI_AT26DF_COMMAND_WRITE_DISABLE 0x00
#define SPI_AT26DF_COMMAND_READ_STATUS 0x05
#define SPI_AT26DF_COMMAND_WRITE_ENABLE 0x00
#define SPI_AT26DF_COMMAND_READ_ID 0x9F
#define SPI_AT26DF_COMMAND_WRITE_S_EN 0x00
#define SPI_AT26DF_COMMAND_WRITE_S 0x00
#define SPI_AT26F_COMMAND_WRITE 0x02
#define SPI_AT26F_COMMAND_READ 0x03
#define SPI_AT26F_COMMAND_ERASE 0x20
#define SPI_AT26F_COMMAND_WRITE_DISABLE 0x04
#define SPI_AT26F_COMMAND_READ_STATUS 0x05
#define SPI_AT26F_COMMAND_WRITE_ENABLE 0x06
#define SPI_AT26F_COMMAND_JEDEC_ID 0x9F
#define SPI_AT26F_COMMAND_WRITE_S_EN 0x00
#define SPI_AT26F_COMMAND_WRITE_S 0x01
#define SPI_AT26F_COMMAND_WRITE_UNPROTECT 0x39
#define SPI_SST25VF_COMMAND_WRITE 0x02
#define SPI_SST25VF_COMMAND_READ 0x03
#define SPI_SST25VF_COMMAND_ERASE 0x20
#define SPI_SST25VF_COMMAND_WRITE_DISABLE 0x04
#define SPI_SST25VF_COMMAND_READ_STATUS 0x05
#define SPI_SST25VF_COMMAND_WRITE_ENABLE 0x06
#define SPI_SST25VF_COMMAND_READ_ID 0xAB
#define SPI_SST25VF_COMMAND_JEDEC_ID 0x9F
#define SPI_SST25VF_COMMAND_WRITE_S_EN 0x50
#define SPI_SST25VF_COMMAND_WRITE_S 0x01
#define SPI_STM25PE_COMMAND_WRITE 0x02
#define SPI_STM25PE_COMMAND_READ 0x03
#define SPI_STM25PE_COMMAND_ERASE 0xDB
#define SPI_STM25PE_COMMAND_WRITE_DISABLE 0x04
#define SPI_STM25PE_COMMAND_READ_STATUS 0x05
#define SPI_STM25PE_COMMAND_WRITE_ENABLE 0x06
#define SPI_STM25PE_COMMAND_JEDEC_ID 0x9F
#define SPI_WinbondW25X_COMMAND_WRITE_S 0x01
#define SPI_WinbondW25X_COMMAND_WRITE 0x02
#define SPI_WinbondW25X_COMMAND_READ 0x03
#define SPI_WinbondW25X_COMMAND_READ_STATUS 0x05
#define SPI_WinbondW25X_COMMAND_ERASE_S 0x20
#define SPI_WinbondW25X_COMMAND_WRITE_ENABLE 0x06
#define SPI_WinbondW25X_COMMAND_JEDEC_ID 0x9F
//
// SPI default opcode slots
//
#define SPI_OPCODE_WRITE_INDEX 0
#define SPI_OPCODE_READ_INDEX 1
#define SPI_OPCODE_ERASE_INDEX 2
#define SPI_OPCODE_READ_S_INDEX 3
#define SPI_OPCODE_READ_ID_INDEX 4
#define SPI_OPCODE_WRITE_S_INDEX 6
#define SPI_OPCODE_WRITE_UNPROTECT_INDEX 7
#define SPI_PREFIX_WRITE_S_EN 1
#define SPI_PREFIX_WRITE_EN 0
//
// Atmel AT26F00x
//
#define B_AT26F_STS_REG_SPRL 0x80
#define B_AT26F_STS_REG_SWP 0x0C
//
// Block lock bit definitions:
//
#define READ_LOCK 0x04
#define LOCK_DOWN 0x02
#define WRITE_LOCK 0x01
#define FULL_ACCESS 0x00
//
// Function Prototypes
//
EFI_STATUS
FlashGetNextBlock (
IN UINTN* Key,
OUT EFI_PHYSICAL_ADDRESS* BlockAddress,
OUT UINTN* BlockSize
);
EFI_STATUS
FlashGetSize (
OUT UINTN* Size
);
EFI_STATUS
FlashGetUniformBlockSize (
OUT UINTN* Size
);
EFI_STATUS
FlashEraseWithNoTopSwapping (
IN UINT8 *BaseAddress,
IN UINTN NumBytes
);
EFI_STATUS
FlashErase (
IN UINT8 *BaseAddress,
IN UINTN NumBytes
);
EFI_STATUS
FlashWriteWithNoTopSwapping (
IN UINT8* DstBufferPtr,
IN UINT8* SrcBufferPtr,
IN UINTN NumBytes
);
EFI_STATUS
FlashWrite (
IN UINT8 *DstBufferPtr,
IN UINT8 *SrcBufferPtr,
IN UINTN NumBytes
);
EFI_STATUS
FlashReadWithNoTopSwapping (
IN UINT8 *BaseAddress,
IN UINT8 *DstBufferPtr,
IN UINTN NumBytes
);
EFI_STATUS
FlashRead (
IN UINT8 *BaseAddress,
IN UINT8 *DstBufferPtr,
IN UINTN NumBytes
);
EFI_STATUS
FlashLockWithNoTopSwapping (
IN UINT8* BaseAddress,
IN UINTN NumBytes,
IN UINT8 LockState
);
EFI_STATUS
FlashLock(
IN UINT8 *BaseAddress,
IN UINTN NumBytes,
IN UINT8 LockState
);
EFI_STATUS
CheckIfErased(
IN UINT8 *DstBufferPtr,

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Flash device library class header file.
Flash Device Library common type, MACRO and API definition. The basic idea for
this library is to provide API to abstract the different between flash
technology (SPI, FWH etc..), flash controller (SPI host controller on
ICH, MMIO type access for FWH), flash chip (programming command, method
of status checking). This library class can be consumed by drivers or applications
such as Firmware Volume Block driver, Flash Update application. These driver
can be written in a generic manner so that they are more easy to be
ported to other platforms.
This library can be build on a set of APIs which can touch flash controller, flash
chip directly for a platform with simple flash device configuration.
For a platform with complex flash device configuration, this library can be built
on the Flash Device Operate Library. Please see the header file for that library
class for detailed usage.
**/
#ifndef __FLASHDEVICE_LIB_H__
#define __FLASHDEVICE_LIB_H__
/**
Read NumBytes bytes of data from the address specified by
PAddress into Buffer.
@param[in] PAddress The starting physical address of the read.
@param[in,out] NumBytes On input, the number of bytes to read. On output, the number
of bytes actually read.
@param[out] Buffer The destination data buffer for the read.
@retval EFI_SUCCESS. Opertion is successful.
@retval EFI_DEVICE_ERROR If there is any device errors.
**/
EFI_STATUS
EFIAPI
LibFvbFlashDeviceRead (
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
);
/**
Write NumBytes bytes of data from Buffer to the address specified by
PAddresss.
@param[in] PAddress The starting physical address of the write.
@param[in,out] NumBytes On input, the number of bytes to write. On output,
the actual number of bytes written.
@param[in] Buffer The source data buffer for the write.
@retval EFI_SUCCESS. Opertion is successful.
@retval EFI_DEVICE_ERROR If there is any device errors.
**/
EFI_STATUS
EFIAPI
LibFvbFlashDeviceWrite (
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
);
/**
Erase the block staring at PAddress.
@param[in] PAddress The starting physical address of the region to be erased.
@param[in] LbaLength The length of the region to be erased. This parameter is necessary
as the physical block size on a flash device could be different than
the logical block size of Firmware Volume Block protocol. Erase on
flash chip is always performed block by block. Therefore, the ERASE
operation to a logical block is converted a number of ERASE operation
(or a partial erase) on the hardware.
@retval EFI_SUCCESS. Opertion is successful.
@retval EFI_DEVICE_ERROR If there is any device errors.
**/
EFI_STATUS
EFIAPI
LibFvbFlashDeviceBlockErase (
IN UINTN PAddress,
IN UINTN LbaLength
);
/**
Lock or unlock the block staring at PAddress.
@param[in] PAddress The starting physical address of region to be (un)locked.
@param[in] LbaLength The length of the region to be (un)locked. This parameter is necessary
as the physical block size on a flash device could be different than
the logical block size of Firmware Volume Block protocol. (Un)Lock on
flash chip is always performed block by block. Therefore, the (Un)Lock
operation to a logical block is converted a number of (Un)Lock operation
(or a partial erase) on the hardware.
@param[in] Lock TRUE to lock. FALSE to unlock.
@retval EFI_SUCCESS. Opertion is successful.
**/
EFI_STATUS
EFIAPI

28
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __MMIO_CONFIG_LIB_H__
#define __MMIO_CONFIG_LIB_H__
#include <Protocol/MmioDevice.h>

31
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _I2C_PORT_H
#define _I2C_PORT_H
//
// Types
//

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
--*/
#ifndef _FSA_LIB_H
#define _FSA_LIB_H
#include <Uefi.h>
#include <Uefi/UefiSpec.h>
#define FSA_REG_DEVID 0x1
#define FSA_REG_CTRL 0x2
#define FSA_REG_INTR 0x3
#define FSA_REG_INTR_MSK 0x5
#define FSA_REG_RESISTOR_CODE 0x7
#define FSA_REG_TIMING_SET 0x8
#define FSA_REG_STATUS 0x9
#define FSA_REG_DEV_TYPE 0xA
#define FSA_REG_DAC_SAR 0xB
#define FSA_REG_MANUAL_SW 0x13
#define FSA_REG_MANUAL_CHG_CTRL 0x14
extern
EFI_STATUS
EFIAPI
FsaUsbDeviceMode (
VOID
);
extern
EFI_STATUS
EFIAPI
DisableFsaTimerHandler (
VOID
);

28
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
--*/
#ifndef _PLATFORM_FSP_LIB_H
#define _PLATFORM_FSP_LIB_H
#include <Base.h>
#include <Uefi.h>

244
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _SPIFlash_H_
#define _SPIFlash_H_
#include <Protocol/Spi.h>
//EFI_STATUS SpiFlashLock(BOOLEAN Lock);
//EFI_STATUS SpiFlashInit(void);
typedef enum {
EnumSpiFlashW25Q64,
EnumSpiFlashAT25DF321A,
EnumSpiFlashAT26DF321,
EnumSpiFlashAT25DF641,
EnumSpiFlashW25Q16,
EnumSpiFlashW25Q32,
EnumSpiFlashW25X32,
EnumSpiFlashW25X64,
EnumSpiFlashW25Q128,
EnumSpiFlashMX25L16,
EnumSpiFlashMX25L32,
EnumSpiFlashMX25L64,
EnumSpiFlashMX25L128,
EnumSpiFlashMX25U6435F,
EnumSpiFlashSST25VF016B,
EnumSpiFlashSST25VF064C,
EnumSpiFlashN25Q064,
EnumSpiFlashM25PX16,
EnumSpiFlashN25Q032,
EnumSpiFlashM25PX32,
EnumSpiFlashM25PX64,
EnumSpiFlashN25Q128,
EnumSpiFlashEN25Q16,
EnumSpiFlashEN25Q32,
EnumSpiFlashEN25Q64,
EnumSpiFlashEN25Q128,
EnumSpiFlashA25L016,
EnumSpiFlashMax
} SPI_FLASH_TYPES_SUPPORTED;
//
// Serial Flash VendorId and DeviceId
//
#define SF_VENDOR_ID_ATMEL 0x1F
#define SF_DEVICE_ID0_AT26DF321 0x47
#define SF_DEVICE_ID1_AT26DF321 0x00
#define SF_DEVICE_ID0_AT25DF321A 0x47
#define SF_DEVICE_ID1_AT25DF321A 0x01
#define SF_DEVICE_ID0_AT25DF641 0x48
#define SF_DEVICE_ID1_AT25DF641 0x00
#define SF_VENDOR_ID_WINBOND 0xEF
#define SF_DEVICE_ID0_W25XXX 0x30
#define SF_DEVICE_ID1_W25X32 0x16
#define SF_DEVICE_ID1_W25X64 0x17
#define SF_DEVICE_ID0_W25QXX 0x60
#define SF_DEVICE_ID1_W25Q16 0x15
#define SF_DEVICE_ID1_W25Q32 0x16
#define SF_DEVICE_ID1_W25Q64 0x17
#define SF_DEVICE_ID1_W25Q128 0x18
#define SF_VENDOR_ID_MACRONIX 0xC2
#define SF_DEVICE_ID0_MX25LXX 0x20
#define SF_DEVICE_ID1_MX25L16 0x15
#define SF_DEVICE_ID1_MX25L32 0x16
#define SF_DEVICE_ID1_MX25L64 0x17
#define SF_DEVICE_ID1_MX25L128 0x18
#define SF_DEVICE_ID0_MX25UXX 0x25
#define SF_DEVICE_ID1_MX25U6435F 0x37
#define SF_VENDOR_ID_NUMONYX 0x20
#define SF_DEVICE_ID0_N25Q064 0xBB
#define SF_DEVICE_ID1_N25Q064 0x17
#define SF_DEVICE_ID0_M25PXXX 0x71
#define SF_DEVICE_ID0_N25QXXX 0xBA
#define SF_DEVICE_ID1_M25PX16 0x15
#define SF_DEVICE_ID1_N25Q032 0x16
#define SF_DEVICE_ID1_M25PX32 0x16
#define SF_DEVICE_ID1_M25PX64 0x17
#define SF_DEVICE_ID1_N25Q128 0x18
#define SF_VENDOR_ID_SST 0xBF
#define SF_DEVICE_ID0_SST25VF0XXX 0x25
#define SF_DEVICE_ID1_SST25VF016B 0x41
#define SF_DEVICE_ID1_SST25VF064C 0x4B
#define SF_VENDOR_ID_EON 0x1C
#define SF_DEVICE_ID0_EN25QXX 0x30
#define SF_DEVICE_ID1_EN25Q16 0x15
#define SF_DEVICE_ID1_EN25Q32 0x16
#define SF_DEVICE_ID1_EN25Q64 0x17
#define SF_DEVICE_ID1_EN25Q128 0x18
#define SF_VENDOR_ID_AMIC 0x37
#define SF_DEVICE_ID0_A25L016 0x30
#define SF_DEVICE_ID1_A25L016 0x15
#define ATMEL_AT26DF321_SIZE 0x00400000
#define ATMEL_AT25DF321A_SIZE 0x00400000
#define ATMEL_AT25DF641_SIZE 0x00800000
#define WINBOND_W25X32_SIZE 0x00400000
#define WINBOND_W25X64_SIZE 0x00800000
#define WINBOND_W25Q16_SIZE 0x00200000
#define WINBOND_W25Q32_SIZE 0x00400000
#define WINBOND_W25Q64_SIZE 0x00800000
#define WINBOND_W25Q128_SIZE 0x01000000
#define SST_SST25VF016B_SIZE 0x00200000
#define SST_SST25VF064C_SIZE 0x00800000
#define MACRONIX_MX25L16_SIZE 0x00200000
#define MACRONIX_MX25L32_SIZE 0x00400000
#define MACRONIX_MX25L64_SIZE 0x00800000
#define MACRONIX_MX25U64_SIZE 0x00800000
#define MACRONIX_MX25L128_SIZE 0x01000000
#define NUMONYX_M25PX16_SIZE 0x00400000
#define NUMONYX_N25Q032_SIZE 0x00400000
#define NUMONYX_M25PX32_SIZE 0x00400000
#define NUMONYX_M25PX64_SIZE 0x00800000
#define NUMONYX_N25Q064_SIZE 0x00800000
#define NUMONYX_N25Q128_SIZE 0x01000000
#define EON_EN25Q16_SIZE 0x00200000
#define EON_EN25Q32_SIZE 0x00400000
#define EON_EN25Q64_SIZE 0x00800000
#define EON_EN25Q128_SIZE 0x01000000
#define AMIC_A25L16_SIZE 0x00200000
#define SF_VENDOR_ID_SST 0xBF
#define SF_DEVICE_ID0_25LF080A 0x25
#define SF_DEVICE_ID1_25LF080A 0x8E
#define SF_DEVICE_ID0_25VF016B 0x25
#define SF_DEVICE_ID1_25VF016B 0x41
#define SF_VENDOR_ID_ATMEL 0x1F
#define SF_DEVICE_ID0_AT26DF321 0x47
#define SF_DEVICE_ID1_AT26DF321 0x00
#define SF_VENDOR_ID_STM 0x20
#define SF_DEVICE_ID0_M25P32 0x20
#define SF_DEVICE_ID1_M25P32 0x16
#define SF_VENDOR_ID_WINBOND 0xEF
#define SF_DEVICE_ID0_W25XXX 0x30
#define SF_DEVICE_ID0_W25QXX 0x60
#define SF_DEVICE_ID1_W25X80 0x14
#define SF_DEVICE_ID1_W25X16 0x15
#define SF_DEVICE_ID1_W25X32 0x16
#define SF_DEVICE_ID1_W25X64 0x17
#define SF_VENDOR_ID_MX 0xC2
#define SF_DEVICE_ID0_25L1605A 0x20
#define SF_DEVICE_ID1_25L1605A 0x15
#define SF_VENDOR_ID_NUMONYX 0x20
#define SF_DEVICE_ID0_M25PX16 0x71
#define SF_DEVICE_ID1_M25PX16 0x15
#define SST_25LF080A_SIZE 0x00100000
#define SST_25LF016B_SIZE 0x00200000
#define ATMEL_AT26DF321_SIZE 0x00400000
#define STM_M25P32_SIZE 0x00400000
#define WINBOND_W25X80_SIZE 0x00100000
#define WINBOND_W25X16_SIZE 0x00200000
#define WINBOND_W25X32_SIZE 0x00400000
#define WINBOND_W25X64_SIZE 0x00800000
#define MX_25L1605A_SIZE 0x00200000
//
// Physical Sector Size on the Serial Flash device
//
#define SF_SECTOR_SIZE 0x1000
#define SF_BLOCK_SIZE 0x8000
//
// Serial Flash Status Register definitions
//
#define SF_SR_BUSY 0x01 // Indicates if internal write operation is in progress
#define SF_SR_WEL 0x02 // Indicates if device is memory write enabled
#define SF_SR_BP0 0x04 // Block protection bit 0
#define SF_SR_BP1 0x08 // Block protection bit 1
#define SF_SR_BP2 0x10 // Block protection bit 2
#define SF_SR_BP3 0x20 // Block protection bit 3
#define SF_SR_WPE 0x3C // Enable write protection on all blocks
#define SF_SR_AAI 0x40 // Auto Address Increment Programming status
#define SF_SR_BPL 0x80 // Block protection lock-down
//
// Operation Instruction definitions for the Serial Flash Device
//
#define SF_INST_WRSR 0x01 // Write Status Register
#define SF_INST_PROG 0x02 // Byte Program
#define SF_INST_READ 0x03 // Read
#define SF_INST_WRDI 0x04 // Write Disable
#define SF_INST_RDSR 0x05 // Read Status Register
#define SF_INST_WREN 0x06 // Write Enable
#define SF_INST_HS_READ 0x0B // High-speed Read
#define SF_INST_SERASE 0x20 // Sector Erase (4KB)
#define SF_INST_BERASE 0x52 // Block Erase (32KB)
#define SF_INST_64KB_ERASE 0xD8 // Block Erase (64KB)
#define SF_INST_EWSR 0x50 // Enable Write Status Register
#define SF_INST_READ_ID 0xAB // Read ID
#define SF_INST_JEDEC_READ_ID 0x9F // JEDEC Read ID
#define SF_INST_DOFR 0x3B // Dual Output Fast Read
#define SF_INST_SFDP 0x5A // Serial Flash Discovery Parameters
#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
#define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
#define BLOCK_SIZE_64KB 0x00010000 // Common 64kBytes block size
#define MAX_FWH_SIZE 0x00100000 // 8Mbit (Note that this can also be used for the 4Mbit )
//
// Prefix Opcode Index on the host SPI controller
//
typedef enum {
SPI_WREN, // Prefix Opcode 0: Write Enable
SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register
} PREFIX_OPCODE_INDEX;
//
// Opcode Menu Index on the host SPI controller
//
typedef enum {
SPI_READ_ID, // Opcode 0: READ ID, Read cycle with address
SPI_READ, // Opcode 1: READ, Read cycle with address

45
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/*++
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
SmmStallLib.h
Abstract:
This library provides SMM functions for Stall.
These can be used to save size and simplify code.
All contents must be runtime and SMM safe.
--*/
#ifndef _SMM_STALL_LIB_H_
#define _SMM_STALL_LIB_H_
#include "PiDxe.h"
#include "Pi/PiSmmCis.h"
extern EFI_SMM_SYSTEM_TABLE2 *mSmst;
/**
Delay for at least the request number of microseconds
@param[in] Microseconds Number of microseconds to delay.

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __BASE_USBDEVICEMODE_LIB_H__
#define __BASE_USBDEVICEMODE_LIB_H__
#pragma pack(1)
typedef struct {
UINT8 bLength;
UINT8 bDescriptorType;
UINT8 bMaxBurst;
UINT8 bmAttributes;
UINT16 wBytesPerInterval;
} endpointCompanionDescriptor;
#pragma pack()
#pragma pack(1)
typedef struct {
UINT8 bLength;
UINT8 bDescriptorType;
UINT8 bEndpointAddress;
UINT8 bmAttributes;
UINT16 wMaxPacketSize;
UINT8 bInterval;
} endpointDescriptor;
#pragma pack()
typedef struct {
endpointDescriptor *pEpDesc;
endpointCompanionDescriptor *pEpCompDesc;
} USB_DEV_EP_INFO; //usbdEpInfo;
typedef struct {
VOID *pBuf;
UINT32 dataLen;
} USBD_IO_INFO;
typedef struct {
USBD_IO_INFO ioInfo;
USB_DEV_EP_INFO epInfo;
} USBD_IO_REQ;
UINTN
EFIAPI
usbdInitDCI (
VOID
);
BOOLEAN
EFIAPI
fbInit (
OUT VOID *pParams
);
BOOLEAN
EFIAPI
fbDeinit (
VOID
);
BOOLEAN
EFIAPI
fbStart (
VOID
);
BOOLEAN
EFIAPI
fbStop (
VOID
);
BOOLEAN
EFIAPI
usbdSetMmioBar (
UINT32 mmioBar
);
BOOLEAN
EFIAPI
udciDeinit (
VOID *pUdciHndl,
UINT32 flags
);
BOOLEAN
EFIAPI
udciIsr (
VOID *pUdciHndl
);
BOOLEAN
EFIAPI
udciConnect (
VOID *pUdciHndl
);
BOOLEAN
EFIAPI
udciDisconnect (
VOID *pUdciHndl
);
BOOLEAN
EFIAPI
udciSetAddress (
VOID *pUdciHndl,
UINT8 address
);
BOOLEAN
EFIAPI
udciInitEp (
VOID *pUdciHndl,
USB_DEV_EP_INFO *pEpInfo
);
BOOLEAN
EFIAPI
udciEnableEp (
VOID *pUdciHndl,
USB_DEV_EP_INFO *pEpInfo
);
BOOLEAN
EFIAPI
udciDisableEp (
VOID *pUdciHndl,
USB_DEV_EP_INFO *pEpInfo
);
BOOLEAN
EFIAPI
udciStallEp (
VOID *pUdciHndl,
USB_DEV_EP_INFO *pEpInfo
);
BOOLEAN
EFIAPI
udciClearStallEp (
VOID *pUdciHndl,
USB_DEV_EP_INFO *pEpInfo
);
BOOLEAN
EFIAPI
udciEp0TxStatus (
VOID *pUdciHndl
);
BOOLEAN
EFIAPI
udciEpTxData (
VOID *pUdciHndl,
USBD_IO_REQ *pIoReq
);
BOOLEAN
EFIAPI
udciEpRxData (
VOID *pUdciHndl,
USBD_IO_REQ *pIoReq

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Mcfg.h
Abstract:
ACPI Memory mapped configuration space base address Description Table
implementation, based on PCI Firmware Specification Revision 3.0 final draft,
downloadable at http://www.pcisig.com/home
**/
#ifndef _MCFG_H_
#define _MCFG_H_
//
// Statements that include other files
//
#include <IndustryStandard/Acpi20.h>
#include "McfgTable.h"
#include "Platform.h"
//
// "MCFG" Static Resource Affinity Table
//
#define EFI_ACPI_3_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE 0x4746434D
//
// MCFG Definitions, see specification for details.
//
#define EFI_ACPI_OEM_MCFG_REVISION 0x00000001
//
// Define the number of each table type.
// This is where the table layout is modified.
//
#define EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_BASE_ADDRESS_STRUCTURE_COUNT 1
//
// MCFG Table definition. The table must be defined in a platform
// specific manner.
//
//
// Ensure proper structure formats
//
#pragma pack(1)
typedef struct {
EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
#if EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_BASE_ADDRESS_STRUCTURE_COUNT > 0

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
McfgTable.h
Abstract:
ACPI Memory mapped configuration space base address Description Table
definition, based on PCI Firmware Specification Revision 3.0 final draft,
downloadable at http://www.pcisig.com/home
**/
#ifndef _MCFG_TABLE_H_
#define _MCFG_TABLE_H_
//
// Include files
//
#include <PiDxe.h>
//
// Ensure proper structure formats
//
#pragma pack(1)
//
// MCFG Revision (defined in spec)
//
#define EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_REVISION 0x01
//
// MCFG Structure Definitions
//
//
// Memory Mapped Enhanced Configuration Base Address Allocation
// Structure Definition
//
typedef struct {
UINT64 BaseAddress;
UINT16 PciSegmentGroupNumber;
UINT8 StartBusNumber;
UINT8 EndBusNumber;
UINT32 Reserved;
} EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_BASE_ADDRESS_STRUCTURE;
//
// MCFG Table header definition. The rest of the table
// must be defined in a platform specific manner.

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Platform.h
Abstract:
Pinetrail platform specific information.
**/
#ifndef _PLATFORM_H
#define _PLATFORM_H
#include "ChipsetAccess.h"
#include "PlatformBaseAddresses.h"
//
// Number of P & T states supported.
//
#define NPTM_P_STATES_SUPPORTED 16
#define NPTM_T_STATES_SUPPORTED 8
//
// I/O APIC IDs, the code uses math to generate the numbers
// instead of using these defines.
//
#define ICH_IOAPIC (1 << 0)
#define ICH_IOAPIC_ID 0x08
//
// Possible SMBus addresses that will be present.
//
#define SMBUS_ADDR_CH_A_1 0xA0
#define SMBUS_ADDR_CH_A_2 0xA2
#define SMBUS_ADDR_CH_B_1 0xA4
#define SMBUS_ADDR_CH_B_2 0xA6
#define SMBUS_ADDR_CH_C_1 0xA8
#define SMBUS_ADDR_CH_C_2 0xAA
#define SMBUS_ADDR_CH_D_1 0xAC
#define SMBUS_ADDR_CH_D_2 0xAE
#define SMBUS_ADDR_HOST_CLK_BUFFER 0xDC
#define SMBUS_ADDR_ICH_SLAVE 0x44
#define SMBUS_ADDR_HECETA 0x5C
#define SMBUS_ADDR_SMBARP 0xC2
#define SMBUS_ADDR_82573E 0xC6
#define SMBUS_ADDR_CLKCHIP 0xD2
#define SMBUS_ADDR_BRD_REV 0x4E
#define SMBUS_ADDR_DB803 0x82
//
// SMBus addresses that used on this platform.
//
#define PLATFORM_SMBUS_RSVD_ADDRESSES { \
SMBUS_ADDR_CH_A_1, \
SMBUS_ADDR_CH_A_2, \
SMBUS_ADDR_HOST_CLK_BUFFER, \
SMBUS_ADDR_ICH_SLAVE, \
SMBUS_ADDR_SMBARP, \
SMBUS_ADDR_CLKCHIP, \
SMBUS_ADDR_BRD_REV, \
SMBUS_ADDR_DB803 \
}
//
// Count of addresses present in PLATFORM_SMBUS_RSVD_ADDRESSES.
//
#define PLATFORM_NUM_SMBUS_RSVD_ADDRESSES 8
//
// CMOS usage
//
#define CMOS_CPU_BSP_SELECT 0x10
#define CMOS_CPU_UP_MODE 0x11
#define CMOS_CPU_RATIO_OFFSET 0x12
#define CMOS_CPU_CORE_HT_OFFSET 0x13
#define CMOS_EFI_DEBUG 0x14
#define CMOS_CPU_BIST_OFFSET 0x15
#define CMOS_CPU_VMX_OFFSET 0x16
#define CMOS_ICH_PORT80_OFFSET 0x17
#define CMOS_PLATFORM_DESIGNATOR 0x18 // Second bank CMOS location of Platform ID.
#define CMOS_VALIDATION_TEST_BYTE 0x19 // BIT0 - Validation mailbox for UPonDP.
#define CMOS_SERIAL_BAUD_RATE 0x1A // 0=115200; 1=57600; 2=38400; 3=19200; 4=9600
#define CMOS_DCU_MODE_OFFSET 0x1B
#define CMOS_VR11_SET_OFFSET 0x1C
#define CMOS_SBSP_TO_AP_COMM 0x20 // SEC code use ONLY!!!
#define CMOS_RESET_TYPE_BY_OS 0x52
#define TCG_CMOS_MOR_AREA_OFFSET 0x65 // Also Change in Universal\Security\Tpm\PhysicalPresence\Dxe\PhysicalPresence.c &
#define CMOS_S4_WAKEUP_FLAG_ADDRESS 0x6E
#define ACPI_TPM_REQUEST 0x75
#define ACPI_TPM_LAST_REQUEST 0x76
#define CMOS_BOOT_FLAG_ADDRESS 0x7E
//
// GPIO Index Data Structure.
//
typedef struct {
UINT8 Register;
UINT32 Value;
} ICH_GPIO_DEV;
//
// CPU Equates
//
#define MAX_THREAD 2
#define MAX_CORE 1
#define MAX_DIE 2
#define MAX_CPU_SOCKET 1
#define MAX_CPU_NUM (MAX_THREAD * MAX_CORE * MAX_DIE * MAX_CPU_SOCKET)
#define MEM64_LEN 0x00100000000
#define RES_MEM64_36_BASE 0x01000000000 - MEM64_LEN // 2^36
#define RES_MEM64_36_LIMIT 0x01000000000 - 1 // 2^36
#define RES_MEM64_39_BASE 0x08000000000 - MEM64_LEN // 2^39
#define RES_MEM64_39_LIMIT 0x08000000000 - 1 // 2^39

40
Vlv2TbltDevicePkg/Include/PlatformBootMode.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PlatformBootMode.h
Abstract:
EFI Platform Boot Mode
Revision History
--*/
#ifndef _EFI_PLATFORM_BOOT_MODE_H_
#define _EFI_PLATFORM_BOOT_MODE_H_
//
// Global ID for the Platform Boot Mode Protocol.

48
Vlv2TbltDevicePkg/Include/PlatformDefinitions.h Normal file
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/*++
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PlatformDefinitions.h
Abstract:
This header file provides platform specific definitions used by other modules
for platform specific initialization.
THIS FILE SHOULD ONLY CONTAIN #defines BECAUSE IT IS CONSUMED BY NON-C MODULES
(ASL and VFR)
This file should not contain addition or other operations that an ASL compiler or
VFR compiler does not understand.
--*/
#ifndef _PLATFORM_DEFINITIONS_H_
#define _PLATFORM_DEFINITIONS_H_
//
// Platform Base Address definitions
//
#define PCIEX_BASE_ADDRESS EDKII_GLUE_PciExpressBaseAddress // Pci Express Configuration Space Base Address

47
Vlv2TbltDevicePkg/Include/Ppi/MfgMemoryTest.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
BaseMemoryTest.h
Abstract:
Pei memory test PPI as defined in Tiano
Used to Pei memory test in PEI
--*/
#ifndef _BASE_MEMORY_TEST_H_
#define _BASE_MEMORY_TEST_H_
typedef struct _PEI_MFG_MEMORY_TEST_PPI PEI_MFG_MEMORY_TEST_PPI;
typedef
EFI_STATUS
(EFIAPI *PEI_MFG_MEMORY_TEST) (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN PEI_MFG_MEMORY_TEST_PPI * This,
IN UINT32 BeginAddress,
IN UINT32 MemoryLength
);

136
Vlv2TbltDevicePkg/Include/Ppi/Sha256Hash.h Normal file
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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Speaker.h
Abstract:
EFI Speaker Interface Protocol
--*/
#ifndef _PEI_SHA256_HASH_H
#define _PEI_SHA256_HASH_H
//
// Global ID Speaker Interface
//
#define PEI_SHA256_HASH_PPI_GUID \
{ \
0x950e191b, 0x8524, 0x4f51, 0x80, 0xa1, 0x5c, 0x4f, 0x1b, 0x3, 0xf3, 0x5c \
}
typedef struct _PEI_SHA256_HASH_PPI PEI_SHA256_HASH_PPI;
/**
@return The size, in bytes, of the context buffer required for hash operations.
**/
typedef
UINTN
(EFIAPI *HASH_GET_CONTEXT_SIZE)(
VOID
);
/**
Initializes user-supplied memory pointed by HashContext as hash context for
subsequent use.
If HashContext is NULL, then ASSERT().
@param[in, out] HashContext Pointer to Context being initialized.
@retval TRUE HASH context initialization succeeded.
@retval FALSE HASH context initialization failed.
**/
typedef
BOOLEAN
(EFIAPI *HASH_INIT)(
IN OUT VOID *HashContext
);
/**
Performs digest on a data buffer of the specified length. This function can
be called multiple times to compute the digest of long or discontinuous data streams.
If HashContext is NULL, then ASSERT().
@param[in, out] HashContext Pointer to the MD5 context.
@param[in] Data Pointer to the buffer containing the data to be hashed.
@param[in] DataLength Length of Data buffer in bytes.
@retval TRUE HASH data digest succeeded.
@retval FALSE Invalid HASH context. After HashFinal function has been called, the
HASH context cannot be reused.
**/
typedef
BOOLEAN
(EFIAPI *HASH_UPDATE)(
IN OUT VOID *HashContext,
IN CONST VOID *Data,
IN UINTN DataLength
);
/**
Completes hash computation and retrieves the digest value into the specified
memory. After this function has been called, the context cannot be used again.
If HashContext is NULL, then ASSERT().
If HashValue is NULL, then ASSERT().
@param[in, out] HashContext Pointer to the MD5 context
@param[out] HashValue Pointer to a buffer that receives the HASH digest
value.
@retval TRUE HASH digest computation succeeded.
@retval FALSE HASH digest computation failed.
**/
typedef
BOOLEAN
(EFIAPI *HASH_FINAL)(
IN OUT VOID *HashContext,
OUT UINT8 *HashValue
);
//
// Ppi definition
//
typedef struct _PEI_SHA256_HASH_PPI {
//
// Pointer to Hash GetContentSize function
//
HASH_GET_CONTEXT_SIZE GetContextSize;
//
// Pointer to Hash Init function
//
HASH_INIT HashInit;
//
// Pointer to Hash Update function
//
HASH_UPDATE HashUpdate;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Speaker.h
Abstract:
EFI Speaker Interface Protocol
--*/
#ifndef _PEI_SPEAKER_IF_H
#define _PEI_SPEAKER_IF_H
//
// Global ID Speaker Interface
//
#define PEI_SPEAKER_INTERFACE_PPI_GUID \
{ \
0x30ac275e, 0xbb30, 0x4b84, 0xa1, 0xcd, 0x0a, 0xf1, 0x32, 0x2c, 0x89, 0xc0 \
}
typedef struct _PEI_SPEAKER_IF_PPI PEI_SPEAKER_IF_PPI;
//
// Beep Code
//
typedef
EFI_STATUS
(EFIAPI *EFI_SPEAKER_GENERATE_BEEP) (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN UINTN NumberOfBeep,
IN UINTN BeepDuration,
IN UINTN TimeInterval
);
//
// Set Frequency
//
typedef
EFI_STATUS
(EFIAPI *EFI_SPEAKER_SET_FREQUENCY) (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN UINT16 Frequency
);
//

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