Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Wei
zwei4
@@ -0,0 +1,150 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
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||||
|
||||
#include <PiPei.h>
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||||
|
||||
#include <Ppi/SecPlatformInformation.h>
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||||
#include <Ppi/SecPerformance.h>
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||||
#include <Ppi/TemporaryRamSupport.h>
|
||||
|
||||
#include <Library/LocalApicLib.h>
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||||
|
||||
/**
|
||||
This interface conveys state information out of the Security (SEC) phase into PEI.
|
||||
|
||||
@param PeiServices Pointer to the PEI Services Table.
|
||||
@param StructureSize Pointer to the variable describing size of the input buffer.
|
||||
@param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
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||||
|
||||
@retval EFI_SUCCESS The data was successfully returned.
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||||
@retval EFI_BUFFER_TOO_SMALL The buffer was too small.
|
||||
|
||||
**/
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||||
EFI_STATUS
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EFIAPI
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||||
SecPlatformInformation (
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IN CONST EFI_PEI_SERVICES **PeiServices,
|
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IN OUT UINT64 *StructureSize,
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OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
|
||||
);
|
||||
|
||||
/**
|
||||
This interface conveys performance information out of the Security (SEC) phase into PEI.
|
||||
|
||||
This service is published by the SEC phase. The SEC phase handoff has an optional
|
||||
EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
|
||||
PEI Foundation. As such, if the platform supports collecting performance data in SEC,
|
||||
this information is encapsulated into the data structure abstracted by this service.
|
||||
This information is collected for the boot-strap processor (BSP) on IA-32.
|
||||
|
||||
@param[in] PeiServices The pointer to the PEI Services Table.
|
||||
@param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
|
||||
@param[out] Performance The pointer to performance data collected in SEC phase.
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||||
|
||||
@retval EFI_SUCCESS The data was successfully returned.
|
||||
|
||||
**/
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||||
EFI_STATUS
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||||
EFIAPI
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||||
SecGetPerformance (
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IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||
IN PEI_SEC_PERFORMANCE_PPI *This,
|
||||
OUT FIRMWARE_SEC_PERFORMANCE *Performance
|
||||
);
|
||||
|
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/**
|
||||
This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
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permanent memory.
|
||||
|
||||
@param PeiServices Pointer to the PEI Services Table.
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@param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
|
||||
Temporary RAM contents.
|
||||
@param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
|
||||
Temporary RAM contents.
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||||
@param CopySize Amount of memory to migrate from temporary to permanent memory.
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||||
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||||
@retval EFI_SUCCESS The data was successfully returned.
|
||||
@retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
|
||||
TemporaryMemoryBase > PermanentMemoryBase.
|
||||
|
||||
**/
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||||
EFI_STATUS
|
||||
EFIAPI
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||||
SecTemporaryRamSupport (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
|
||||
IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
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||||
IN UINTN CopySize
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||||
);
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EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = {
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||||
SecPlatformInformation
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||||
};
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||||
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PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {
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||||
SecGetPerformance
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||||
};
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EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {
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||||
SecTemporaryRamSupport
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};
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EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
|
||||
{
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||||
EFI_PEI_PPI_DESCRIPTOR_PPI,
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&gEfiSecPlatformInformationPpiGuid,
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&mSecPlatformInformationPpi
|
||||
},
|
||||
{
|
||||
EFI_PEI_PPI_DESCRIPTOR_PPI,
|
||||
&gPeiSecPerformancePpiGuid,
|
||||
&mSecPerformancePpi
|
||||
},
|
||||
{
|
||||
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
|
||||
&gEfiTemporaryRamSupportPpiGuid,
|
||||
&gSecTemporaryRamSupportPpi
|
||||
},
|
||||
};
|
||||
|
||||
/**
|
||||
A developer supplied function to perform platform specific operations.
|
||||
|
||||
It's a developer supplied function to perform any operations appropriate to a
|
||||
given platform. It's invoked just before passing control to PEI core by SEC
|
||||
core. Platform developer may modify the SecCoreData passed to PEI Core.
|
||||
It returns a platform specific PPI list that platform wishes to pass to PEI core.
|
||||
The Generic SEC core module will merge this list to join the final list passed to
|
||||
PEI core.
|
||||
|
||||
@param SecCoreData The same parameter as passing to PEI core. It
|
||||
could be overridden by this function.
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||||
|
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@return The platform specific PPI list to be passed to PEI core or
|
||||
NULL if there is no need of such platform specific PPI list.
|
||||
|
||||
**/
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EFI_PEI_PPI_DESCRIPTOR *
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EFIAPI
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||||
SecPlatformMain (
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IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
|
||||
)
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||||
{
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||||
EFI_PEI_PPI_DESCRIPTOR *PpiList;
|
||||
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||||
InitializeApicTimer (0, (UINT32) -1, TRUE, 5);
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||||
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PpiList = &mPeiSecPlatformPpi[0];
|
||||
|
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return PpiList;
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||||
}
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||||
@@ -0,0 +1,87 @@
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## @file
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||||
#
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||||
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php.
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
##
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Defines Section - statements that will be processed to create a Makefile.
|
||||
#
|
||||
################################################################################
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = SecPeiFspPlatformSecLibVlv2
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||||
FILE_GUID = 6653876C-F6A1-45BB-A027-20455093BC6D
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||||
MODULE_TYPE = SEC
|
||||
VERSION_STRING = 1.0
|
||||
LIBRARY_CLASS = FspPlatformSecLib
|
||||
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Sources Section - list of files that are required for the build to succeed.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[Sources]
|
||||
FspPlatformSecLibVlv2.c
|
||||
SecRamInitData.c
|
||||
SaveSecContext.c
|
||||
SecPlatformInformation.c
|
||||
SecGetPerformance.c
|
||||
SecTempRamSupport.c
|
||||
PlatformInit.c
|
||||
UartInit.c
|
||||
|
||||
[Sources.IA32]
|
||||
Ia32/SecEntry.asm
|
||||
Ia32/PeiCoreEntry.asm
|
||||
Ia32/AsmSaveSecContext.asm
|
||||
Ia32/Stack.asm
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Package Dependency Section - list of Package files that are required for
|
||||
# this module.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
MdeModulePkg/MdeModulePkg.dec
|
||||
UefiCpuPkg/UefiCpuPkg.dec
|
||||
IntelFspWrapperPkg/IntelFspWrapperPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
LocalApicLib
|
||||
SerialPortLib
|
||||
|
||||
[Ppis]
|
||||
gEfiSecPlatformInformationPpiGuid
|
||||
gPeiSecPerformancePpiGuid
|
||||
gEfiTemporaryRamSupportPpiGuid
|
||||
|
||||
[Pcd]
|
||||
gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
|
||||
|
||||
[FixedPcd]
|
||||
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress
|
||||
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize
|
||||
@@ -0,0 +1,51 @@
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Module Name:
|
||||
;
|
||||
; SecEntry.asm
|
||||
;
|
||||
; Abstract:
|
||||
;
|
||||
; This is the code that goes from real-mode to protected mode.
|
||||
; It consumes the reset vector, calls two basic APIs from FSP binary.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.686p
|
||||
.xmm
|
||||
.model flat,c
|
||||
.code
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
; MMX Usage:
|
||||
; MM0 = BIST State
|
||||
; MM5 = Save time-stamp counter value high32bit
|
||||
; MM6 = Save time-stamp counter value low32bit.
|
||||
;
|
||||
; It should be same as SecEntry.asm and PeiCoreEntry.asm.
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
AsmSaveBistValue PROC PUBLIC
|
||||
mov eax, [esp+4]
|
||||
movd mm0, eax
|
||||
ret
|
||||
AsmSaveBistValue ENDP
|
||||
|
||||
AsmSaveTickerValue PROC PUBLIC
|
||||
mov eax, [esp+4]
|
||||
movd mm6, eax
|
||||
mov eax, [esp+8]
|
||||
movd mm5, eax
|
||||
ret
|
||||
AsmSaveTickerValue ENDP
|
||||
|
||||
END
|
||||
@@ -0,0 +1,51 @@
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Module Name:
|
||||
;
|
||||
; Fsp.inc
|
||||
;
|
||||
; Abstract:
|
||||
;
|
||||
; Fsp related definitions
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
|
||||
;
|
||||
; Fv Header
|
||||
;
|
||||
FVH_SIGINATURE_OFFSET EQU 028h
|
||||
FVH_SIGINATURE_VALID_VALUE EQU 04856465Fh ; valid signature:_FVH
|
||||
FVH_HEADER_LENGTH_OFFSET EQU 030h
|
||||
FVH_EXTHEADER_OFFSET_OFFSET EQU 034h
|
||||
FVH_EXTHEADER_SIZE_OFFSET EQU 010h
|
||||
|
||||
;
|
||||
; Ffs Header
|
||||
;
|
||||
FSP_HEADER_GUID_DWORD1 EQU 0912740BEh
|
||||
FSP_HEADER_GUID_DWORD2 EQU 047342284h
|
||||
FSP_HEADER_GUID_DWORD3 EQU 0B08471B9h
|
||||
FSP_HEADER_GUID_DWORD4 EQU 00C3F3527h
|
||||
FFS_HEADER_SIZE_VALUE EQU 018h
|
||||
|
||||
;
|
||||
; Section Header
|
||||
;
|
||||
SECTION_HEADER_TYPE_OFFSET EQU 03h
|
||||
RAW_SECTION_HEADER_SIZE_VALUE EQU 04h
|
||||
|
||||
;
|
||||
; Fsp Header
|
||||
;
|
||||
FSP_HEADER_IMAGEBASE_OFFSET EQU 01Ch
|
||||
FSP_HEADER_TEMPRAMINIT_OFFSET EQU 030h
|
||||
@@ -0,0 +1,141 @@
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Module Name:
|
||||
;
|
||||
; SecEntry.asm
|
||||
;
|
||||
; Abstract:
|
||||
;
|
||||
; This is the code that goes from real-mode to protected mode.
|
||||
; It consumes the reset vector, calls two basic APIs from FSP binary.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.686p
|
||||
.xmm
|
||||
.model flat, c
|
||||
.code
|
||||
|
||||
EXTRN SecStartup:NEAR
|
||||
EXTRN PlatformInit:NEAR
|
||||
|
||||
CallPeiCoreEntryPoint PROC PUBLIC
|
||||
;
|
||||
; Obtain the hob list pointer
|
||||
;
|
||||
mov eax, [esp+4]
|
||||
;
|
||||
; Obtain the stack information
|
||||
; ECX: start of range
|
||||
; EDX: end of range
|
||||
;
|
||||
mov ecx, [esp+8]
|
||||
mov edx, [esp+0Ch]
|
||||
|
||||
;
|
||||
; Platform init
|
||||
;
|
||||
pushad
|
||||
push edx
|
||||
push ecx
|
||||
push eax
|
||||
call PlatformInit
|
||||
pop eax
|
||||
pop eax
|
||||
pop eax
|
||||
popad
|
||||
|
||||
;
|
||||
; Set stack top pointer
|
||||
;
|
||||
mov esp, edx
|
||||
|
||||
;
|
||||
; Push the hob list pointer
|
||||
;
|
||||
push eax
|
||||
|
||||
;
|
||||
; Save the value
|
||||
; ECX: start of range
|
||||
; EDX: end of range
|
||||
;
|
||||
mov ebp, esp
|
||||
push ecx
|
||||
push edx
|
||||
|
||||
;
|
||||
; Push processor count to stack first, then BIST status (AP then BSP)
|
||||
;
|
||||
mov eax, 1
|
||||
cpuid
|
||||
shr ebx, 16
|
||||
and ebx, 0000000FFh
|
||||
cmp bl, 1
|
||||
jae PushProcessorCount
|
||||
|
||||
;
|
||||
; Some processors report 0 logical processors. Effectively 0 = 1.
|
||||
; So we fix up the processor count
|
||||
;
|
||||
inc ebx
|
||||
|
||||
PushProcessorCount:
|
||||
push ebx
|
||||
|
||||
;
|
||||
; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
|
||||
; for all processor threads
|
||||
;
|
||||
xor ecx, ecx
|
||||
mov cl, bl
|
||||
PushBist:
|
||||
movd eax, mm0
|
||||
push eax
|
||||
loop PushBist
|
||||
|
||||
; Save Time-Stamp Counter
|
||||
movd eax, mm5
|
||||
push eax
|
||||
|
||||
movd eax, mm6
|
||||
push eax
|
||||
|
||||
;
|
||||
; Pass entry point of the PEI core
|
||||
;
|
||||
mov edi, 0FFFFFFE0h
|
||||
push DWORD PTR ds:[edi]
|
||||
|
||||
;
|
||||
; Pass BFV into the PEI Core
|
||||
;
|
||||
mov edi, 0FFFFFFFCh
|
||||
push DWORD PTR ds:[edi]
|
||||
|
||||
;
|
||||
; Pass stack size into the PEI Core
|
||||
;
|
||||
mov ecx, [ebp - 4]
|
||||
mov edx, [ebp - 8]
|
||||
push ecx ; RamBase
|
||||
|
||||
sub edx, ecx
|
||||
push edx ; RamSize
|
||||
|
||||
;
|
||||
; Pass Control into the PEI Core
|
||||
;
|
||||
call SecStartup
|
||||
CallPeiCoreEntryPoint ENDP
|
||||
|
||||
END
|
||||
@@ -0,0 +1,344 @@
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Module Name:
|
||||
;
|
||||
; SecEntry.asm
|
||||
;
|
||||
; Abstract:
|
||||
;
|
||||
; This is the code that goes from real-mode to protected mode.
|
||||
; It consumes the reset vector, calls two basic APIs from FSP binary.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
INCLUDE Fsp.inc
|
||||
|
||||
.686p
|
||||
.xmm
|
||||
.model small, c
|
||||
|
||||
EXTRN CallPeiCoreEntryPoint:NEAR
|
||||
EXTRN TempRamInitParams:FAR
|
||||
|
||||
; Pcds
|
||||
EXTRN PcdGet32 (PcdFlashFvFspBase):DWORD
|
||||
EXTRN PcdGet32 (PcdFlashFvFspSize):DWORD
|
||||
|
||||
_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
|
||||
ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
;
|
||||
; Procedure: _ModuleEntryPoint
|
||||
;
|
||||
; Input: None
|
||||
;
|
||||
; Output: None
|
||||
;
|
||||
; Destroys: Assume all registers
|
||||
;
|
||||
; Description:
|
||||
;
|
||||
; Transition to non-paged flat-model protected mode from a
|
||||
; hard-coded GDT that provides exactly two descriptors.
|
||||
; This is a bare bones transition to protected mode only
|
||||
; used for a while in PEI and possibly DXE.
|
||||
;
|
||||
; After enabling protected mode, a far jump is executed to
|
||||
; transfer to PEI using the newly loaded GDT.
|
||||
;
|
||||
; Return: None
|
||||
;
|
||||
; MMX Usage:
|
||||
; MM0 = BIST State
|
||||
; MM5 = Save time-stamp counter value high32bit
|
||||
; MM6 = Save time-stamp counter value low32bit.
|
||||
;
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
align 4
|
||||
_ModuleEntryPoint PROC NEAR C PUBLIC
|
||||
fninit ; clear any pending Floating point exceptions
|
||||
;
|
||||
; Store the BIST value in mm0
|
||||
;
|
||||
movd mm0, eax
|
||||
|
||||
;
|
||||
; Save time-stamp counter value
|
||||
; rdtsc load 64bit time-stamp counter to EDX:EAX
|
||||
;
|
||||
rdtsc
|
||||
movd mm5, edx
|
||||
movd mm6, eax
|
||||
|
||||
;
|
||||
; Load the GDT table in GdtDesc
|
||||
;
|
||||
mov esi, OFFSET GdtDesc
|
||||
DB 66h
|
||||
lgdt fword ptr cs:[si]
|
||||
|
||||
;
|
||||
; Transition to 16 bit protected mode
|
||||
;
|
||||
mov eax, cr0 ; Get control register 0
|
||||
or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)
|
||||
mov cr0, eax ; Activate protected mode
|
||||
|
||||
mov eax, cr4 ; Get control register 4
|
||||
or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
|
||||
mov cr4, eax
|
||||
|
||||
;
|
||||
; Now we're in 16 bit protected mode
|
||||
; Set up the selectors for 32 bit protected mode entry
|
||||
;
|
||||
mov ax, SYS_DATA_SEL
|
||||
mov ds, ax
|
||||
mov es, ax
|
||||
mov fs, ax
|
||||
mov gs, ax
|
||||
mov ss, ax
|
||||
|
||||
;
|
||||
; Transition to Flat 32 bit protected mode
|
||||
; The jump to a far pointer causes the transition to 32 bit mode
|
||||
;
|
||||
mov esi, offset ProtectedModeEntryLinearAddress
|
||||
jmp fword ptr cs:[si]
|
||||
|
||||
_ModuleEntryPoint ENDP
|
||||
_TEXT_REALMODE ENDS
|
||||
|
||||
_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'
|
||||
ASSUME CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
;
|
||||
; Procedure: ProtectedModeEntryPoint
|
||||
;
|
||||
; Input: None
|
||||
;
|
||||
; Output: None
|
||||
;
|
||||
; Destroys: Assume all registers
|
||||
;
|
||||
; Description:
|
||||
;
|
||||
; This function handles:
|
||||
; Call two basic APIs from FSP binary
|
||||
; Initializes stack with some early data (BIST, PEI entry, etc)
|
||||
;
|
||||
; Return: None
|
||||
;
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
align 4
|
||||
ProtectedModeEntryPoint PROC NEAR PUBLIC
|
||||
|
||||
; Find the fsp info header
|
||||
mov edi, PcdGet32 (PcdFlashFvFspBase)
|
||||
mov ecx, PcdGet32 (PcdFlashFvFspSize)
|
||||
|
||||
mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
|
||||
cmp eax, FVH_SIGINATURE_VALID_VALUE
|
||||
jnz FspHeaderNotFound
|
||||
|
||||
xor eax, eax
|
||||
mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
|
||||
cmp ax, 0
|
||||
jnz FspFvExtHeaderExist
|
||||
|
||||
xor eax, eax
|
||||
mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
|
||||
add edi, eax
|
||||
jmp FspCheckFfsHeader
|
||||
|
||||
FspFvExtHeaderExist:
|
||||
add edi, eax
|
||||
mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
|
||||
add edi, eax
|
||||
|
||||
; Round up to 8 byte alignment
|
||||
mov eax, edi
|
||||
and al, 07h
|
||||
jz FspCheckFfsHeader
|
||||
|
||||
and edi, 0FFFFFFF8h
|
||||
add edi, 08h
|
||||
|
||||
FspCheckFfsHeader:
|
||||
; Check the ffs guid
|
||||
mov eax, dword ptr [edi]
|
||||
cmp eax, FSP_HEADER_GUID_DWORD1
|
||||
jnz FspHeaderNotFound
|
||||
|
||||
mov eax, dword ptr [edi + 4]
|
||||
cmp eax, FSP_HEADER_GUID_DWORD2
|
||||
jnz FspHeaderNotFound
|
||||
|
||||
mov eax, dword ptr [edi + 8]
|
||||
cmp eax, FSP_HEADER_GUID_DWORD3
|
||||
jnz FspHeaderNotFound
|
||||
|
||||
mov eax, dword ptr [edi + 0Ch]
|
||||
cmp eax, FSP_HEADER_GUID_DWORD4
|
||||
jnz FspHeaderNotFound
|
||||
|
||||
add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
|
||||
|
||||
; Check the section type as raw section
|
||||
mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
|
||||
cmp al, 019h
|
||||
jnz FspHeaderNotFound
|
||||
|
||||
add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
|
||||
jmp FspHeaderFound
|
||||
|
||||
FspHeaderNotFound:
|
||||
jmp $
|
||||
|
||||
FspHeaderFound:
|
||||
; Get the fsp TempRamInit Api address
|
||||
mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
|
||||
add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
|
||||
|
||||
; Setup the hardcode stack
|
||||
mov esp, OFFSET TempRamInitStack
|
||||
|
||||
; Call the fsp TempRamInit Api
|
||||
jmp eax
|
||||
|
||||
TempRamInitDone:
|
||||
cmp eax, 0
|
||||
jnz FspApiFailed
|
||||
|
||||
; ECX: start of range
|
||||
; EDX: end of range
|
||||
mov esp, edx
|
||||
push edx
|
||||
push ecx
|
||||
push eax ; zero - no hob list yet
|
||||
call CallPeiCoreEntryPoint
|
||||
|
||||
FspApiFailed:
|
||||
jmp $
|
||||
|
||||
align 10h
|
||||
TempRamInitStack:
|
||||
DD OFFSET TempRamInitDone
|
||||
DD OFFSET TempRamInitParams
|
||||
|
||||
ProtectedModeEntryPoint ENDP
|
||||
|
||||
;
|
||||
; ROM-based Global-Descriptor Table for the Tiano PEI Phase
|
||||
;
|
||||
align 16
|
||||
PUBLIC BootGdtTable
|
||||
|
||||
;
|
||||
; GDT[0]: 0x00: Null entry, never used.
|
||||
;
|
||||
NULL_SEL EQU $ - GDT_BASE ; Selector [0]
|
||||
GDT_BASE:
|
||||
BootGdtTable DD 0
|
||||
DD 0
|
||||
;
|
||||
; Linear data segment descriptor
|
||||
;
|
||||
LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]
|
||||
DW 0FFFFh ; limit 0xFFFFF
|
||||
DW 0 ; base 0
|
||||
DB 0
|
||||
DB 092h ; present, ring 0, data, expand-up, writable
|
||||
DB 0CFh ; page-granular, 32-bit
|
||||
DB 0
|
||||
;
|
||||
; Linear code segment descriptor
|
||||
;
|
||||
LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]
|
||||
DW 0FFFFh ; limit 0xFFFFF
|
||||
DW 0 ; base 0
|
||||
DB 0
|
||||
DB 09Bh ; present, ring 0, data, expand-up, not-writable
|
||||
DB 0CFh ; page-granular, 32-bit
|
||||
DB 0
|
||||
;
|
||||
; System data segment descriptor
|
||||
;
|
||||
SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]
|
||||
DW 0FFFFh ; limit 0xFFFFF
|
||||
DW 0 ; base 0
|
||||
DB 0
|
||||
DB 093h ; present, ring 0, data, expand-up, not-writable
|
||||
DB 0CFh ; page-granular, 32-bit
|
||||
DB 0
|
||||
|
||||
;
|
||||
; System code segment descriptor
|
||||
;
|
||||
SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]
|
||||
DW 0FFFFh ; limit 0xFFFFF
|
||||
DW 0 ; base 0
|
||||
DB 0
|
||||
DB 09Ah ; present, ring 0, data, expand-up, writable
|
||||
DB 0CFh ; page-granular, 32-bit
|
||||
DB 0
|
||||
;
|
||||
; Spare segment descriptor
|
||||
;
|
||||
SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]
|
||||
DW 0FFFFh ; limit 0xFFFFF
|
||||
DW 0 ; base 0
|
||||
DB 0Eh ; Changed from F000 to E000.
|
||||
DB 09Bh ; present, ring 0, code, expand-up, writable
|
||||
DB 00h ; byte-granular, 16-bit
|
||||
DB 0
|
||||
;
|
||||
; Spare segment descriptor
|
||||
;
|
||||
SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]
|
||||
DW 0FFFFh ; limit 0xFFFF
|
||||
DW 0 ; base 0
|
||||
DB 0
|
||||
DB 093h ; present, ring 0, data, expand-up, not-writable
|
||||
DB 00h ; byte-granular, 16-bit
|
||||
DB 0
|
||||
|
||||
;
|
||||
; Spare segment descriptor
|
||||
;
|
||||
SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]
|
||||
DW 0 ; limit 0
|
||||
DW 0 ; base 0
|
||||
DB 0
|
||||
DB 0 ; present, ring 0, data, expand-up, writable
|
||||
DB 0 ; page-granular, 32-bit
|
||||
DB 0
|
||||
GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes
|
||||
|
||||
;
|
||||
; GDT Descriptor
|
||||
;
|
||||
GdtDesc: ; GDT descriptor
|
||||
DW GDT_SIZE - 1 ; GDT limit
|
||||
DD OFFSET BootGdtTable ; GDT base address
|
||||
|
||||
|
||||
ProtectedModeEntryLinearAddress LABEL FWORD
|
||||
ProtectedModeEntryLinearOffset LABEL DWORD
|
||||
DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code
|
||||
DW LINEAR_CODE_SEL
|
||||
|
||||
_TEXT_PROTECTED_MODE ENDS
|
||||
END
|
||||
@@ -0,0 +1,77 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php.
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
# Abstract:
|
||||
#
|
||||
# Switch the stack from temporary memory to permenent memory.
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#------------------------------------------------------------------------------
|
||||
# VOID
|
||||
# EFIAPI
|
||||
# SecSwitchStack (
|
||||
# UINT32 TemporaryMemoryBase,
|
||||
# UINT32 PermenentMemoryBase
|
||||
# )#
|
||||
#------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX (SecSwitchStack)
|
||||
ASM_PFX(SecSwitchStack):
|
||||
#
|
||||
# Save standard registers so they can be used to change stack
|
||||
#
|
||||
pushl %eax
|
||||
pushl %ebx
|
||||
pushl %ecx
|
||||
pushl %edx
|
||||
|
||||
#
|
||||
# !!CAUTION!! this function address's is pushed into stack after
|
||||
# migration of whole temporary memory, so need save it to permenent
|
||||
# memory at first!
|
||||
#
|
||||
movl 20(%esp), %ebx # Save the first parameter
|
||||
movl 24(%esp), %ecx # Save the second parameter
|
||||
|
||||
#
|
||||
# Save this function's return address into permenent memory at first.
|
||||
# Then, Fixup the esp point to permenent memory
|
||||
#
|
||||
movl %esp, %eax
|
||||
subl %ebx, %eax
|
||||
addl %ecx, %eax
|
||||
movl 0(%esp), %edx # copy pushed register's value to permenent memory
|
||||
movl %edx, 0(%eax)
|
||||
movl 4(%esp), %edx
|
||||
movl %edx, 4(%eax)
|
||||
movl 8(%esp), %edx
|
||||
movl %edx, 8(%eax)
|
||||
movl 12(%esp), %edx
|
||||
movl %edx, 12(%eax)
|
||||
movl 16(%esp), %edx # Update this function's return address into permenent memory
|
||||
movl %edx, 16(%eax)
|
||||
movl %eax, %esp # From now, esp is pointed to permenent memory
|
||||
|
||||
#
|
||||
# Fixup the ebp point to permenent memory
|
||||
#
|
||||
movl %ebp, %eax
|
||||
subl %ebx, %eax
|
||||
addl %ecx, %eax
|
||||
movl %eax, %ebp # From now, ebp is pointed to permenent memory
|
||||
|
||||
popl %edx
|
||||
popl %ecx
|
||||
popl %ebx
|
||||
popl %eax
|
||||
ret
|
||||
|
||||
@@ -0,0 +1,82 @@
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
; This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Abstract:
|
||||
;
|
||||
; Switch the stack from temporary memory to permenent memory.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.586p
|
||||
.model flat,C
|
||||
.code
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; EFIAPI
|
||||
; SecSwitchStack (
|
||||
; UINT32 TemporaryMemoryBase,
|
||||
; UINT32 PermenentMemoryBase
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
SecSwitchStack PROC
|
||||
;
|
||||
; Save three register: eax, ebx, ecx
|
||||
;
|
||||
push eax
|
||||
push ebx
|
||||
push ecx
|
||||
push edx
|
||||
|
||||
;
|
||||
; !!CAUTION!! this function address's is pushed into stack after
|
||||
; migration of whole temporary memory, so need save it to permenent
|
||||
; memory at first!
|
||||
;
|
||||
|
||||
mov ebx, [esp + 20] ; Save the first parameter
|
||||
mov ecx, [esp + 24] ; Save the second parameter
|
||||
|
||||
;
|
||||
; Save this function's return address into permenent memory at first.
|
||||
; Then, Fixup the esp point to permenent memory
|
||||
;
|
||||
mov eax, esp
|
||||
sub eax, ebx
|
||||
add eax, ecx
|
||||
mov edx, dword ptr [esp] ; copy pushed register's value to permenent memory
|
||||
mov dword ptr [eax], edx
|
||||
mov edx, dword ptr [esp + 4]
|
||||
mov dword ptr [eax + 4], edx
|
||||
mov edx, dword ptr [esp + 8]
|
||||
mov dword ptr [eax + 8], edx
|
||||
mov edx, dword ptr [esp + 12]
|
||||
mov dword ptr [eax + 12], edx
|
||||
mov edx, dword ptr [esp + 16] ; Update this function's return address into permenent memory
|
||||
mov dword ptr [eax + 16], edx
|
||||
mov esp, eax ; From now, esp is pointed to permenent memory
|
||||
|
||||
;
|
||||
; Fixup the ebp point to permenent memory
|
||||
;
|
||||
mov eax, ebp
|
||||
sub eax, ebx
|
||||
add eax, ecx
|
||||
mov ebp, eax ; From now, ebp is pointed to permenent memory
|
||||
|
||||
pop edx
|
||||
pop ecx
|
||||
pop ebx
|
||||
pop eax
|
||||
ret
|
||||
SecSwitchStack ENDP
|
||||
|
||||
END
|
||||
@@ -0,0 +1,42 @@
|
||||
/** @file
|
||||
This PEIM will parse the hoblist from fsp and report them into pei core.
|
||||
This file contains the main entrypoint of the PEIM.
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
|
||||
#include <PiPei.h>
|
||||
#include <Library\DebugLib.h>
|
||||
#include <Library\SerialPortLib.h>
|
||||
|
||||
VOID EnableInternalUart ();
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
PlatformInit (
|
||||
IN VOID *FspHobList,
|
||||
IN VOID *StartOfRange,
|
||||
IN VOID *EndOfRange
|
||||
)
|
||||
{
|
||||
//
|
||||
// Platform initialization
|
||||
// Enable Serial port here
|
||||
//
|
||||
EnableInternalUart ();
|
||||
SerialPortInitialize ();
|
||||
|
||||
DEBUG ((DEBUG_INFO, "PlatformInit\n"));
|
||||
DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
|
||||
DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
|
||||
DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
|
||||
}
|
||||
@@ -0,0 +1,114 @@
|
||||
/** @file
|
||||
This PEIM will parse the hoblist from fsp and report them into pei core.
|
||||
This file contains the main entrypoint of the PEIM.
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
|
||||
#include <PiPei.h>
|
||||
#include <Library/DebugLib.h>
|
||||
|
||||
#include <Ppi/TopOfTemporaryRam.h>
|
||||
#include <Ppi/SecPlatformInformation.h>
|
||||
|
||||
/**
|
||||
Save BIST value before call FspInit.
|
||||
|
||||
@param Bist BIST value.
|
||||
**/
|
||||
VOID
|
||||
AsmSaveBistValue (
|
||||
IN UINT32 Bist
|
||||
);
|
||||
|
||||
/**
|
||||
Save Ticker value before call FspInit.
|
||||
|
||||
@param Ticker Ticker value.
|
||||
**/
|
||||
VOID
|
||||
AsmSaveTickerValue (
|
||||
IN UINT64 Ticker
|
||||
);
|
||||
|
||||
/**
|
||||
Save SEC context before call FspInit.
|
||||
|
||||
@param PeiServices Pointer to PEI Services Table.
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
SaveSecContext (
|
||||
IN CONST EFI_PEI_SERVICES **PeiServices
|
||||
)
|
||||
{
|
||||
UINT32 *Bist;
|
||||
UINT64 *Ticker;
|
||||
UINT32 Size;
|
||||
UINT32 Count;
|
||||
UINT32 TopOfTemporaryRam;
|
||||
VOID *TopOfTemporaryRamPpi;
|
||||
EFI_STATUS Status;
|
||||
|
||||
DEBUG ((DEBUG_INFO, "SaveSecContext - 0x%x\n", PeiServices));
|
||||
|
||||
Status = (*PeiServices)->LocatePpi (
|
||||
PeiServices,
|
||||
&gTopOfTemporaryRamPpiGuid,
|
||||
0,
|
||||
NULL,
|
||||
(VOID **) &TopOfTemporaryRamPpi
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return ;
|
||||
}
|
||||
|
||||
DEBUG ((DEBUG_INFO, "TopOfTemporaryRamPpi - 0x%x\n", TopOfTemporaryRamPpi));
|
||||
|
||||
//
|
||||
// The entries of BIST information, together with the number of them,
|
||||
// reside in the bottom of stack, left untouched by normal stack operation.
|
||||
// This routine copies the BIST information to the buffer pointed by
|
||||
// PlatformInformationRecord for output.
|
||||
//
|
||||
// |--------------| <- TopOfTemporaryRam
|
||||
// |Number of BSPs|
|
||||
// |--------------|
|
||||
// | BIST |
|
||||
// |--------------|
|
||||
// | .... |
|
||||
// |--------------|
|
||||
// | TSC[63:32] |
|
||||
// |--------------|
|
||||
// | TSC[31:00] |
|
||||
// |--------------|
|
||||
//
|
||||
|
||||
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
|
||||
TopOfTemporaryRam -= sizeof(UINT32) * 2;
|
||||
DEBUG ((DEBUG_INFO, "TopOfTemporaryRam - 0x%x\n", TopOfTemporaryRam));
|
||||
Count = *(UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32));
|
||||
DEBUG ((DEBUG_INFO, "Count - 0x%x\n", Count));
|
||||
Size = Count * sizeof (IA32_HANDOFF_STATUS);
|
||||
DEBUG ((DEBUG_INFO, "Size - 0x%x\n", Size));
|
||||
|
||||
Bist = (UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size);
|
||||
DEBUG ((DEBUG_INFO, "Bist - 0x%x\n", *Bist));
|
||||
Ticker = (UINT64 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size - sizeof(UINT64));
|
||||
DEBUG ((DEBUG_INFO, "Ticker - 0x%lx\n", *Ticker));
|
||||
|
||||
//
|
||||
// Just need record BSP
|
||||
//
|
||||
AsmSaveBistValue (*Bist);
|
||||
AsmSaveTickerValue (*Ticker);
|
||||
}
|
||||
@@ -0,0 +1,89 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include <PiPei.h>
|
||||
|
||||
#include <Ppi/SecPerformance.h>
|
||||
#include <Ppi/TopOfTemporaryRam.h>
|
||||
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/TimerLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
|
||||
/**
|
||||
This interface conveys performance information out of the Security (SEC) phase into PEI.
|
||||
|
||||
This service is published by the SEC phase. The SEC phase handoff has an optional
|
||||
EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
|
||||
PEI Foundation. As such, if the platform supports collecting performance data in SEC,
|
||||
this information is encapsulated into the data structure abstracted by this service.
|
||||
This information is collected for the boot-strap processor (BSP) on IA-32.
|
||||
|
||||
@param[in] PeiServices The pointer to the PEI Services Table.
|
||||
@param[in] This The pointer to this instance of the PEI_SEC_PERFORMANCE_PPI.
|
||||
@param[out] Performance The pointer to performance data collected in SEC phase.
|
||||
|
||||
@retval EFI_SUCCESS The data was successfully returned.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SecGetPerformance (
|
||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||
IN PEI_SEC_PERFORMANCE_PPI *This,
|
||||
OUT FIRMWARE_SEC_PERFORMANCE *Performance
|
||||
)
|
||||
{
|
||||
UINT32 Size;
|
||||
UINT32 Count;
|
||||
UINT32 TopOfTemporaryRam;
|
||||
UINT64 Ticker;
|
||||
VOID *TopOfTemporaryRamPpi;
|
||||
EFI_STATUS Status;
|
||||
|
||||
DEBUG ((DEBUG_INFO, "SecGetPerformance\n"));
|
||||
|
||||
Status = (*PeiServices)->LocatePpi (
|
||||
PeiServices,
|
||||
&gTopOfTemporaryRamPpiGuid,
|
||||
0,
|
||||
NULL,
|
||||
(VOID **) &TopOfTemporaryRamPpi
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return EFI_NOT_FOUND;
|
||||
}
|
||||
|
||||
//
|
||||
// |--------------| <- TopOfTemporaryRam
|
||||
// |Number of BSPs|
|
||||
// |--------------|
|
||||
// | BIST |
|
||||
// |--------------|
|
||||
// | .... |
|
||||
// |--------------|
|
||||
// | TSC[63:32] |
|
||||
// |--------------|
|
||||
// | TSC[31:00] |
|
||||
// |--------------|
|
||||
//
|
||||
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
|
||||
TopOfTemporaryRam -= sizeof(UINT32) * 2;
|
||||
Count = *(UINT32 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32));
|
||||
Size = Count * sizeof (UINT64);
|
||||
|
||||
Ticker = *(UINT64 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32) - Size - sizeof (UINT32) * 2);
|
||||
Performance->ResetEnd = GetTimeInNanoSecond (Ticker);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,83 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials are licensed and
|
||||
made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include <PiPei.h>
|
||||
|
||||
#include <Ppi/SecPlatformInformation.h>
|
||||
#include <Ppi/TopOfTemporaryRam.h>
|
||||
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
|
||||
/**
|
||||
This interface conveys state information out of the Security (SEC) phase into PEI.
|
||||
|
||||
@param PeiServices Pointer to the PEI Services Table.
|
||||
@param StructureSize Pointer to the variable describing size of the input buffer.
|
||||
@param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
|
||||
|
||||
@retval EFI_SUCCESS The data was successfully returned.
|
||||
@retval EFI_BUFFER_TOO_SMALL The buffer was too small.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SecPlatformInformation (
|
||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||
IN OUT UINT64 *StructureSize,
|
||||
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
|
||||
)
|
||||
{
|
||||
UINT32 *Bist;
|
||||
UINT32 Size;
|
||||
UINT32 Count;
|
||||
UINT32 TopOfTemporaryRam;
|
||||
VOID *TopOfTemporaryRamPpi;
|
||||
EFI_STATUS Status;
|
||||
|
||||
DEBUG ((DEBUG_INFO, "SecPlatformInformation\n"));
|
||||
|
||||
Status = (*PeiServices)->LocatePpi (
|
||||
PeiServices,
|
||||
&gTopOfTemporaryRamPpiGuid,
|
||||
0,
|
||||
NULL,
|
||||
(VOID **) &TopOfTemporaryRamPpi
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return EFI_NOT_FOUND;
|
||||
}
|
||||
|
||||
//
|
||||
// The entries of BIST information, together with the number of them,
|
||||
// reside in the bottom of stack, left untouched by normal stack operation.
|
||||
// This routine copies the BIST information to the buffer pointed by
|
||||
// PlatformInformationRecord for output.
|
||||
//
|
||||
TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof (UINT32);
|
||||
TopOfTemporaryRam -= sizeof(UINT32) * 2;
|
||||
Count = *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof (UINT32)));
|
||||
Size = Count * sizeof (IA32_HANDOFF_STATUS);
|
||||
|
||||
if ((*StructureSize) < (UINT64) Size) {
|
||||
*StructureSize = Size;
|
||||
return EFI_BUFFER_TOO_SMALL;
|
||||
}
|
||||
|
||||
*StructureSize = Size;
|
||||
Bist = (UINT32 *) (TopOfTemporaryRam - sizeof (UINT32) - Size);
|
||||
|
||||
CopyMem (PlatformInformationRecord, Bist, Size);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,22 @@
|
||||
/** @file
|
||||
Calling Fsp Apis in SEC
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials are licensed and made
|
||||
available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include <Library/PcdLib.h>
|
||||
|
||||
GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT32 TempRamInitParams[4] = {
|
||||
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicroCodeOffset)),
|
||||
((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicroCodeOffset)),
|
||||
FixedPcdGet32 (PcdFlashCodeCacheAddress),
|
||||
FixedPcdGet32 (PcdFlashCodeCacheSize)
|
||||
};
|
||||
@@ -0,0 +1,155 @@
|
||||
/** @file
|
||||
C functions in SEC
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials are licensed and made
|
||||
available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include <PiPei.h>
|
||||
|
||||
#include <Ppi/TemporaryRamSupport.h>
|
||||
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/DebugAgentLib.h>
|
||||
|
||||
/**
|
||||
Switch the stack in the temporary memory to the one in the permanent memory.
|
||||
|
||||
This function must be invoked after the memory migration immediately. The relative
|
||||
position of the stack in the temporary and permanent memory is same.
|
||||
|
||||
@param TemporaryMemoryBase Base address of the temporary memory.
|
||||
@param PermenentMemoryBase Base address of the permanent memory.
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
SecSwitchStack (
|
||||
UINT32 TemporaryMemoryBase,
|
||||
UINT32 PermenentMemoryBase
|
||||
);
|
||||
|
||||
/**
|
||||
This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
|
||||
permanent memory.
|
||||
|
||||
@param PeiServices Pointer to the PEI Services Table.
|
||||
@param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
|
||||
Temporary RAM contents.
|
||||
@param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
|
||||
Temporary RAM contents.
|
||||
@param CopySize Amount of memory to migrate from temporary to permanent memory.
|
||||
|
||||
@retval EFI_SUCCESS The data was successfully returned.
|
||||
@retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
|
||||
TemporaryMemoryBase > PermanentMemoryBase.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SecTemporaryRamSupport (
|
||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||
IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
|
||||
IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
|
||||
IN UINTN CopySize
|
||||
)
|
||||
{
|
||||
IA32_DESCRIPTOR IdtDescriptor;
|
||||
VOID* OldHeap;
|
||||
VOID* NewHeap;
|
||||
VOID* OldStack;
|
||||
VOID* NewStack;
|
||||
DEBUG_AGENT_CONTEXT_POSTMEM_SEC DebugAgentContext;
|
||||
BOOLEAN OldStatus;
|
||||
UINTN PeiStackSize;
|
||||
|
||||
PeiStackSize = (UINTN)PcdGet32 (PcdPeiTemporaryRamStackSize);
|
||||
if (PeiStackSize == 0) {
|
||||
PeiStackSize = (CopySize >> 1);
|
||||
}
|
||||
|
||||
ASSERT (PeiStackSize < CopySize);
|
||||
|
||||
//
|
||||
// |-------------------|---->
|
||||
// | Stack | PeiStackSize
|
||||
// |-------------------|---->
|
||||
// | Heap | PeiTemporayRamSize
|
||||
// |-------------------|----> TempRamBase
|
||||
//
|
||||
// |-------------------|---->
|
||||
// | Heap | PeiTemporayRamSize
|
||||
// |-------------------|---->
|
||||
// | Stack | PeiStackSize
|
||||
// |-------------------|----> PermanentMemoryBase
|
||||
//
|
||||
|
||||
OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
|
||||
NewHeap = (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize);
|
||||
|
||||
OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize - PeiStackSize);
|
||||
NewStack = (VOID*)(UINTN)PermanentMemoryBase;
|
||||
|
||||
DebugAgentContext.HeapMigrateOffset = (UINTN)NewHeap - (UINTN)OldHeap;
|
||||
DebugAgentContext.StackMigrateOffset = (UINTN)NewStack - (UINTN)OldStack;
|
||||
|
||||
OldStatus = SaveAndSetDebugTimerInterrupt (FALSE);
|
||||
|
||||
//
|
||||
// Initialize Debug Agent to support source level debug in PEI phase after memory ready.
|
||||
// It will build HOB and fix up the pointer in IDT table.
|
||||
//
|
||||
InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *) &DebugAgentContext, NULL);
|
||||
|
||||
//
|
||||
// Migrate Heap
|
||||
//
|
||||
CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize);
|
||||
|
||||
//
|
||||
// Migrate Stack
|
||||
//
|
||||
CopyMem (NewStack, OldStack, PeiStackSize);
|
||||
|
||||
|
||||
//
|
||||
// We need *not* fix the return address because currently,
|
||||
// The PeiCore is executed in flash.
|
||||
//
|
||||
|
||||
//
|
||||
// Rebase IDT table in permanent memory
|
||||
//
|
||||
AsmReadIdtr (&IdtDescriptor);
|
||||
IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;
|
||||
|
||||
AsmWriteIdtr (&IdtDescriptor);
|
||||
|
||||
|
||||
//
|
||||
// Program MTRR
|
||||
//
|
||||
|
||||
//
|
||||
// SecSwitchStack function must be invoked after the memory migration
|
||||
// immediatly, also we need fixup the stack change caused by new call into
|
||||
// permenent memory.
|
||||
//
|
||||
SecSwitchStack (
|
||||
(UINT32) (UINTN) OldStack,
|
||||
(UINT32) (UINTN) NewStack
|
||||
);
|
||||
|
||||
SaveAndSetDebugTimerInterrupt (OldStatus);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,198 @@
|
||||
/** @file
|
||||
This PEIM will parse the hoblist from fsp and report them into pei core.
|
||||
This file contains the main entrypoint of the PEIM.
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
|
||||
#include <PiPei.h>
|
||||
#include <Library\IoLib.h>
|
||||
#include <Library\SerialPortLib.h>
|
||||
|
||||
#define PCI_IDX 0xCF8
|
||||
#define PCI_DAT 0xCFC
|
||||
|
||||
#define PCI_LPC_BASE (0x8000F800)
|
||||
#define PCI_LPC_REG(x) (PCI_LPC_BASE + (x))
|
||||
|
||||
#define PMC_BASE_ADDRESS 0xFED03000 // PMC Memory Base Address
|
||||
#define R_PCH_LPC_PMC_BASE 0x44 // PBASE, 32bit, 512 Bytes
|
||||
#define B_PCH_LPC_PMC_BASE_EN BIT1 // Enable Bit
|
||||
#define R_PCH_PMC_GEN_PMCON_1 0x20 // General PM Configuration 1
|
||||
#define B_PCH_PMC_GEN_PMCON_SUS_PWR_FLR BIT14 // SUS Well Power Failure
|
||||
#define B_PCH_PMC_GEN_PMCON_PWROK_FLR BIT16 // PWROK Failure
|
||||
|
||||
#define R_PCH_LPC_UART_CTRL 0x80 // UART Control
|
||||
#define B_PCH_LPC_UART_CTRL_COM1_EN BIT0 // COM1 Enable
|
||||
|
||||
#define ILB_BASE_ADDRESS 0xFED08000 // ILB Memory Base Address
|
||||
#define R_PCH_ILB_IRQE 0x88 // IRQ Enable Control
|
||||
|
||||
#define IO_BASE_ADDRESS 0xFED0C000 // IO Memory Base Address
|
||||
|
||||
#define V_PCH_ILB_IRQE_UARTIRQEN_IRQ3 BIT3 // UART IRQ3 Enable
|
||||
#define V_PCH_ILB_IRQE_UARTIRQEN_IRQ4 BIT4 // UART IRQ4 Enable
|
||||
#define PCIEX_BASE_ADDRESS 0xE0000000
|
||||
#define PCI_EXPRESS_BASE_ADDRESS PCIEX_BASE_ADDRESS
|
||||
#define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
|
||||
#define SB_RCBA 0xfed1c000
|
||||
|
||||
typedef enum {
|
||||
PchA0 = 0,
|
||||
PchA1 = 1,
|
||||
PchB0 = 2,
|
||||
PchB1 = 3,
|
||||
PchB2 = 4,
|
||||
PchB3 = 5,
|
||||
PchC0 = 6,
|
||||
PchSteppingMax
|
||||
} PCH_STEPPING;
|
||||
|
||||
#define MmPciAddress( Segment, Bus, Device, Function, Register ) \
|
||||
( (UINTN)PCI_EXPRESS_BASE_ADDRESS + \
|
||||
(UINTN)(Bus << 20) + \
|
||||
(UINTN)(Device << 15) + \
|
||||
(UINTN)(Function << 12) + \
|
||||
(UINTN)(Register) \
|
||||
)
|
||||
|
||||
#define DEFAULT_PCI_BUS_NUMBER_PCH 0
|
||||
#define PCI_DEVICE_NUMBER_PCH_LPC 31
|
||||
#define PCI_FUNCTION_NUMBER_PCH_LPC 0
|
||||
|
||||
#define R_PCH_LPC_RID_CC 0x08 // Revision ID & Class Code
|
||||
|
||||
#define V_PCH_LPC_RID_0 0x01 // A0 Stepping (17 x 17)
|
||||
#define V_PCH_LPC_RID_1 0x02 // A0 Stepping (25 x 27)
|
||||
#define V_PCH_LPC_RID_2 0x03 // A1 Stepping (17 x 17)
|
||||
#define V_PCH_LPC_RID_3 0x04 // A1 Stepping (25 x 27)
|
||||
#define V_PCH_LPC_RID_4 0x05 // B0 Stepping (17 x 17)
|
||||
#define V_PCH_LPC_RID_5 0x06 // B0 Stepping (25 x 27)
|
||||
#define V_PCH_LPC_RID_6 0x07 // B1 Stepping (17 x 17)
|
||||
#define V_PCH_LPC_RID_7 0x08 // B1 Stepping (25 x 27)
|
||||
#define V_PCH_LPC_RID_8 0x09 // B2 Stepping (17 x 17)
|
||||
#define V_PCH_LPC_RID_9 0x0A // B2 Stepping (25 x 27)
|
||||
#define V_PCH_LPC_RID_A 0x0B // B3 Stepping (17 x 17)
|
||||
#define V_PCH_LPC_RID_B 0x0C // B3 Stepping (25 x 27)
|
||||
#define V_PCH_LPC_RID_C 0x0D // C0 Stepping (17 x 17)
|
||||
#define V_PCH_LPC_RID_D 0x0E // C0 Stepping (25 x 27)
|
||||
|
||||
/**
|
||||
Return Pch stepping type
|
||||
|
||||
@param[in] None
|
||||
|
||||
@retval PCH_STEPPING Pch stepping type
|
||||
|
||||
**/
|
||||
PCH_STEPPING
|
||||
EFIAPI
|
||||
PchStepping (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
UINT8 RevId;
|
||||
|
||||
RevId = MmioRead8 (
|
||||
MmPciAddress (0,
|
||||
DEFAULT_PCI_BUS_NUMBER_PCH,
|
||||
PCI_DEVICE_NUMBER_PCH_LPC,
|
||||
PCI_FUNCTION_NUMBER_PCH_LPC,
|
||||
R_PCH_LPC_RID_CC)
|
||||
);
|
||||
|
||||
switch (RevId) {
|
||||
case V_PCH_LPC_RID_0:
|
||||
case V_PCH_LPC_RID_1:
|
||||
return PchA0;
|
||||
break;
|
||||
|
||||
case V_PCH_LPC_RID_2:
|
||||
case V_PCH_LPC_RID_3:
|
||||
return PchA1;
|
||||
break;
|
||||
|
||||
case V_PCH_LPC_RID_4:
|
||||
case V_PCH_LPC_RID_5:
|
||||
return PchB0;
|
||||
break;
|
||||
|
||||
case V_PCH_LPC_RID_6:
|
||||
case V_PCH_LPC_RID_7:
|
||||
return PchB1;
|
||||
break;
|
||||
|
||||
case V_PCH_LPC_RID_8:
|
||||
case V_PCH_LPC_RID_9:
|
||||
return PchB2;
|
||||
break;
|
||||
|
||||
case V_PCH_LPC_RID_A:
|
||||
case V_PCH_LPC_RID_B:
|
||||
return PchB3;
|
||||
break;
|
||||
|
||||
case V_PCH_LPC_RID_C:
|
||||
case V_PCH_LPC_RID_D:
|
||||
return PchC0;
|
||||
break;
|
||||
|
||||
default:
|
||||
return PchSteppingMax;
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
Enable legacy decoding on ICH6
|
||||
|
||||
@param[in] none
|
||||
|
||||
@retval EFI_SUCCESS Always returns success.
|
||||
|
||||
**/
|
||||
VOID
|
||||
EnableInternalUart(
|
||||
VOID
|
||||
)
|
||||
{
|
||||
|
||||
//
|
||||
// Program and enable PMC Base.
|
||||
//
|
||||
IoWrite32 (PCI_IDX, PCI_LPC_REG(R_PCH_LPC_PMC_BASE));
|
||||
IoWrite32 (PCI_DAT, (PMC_BASE_ADDRESS | B_PCH_LPC_PMC_BASE_EN));
|
||||
|
||||
//
|
||||
// Enable COM1 for debug message output.
|
||||
//
|
||||
MmioAndThenOr32 (PMC_BASE_ADDRESS + R_PCH_PMC_GEN_PMCON_1, (UINT32) (~(B_PCH_PMC_GEN_PMCON_SUS_PWR_FLR + B_PCH_PMC_GEN_PMCON_PWROK_FLR)), BIT24);
|
||||
|
||||
//
|
||||
// Silicon Steppings
|
||||
//
|
||||
if (PchStepping()>= PchB0)
|
||||
MmioOr8 (ILB_BASE_ADDRESS + R_PCH_ILB_IRQE, (UINT8) V_PCH_ILB_IRQE_UARTIRQEN_IRQ4);
|
||||
else
|
||||
MmioOr8 (ILB_BASE_ADDRESS + R_PCH_ILB_IRQE, (UINT8) V_PCH_ILB_IRQE_UARTIRQEN_IRQ3);
|
||||
MmioAnd32(IO_BASE_ADDRESS + 0x0520, (UINT32)~(0x00000187));
|
||||
MmioOr32 (IO_BASE_ADDRESS + 0x0520, (UINT32)0x81); // UART3_RXD-L
|
||||
MmioAnd32(IO_BASE_ADDRESS + 0x0530, (UINT32)~(0x00000007));
|
||||
MmioOr32 (IO_BASE_ADDRESS + 0x0530, (UINT32)0x1); // UART3_RXD-L
|
||||
MmioOr8 (PciD31F0RegBase + R_PCH_LPC_UART_CTRL, (UINT8) B_PCH_LPC_UART_CTRL_COM1_EN);
|
||||
|
||||
SerialPortInitialize ();
|
||||
SerialPortWrite ("EnableInternalUart!\r\n", sizeof("EnableInternalUart!\r\n") - 1);
|
||||
|
||||
return ;
|
||||
}
|
||||
Reference in New Issue
Block a user