Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to

https://svn.code.sf.net/p/edk2/code/trunk/edk2/, 

which are for MinnowBoard MAX open source project.


Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
Reviewed-by: Mike Wu <mike.wu@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Wei
2015-01-12 09:37:20 +00:00
committed by zwei4
parent 6f785cfcc3
commit 3cbfba02fe
518 changed files with 118538 additions and 0 deletions

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CK505ClockPlatformInfo.h
Abstract:
Protocol to communicate product clock routing information.
GUID Info:
{3C485EA4-449A-46ce-BB08-2A336EA96B4E}
0x3c485ea4, 0x449a, 0x46ce, 0xbb, 0x8, 0x2a, 0x33, 0x6e, 0xa9, 0x6b, 0x4e);
**/
#ifndef _CLOCK_PLATFORM_INFO_H_
#define _CLOCK_PLATFORM_INFO_H_
#define EFI_CK505_CLOCK_PLATFORM_INFO_GUID \
{0x3c485ea4, 0x449a, 0x46ce, 0xbb, 0x8, 0x2a, 0x33, 0x6e, 0xa9, 0x6b, 0x4e}
//
// Structure to hold register modifications
//
typedef enum {
None = 0x00000000,
nICS9LP505_1 = 0x00000001,
nICS9LP505_2 = 0x00000002,
nIDTCV163 = 0x00000004,
nIDTCV174 = 0x00000008,
nSLG505YC56 = 0x00000010,
nSLG505YC64 = 0x00000020,
nCY28505 = 0x00000040,
nCY28505_2 = 0x00000080,
nCY28505LF = 0x00000100,
nPI6C505_OLD = 0x00000200,
nPI6C505_RevD = 0x00000400,
nGENERIC_505 = 0x00000800,
nSLG505YC264 = 0x00001000,
nIDTCV183 = 0x00002000,
nSLG505YC256 = 0x00004000,
nIDTCV184 = 0x00008000,
nIDTCV190 = 0x00010000,
All = 0xFFFFFFFF
} EFI_CLOCKS_SUPPORTED;
typedef enum {
Disabled,
Enabled,
EnabledWithoutSwitch,
EnabledWithSwitch
} EFI_SIGNAL_STATE;
typedef enum {
SrcClk11,
SrcClk10,
SrcClk9,
SrcClk8,
SrcClk7,
SrcClk6,
SrcClk5,
SrcClk4,
SrcClk3,
SrcClk2,
SrcClk1,
SrcClk0,
CpuClk1,
CpuClk0,
Ref0,
Dot96,
Usb48,
PciClkF5,
PciClk4,
PciClk3,
PciClk2,
PciClk1,
PciClk0,
SaveClockConfiguration,
MePresent,
Cr_A,
Cr_B,
Cr_C,
Cr_D,
Cr_E,
Cr_F,
Cr_G,
Cr_H,
Clk_None // Dummy entry for dynamic detection
} EFI_CLOCK_SIGNAL_NAME;
typedef struct {
EFI_CLOCK_SIGNAL_NAME Signal;
EFI_SIGNAL_STATE State;
EFI_CLOCKS_SUPPORTED Supported;
} EFI_STATIC_SIGNALS;
typedef struct {
BOOLEAN BehindBridge;
UINT16 BridgeBus;
UINT16 BridgeDev;
UINT16 BridgeFunction;
UINT16 TargetDevice;
EFI_CLOCK_SIGNAL_NAME Signal;
} EFI_DYNAMIC_SIGNALS;
typedef struct {
EFI_STATIC_SIGNALS *StaticClockTable;
UINTN StaticClockTableCount;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
EnhancedSpeedstep.h
Abstract:
Enhanced Speedstep protocol
The Enhanced Speedstep Protocol support.
**/
#ifndef _ENHANCED_SPEEDSTEP_H_
#define _ENHANCED_SPEEDSTEP_H_
#define ENHANCED_SPEEDSTEP_PROTOCOL_GUID \
{ \
0x91a1ddcf, 0x5374, 0x4939, 0x89, 0x51, 0xd7, 0x29, 0x3f, 0x1a, 0x78, 0x6f \
}
typedef struct _ENHANCED_SPEEDSTEP_PROTOCOL ENHANCED_SPEEDSTEP_PROTOCOL;
typedef struct {
UINT8 Version; // EIST State format
UINT8 Size; // Size of element
UINT32 RatioStep; // Step
UINT32 MinRatio; // Calculated min ratio
UINT32 MaxRatio; // Calculated max ratio
UINT32 MinCoreFreq; // Calculated min freq
UINT32 MaxCoreFreq; // Calculated max freq
UINT32 MinPower; // Calculated min power
UINT32 MaxPower; // Calculated max power
UINT32 NumStates; // Number of states
} EIST_INFORMATION;
typedef struct {
UINT32 CoreFrequency;
UINT32 Power;
UINT32 TransitionLatency;
UINT32 BusMasterLatency;
UINT32 Control;
UINT32 Status;
} EFI_ACPI_CPU_PSS_STATE;
typedef
EFI_STATUS
(EFIAPI *GET_EIST_TABLE) (
IN ENHANCED_SPEEDSTEP_PROTOCOL *This,
OUT EIST_INFORMATION **EistInformation,
OUT VOID **PssStates
);
struct _ENHANCED_SPEEDSTEP_PROTOCOL {
UINT32 ProcApicId;
GET_EIST_TABLE GetEistTable;
};

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
GlobalNvsArea.h
Abstract:
Definition of the global NVS area protocol. This protocol
publishes the address and format of a global ACPI NVS buffer used as a communications
buffer between SMM code and ASL code.
The format is derived from the ACPI reference code, version 0.95.
Note: Data structures defined in this protocol are not naturally aligned.
**/
#ifndef _GLOBAL_NVS_AREA_H_
#define _GLOBAL_NVS_AREA_H_
//
// Includes
//
#define GLOBAL_NVS_DEVICE_ENABLE 1
#define GLOBAL_NVS_DEVICE_DISABLE 0
//
// Forward reference for pure ANSI compatibility
//
//EFI_FORWARD_DECLARATION (EFI_GLOBAL_NVS_AREA_PROTOCOL);
//
// Global NVS Area Protocol GUID
//
#define EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID \
{ 0x74e1e48, 0x8132, 0x47a1, 0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc }
//
// Revision id - Added TPM related fields
//
#define GLOBAL_NVS_AREA_RIVISION_1 1
//
// Extern the GUID for protocol users.
//
extern EFI_GUID gEfiGlobalNvsAreaProtocolGuid;
//
// Global NVS Area definition
//
#pragma pack (1)
typedef struct {
//
// Miscellaneous Dynamic Values, the definitions below need to be matched
// GNVS definitions in Platform.ASL
//
UINT16 OperatingSystem; // 00
UINT8 SmiFunction; // 02 SMI function call via IO Trap
UINT8 SmiParameter0; // 03
UINT8 SmiParameter1; // 04
UINT8 SciFunction; // 05 SCI function call via _L00
UINT8 SciParameter0; // 06
UINT8 SciParameter1; // 07
UINT8 GlobalLock; // 08 Global lock function call
UINT8 LockParameter0; // 09
UINT8 LockParameter1; // 10
UINT32 Port80DebugValue; // 11
UINT8 LidState; // 15 Open = 1
UINT8 PowerState; // 16 AC = 1
UINT8 DebugState; // 17
//
// Thermal Policy Values
//
UINT8 EnableThermalOffset; // 18 ThermalOffset for KSC
UINT8 Reserved1; // 19
UINT8 Reserved2; // 20
UINT8 PassiveThermalTripPoint; // 21
UINT8 PassiveTc1Value; // 22
UINT8 PassiveTc2Value; // 23
UINT8 PassiveTspValue; // 24
UINT8 CriticalThermalTripPoint; // 25
UINT8 ReserveD;
UINT8 BspDigitalThermalSensorTemperature; // 27 Temperature of BSP
UINT8 ApDigitalThermalSensorTemperature; // 28 Temperature of AP
UINT8 DigitalThermalSensorSmiFunction; // 29 SMI function call via DTS IO Trap
//
// Battery Support Values
//
UINT8 NumberOfBatteries; // 30
UINT8 BatteryCapacity0; // 31 Battery 0 Stored Capacity
UINT8 BatteryCapacity1; // 32 Battery 1 Stored Capacity
UINT8 BatteryCapacity2; // 33 Battery 2 Stored Capacity
UINT8 BatteryStatus0; // 34 Battery 0 Stored Status
UINT8 BatteryStatus1; // 35 Battery 1 Stored Status
UINT8 BatteryStatus2; // 36 Battery 2 Stored Status
// NOTE: Do NOT Change the Offset of Revision Field
UINT8 Revision; // 37 Revision of the structure EFI_GLOBAL_NVS_AREA
UINT8 Reserved3[2]; // 38:39
//
// Processor Configuration Values
//
UINT8 ApicEnable; // 40 APIC Enabled by SBIOS (APIC Enabled = 1)
UINT8 LogicalProcessorCount; // 41 Processor Count Enabled (MP Enabled != 0)
UINT8 CurentPdcState0; // 42 PDC settings, Processor 0
UINT8 CurentPdcState1; // 43 PDC settings, Processor 1
UINT8 MaximumPpcState; // 44 Maximum PPC state
UINT32 PpmFlags; // 45:48 PPM configuration flags, same as CFGD
UINT8 Reserved4[1]; // 49
//
// SIO Configuration Values
//
UINT8 DockedSioPresent; // 50 Dock SIO Present
UINT8 DockComA; // 51 COM A Port
UINT8 DockComB; // 52 COM B Port
UINT8 LptP; // 53 LPT Port
UINT8 DockFdc; // 54 FDC Port
UINT8 OnboardCom; // 55 Onboard COM Port
UINT8 OnboardComCir; // 56 Onboard COM CIR Port
UINT8 WPCN381U; // 57
UINT8 NPCE791x; // 58
UINT8 Reserved5[1]; // 59
//
// Internal Graphics Device Values
//
UINT8 IgdState; // 60 IGD State (Primary Display = 1)
UINT8 DisplayToggleList; // 61 Display Toggle List Selection
UINT8 CurrentDeviceList; // 62 Current Attached Device List
UINT8 PreviousDeviceList; // 63 Previous Attached Device List
UINT16 CurrentDisplayState; // 64 Current Display State
UINT16 NextDisplayState; // 66 Next Display State
UINT16 SetDisplayState; // 68 Set Display State
UINT8 NumberOfValidDeviceId; // 70 Number of Valid Device IDs
UINT32 DeviceId1; // 71 Device ID 1
UINT32 DeviceId2; // 75 Device ID 2
UINT32 DeviceId3; // 79 Device ID 3
UINT32 DeviceId4; // 83 Device ID 4
UINT32 DeviceId5; // 87 Device ID 5
UINT32 AKsv0; // 91:94 First four bytes of AKSV (manufacturing mode)
UINT8 AKsv1; // 95 Fifth byte of AKSV (manufacturing mode
UINT8 Reserved6[7]; // 96:102
//
// Backlight Control Values
//
UINT8 BacklightControlSupport; // 103 Backlight Control Support
UINT8 BrightnessPercentage; // 104 Brightness Level Percentage
//
// Ambient Light Sensor Values
//
UINT8 AlsEnable; // 105 Ambient Light Sensor Enable
UINT8 AlsAdjustmentFactor; // 106 Ambient Light Adjusment Factor
UINT8 LuxLowValue; // 107 LUX Low Value
UINT8 LuxHighValue; // 108 LUX High Value
UINT8 Reserved7[1]; // 109
//
// Extended Mobile Access Values
//
UINT8 EmaEnable; // 110 EMA Enable
UINT16 EmaPointer; // 111 EMA Pointer
UINT16 EmaLength; // 113 EMA Length
UINT8 Reserved8[1]; // 115
//
// Mobile East Fork Values
//
UINT8 MefEnable; // 116 Mobile East Fork Enable
//
// PCIe Dock Status
//
UINT8 PcieDockStatus; // 117 PCIe Dock Status
UINT8 Reserved9[2]; // 118:119
//
// TPM Registers
//
UINT8 TpmPresent; // 120 TPM Present
UINT8 TpmEnable; // 121 TPM Enable
UINT8 MorData; // 122 Memory Overwrite Request Data
UINT8 TcgParamter; // 123 Used for save the Mor and/or physical presence paramter
UINT32 PPResponse; // 124 Physical Presence request operation response
UINT8 PPRequest; // 128 Physical Presence request operation
UINT8 LastPPRequest; // 129 Last Physical Presence request operation
//
// SATA Values
//
UINT8 GtfTaskFileBufferPort0[7]; // 130 GTF Task File Buffer for Port 0
UINT8 GtfTaskFileBufferPort2[7]; // 137 GTF Task File Buffer for Port 2
UINT8 IdeMode; // 144 IDE Mode (Compatible\Enhanced)
UINT8 GtfTaskFileBufferPort1[7]; // 145:151 GTF Task File Buffer for Port 1
UINT8 Reserved111[10]; // 152:161
UINT64 BootTimeLogAddress; // 162:169 Boot Time Log Table Address
UINT32 IgdOpRegionAddress; // 170 IGD OpRegion Starting Address
UINT8 IgdBootType; // 174 IGD Boot Type CMOS option
UINT8 IgdPanelType; // 175 IGD Panel Type CMOs option
UINT8 IgdTvFormat; // 176 IGD TV Format CMOS option
UINT8 IgdTvMinor; // 177 IGD TV Minor Format CMOS option
UINT8 IgdPanelScaling; // 178 IGD Panel Scaling
UINT8 IgdBlcConfig; // 179 IGD BLC Configuration
UINT8 IgdBiaConfig; // 180 IGD BIA Configuration
UINT8 IgdSscConfig; // 181 IGD SSC Configuration
UINT8 Igd409; // 182 IGD 0409 Modified Settings Flag
UINT8 Igd509; // 183 IGD 0509 Modified Settings Flag
UINT8 Igd609; // 184 IGD 0609 Modified Settings Flag
UINT8 Igd709; // 185 IGD 0709 Modified Settings Flag
UINT8 IgdPowerConservation; // 186 IGD Power Conservation Feature Flag
UINT8 IgdDvmtMemSize; // 187 IGD DVMT Memory Size
UINT8 IgdFunc1Enable; // 188 IGD Function 1 Enable
UINT8 IgdHpllVco; // 189 HPLL VCO
UINT32 NextStateDid1; // 190 Next state DID1 for _DGS
UINT32 NextStateDid2; // 194 Next state DID2 for _DGS
UINT32 NextStateDid3; // 198 Next state DID3 for _DGS
UINT32 NextStateDid4; // 202 Next state DID4 for _DGS
UINT32 NextStateDid5; // 206 Next state DID5 for _DGS
UINT32 NextStateDid6; // 210 Next state DID6 for _DGS
UINT32 NextStateDid7; // 214 Next state DID7 for _DGS
UINT32 NextStateDid8; // 218 Next state DID8 for _DGS
UINT8 IgdSciSmiMode; // 222 GMCH SMI/SCI mode (0=SCI)
UINT8 IgdPAVP; // 223 IGD PAVP data
UINT8 IgdSelfRefresh; // 224 IGD Self Refresh
UINT8 PcieOSCControl; // 225 PCIE OSC Control
UINT8 NativePCIESupport; // 226 Native PCI Express Support
//
// USB Sideband Deferring Support
//
UINT8 HostAlertVector; // 227 GPE vector used for HOST_ALERT
UINT8 HostAlertPio; // 228 PIO of USB device used for HOST_ALERT
UINT8 Reserved112[27]; // 229
UINT32 NvIgOpRegionAddress; // 256 NVIG support
UINT32 NvHmOpRegionAddress; // 260 NVHM support
UINT32 ApXmOpRegionAddress; // 264 AMDA support
UINT32 DeviceId6; // 268 Device ID 6
UINT32 DeviceId7; // 272 Device ID 7
UINT32 DeviceId8; // 276 Device ID 8
UINT32 EndpointBaseAddress; // 280 PEG Endpoint PCIe Base Address
UINT32 CapStrPresence; // 284 PEG Endpoint Capability Structure Presence
UINT32 EndpointPcieCapBaseAddress; // 288 PEG Endpoint PCIe Capability Structure Base Address
UINT32 EndpointVcCapBaseAddress; // 292 PEG Endpoint Virtual Channel Capability Structure Base Address
UINT32 XPcieCfgBaseAddress; // 296 Any Device's PCIe Config Space Base Address
UINT32 OccupiedBuses1; // 300 Occupied Buses from 0 to 31
UINT32 OccupiedBuses2; // 304 Occupied Buses from 32 to 63
UINT32 OccupiedBuses3; // 308 Occupied Buses from 64 to 95
UINT32 OccupiedBuses4; // 312 Occupied Buses from 96 to 127
UINT32 OccupiedBuses5; // 316 Occupied Buses from 128 to 159
UINT32 OccupiedBuses6; // 320 Occupied Buses from 160 to 191
UINT32 OccupiedBuses7; // 324 Occupied Buses from 192 to 223
UINT32 OccupiedBuses8; // 328 Occupied Buses from 224 to 255
UINT8 UartSelection; // 332 UART Interface Selection 0: Internal; 1: SIO
UINT8 PcuUart1Enable; // 333 PCU UART 1 Enabled
UINT8 PcuUart2Enable; // 334 PCU UART 2 Enabled
UINT32 LPEBar0; // 335~338 LPE Bar0
UINT32 LPEBar1; // 339~342 LPE Bar1
UINT32 LPEBar2; // 343~346 LPE Bar2
UINT8 AcSetup; // 347 For Ac Powered Config option - IST applet
UINT8 BatterySetup; // 348 For Battery Powered Config option - IST applet
UINT8 PlatformFlavor; // 349 0:unknown 1: Mobile; 2: desktop
UINT8 Reserved113[1]; // 350
UINT8 IsctReserve; // 351 ISCT / AOAC Configuration
UINT8 XhciMode; // 352 xHCI mode
UINT8 PmicEnable; // 353 PMIC enable
UINT8 LpeEnable; // 354 LPE enable
UINT32 ISPAddr; // 355 ISP Base address
UINT8 ISPDevSel; // 359 ISP device enabled selection 0: Disabled; 1: PCI Device 2; 2: PCI Device 3
//
// Lpss controllers
//
UINT32 PCIBottomAddress; //360 ((4+8+6)*4+2)*4=296
UINT32 PCITopAddress; //364
UINT32 LDMA1Addr; // 368
UINT32 LDMA1Len; // 372
UINT32 LDMA11Addr; // 376
UINT32 LDMA11Len; // 380
UINT32 PWM1Addr; // 384 PWM1
UINT32 PWM1Len; // 388
UINT32 PWM11Addr; // 392
UINT32 PWM11Len; // 396
UINT32 PWM2Addr; // 400 PWM2
UINT32 PWM2Len; // 404
UINT32 PWM21Addr; // 408
UINT32 PWM21Len; // 412
UINT32 UART1Addr; // 416 UART1
UINT32 UART1Len; // 420
UINT32 UART11Addr; // 424 UART1
UINT32 UART11Len; // 428
UINT32 UART2Addr; // 432 UART2
UINT32 UART2Len; // 436
UINT32 UART21Addr; // 440 UART2
UINT32 UART21Len; // 444
UINT32 SPIAddr; // 448 SPI
UINT32 SPILen; // 452
UINT32 SPI1Addr; // 456
UINT32 SPI1Len; // 460
UINT32 LDMA2Addr; // 464
UINT32 LDMA2Len; // 468
UINT32 LDMA21Addr; // 472
UINT32 LDMA21Len; // 476
UINT32 I2C1Addr; // 480 I2C1
UINT32 I2C1Len; // 484
UINT32 I2C11Addr; // 488 I2C1
UINT32 I2C11Len; // 492
UINT32 I2C2Addr; // 496 I2C2
UINT32 I2C2Len; // 500
UINT32 I2C21Addr; // 504 I2C2
UINT32 I2C21Len; // 508
UINT32 I2C3Addr; // 512 I2C3
UINT32 I2C3Len; // 516
UINT32 I2C31Addr; // 520 I2C3
UINT32 I2C31Len; // 524
UINT32 I2C4Addr; // 528 I2C4
UINT32 I2C4Len; // 532
UINT32 I2C41Addr; // 536 I2C4
UINT32 I2C41Len; // 540
UINT32 I2C5Addr; // 544 I2C5
UINT32 I2C5Len; // 548
UINT32 I2C51Addr; // 552 I2C5
UINT32 I2C51Len; // 556
UINT32 I2C6Addr; // 560 I2C6
UINT32 I2C6Len; // 564
UINT32 I2C61Addr; // 566 I2C6
UINT32 I2C61Len; // 570
UINT32 I2C7Addr; // 574 I2C7
UINT32 I2C7Len; // 578
UINT32 I2C71Addr; // 582 I2C7
UINT32 I2C71Len; // 586
//
// Scc controllers
//
UINT32 eMMCAddr; // 590 EMMC
UINT32 eMMCLen; // 594
UINT32 eMMC1Addr; // 598
UINT32 eMMC1Len; // 602
UINT32 SDIOAddr; // 606 SDIO
UINT32 SDIOLen; // 610
UINT32 SDIO1Addr; // 614
UINT32 SDIO1Len; // 618
UINT32 SDCardAddr; // 622 SDCard
UINT32 SDCardLen; // 626
UINT32 SDCard1Addr; // 630
UINT32 SDCard1Len; // 636
UINT32 MipiHsiAddr; // 640 MIPI-HSI
UINT32 MipiHsiLen; // 644
UINT32 MipiHsi1Addr; // 648
UINT32 MipiHsi1Len; // 652
UINT8 SdCardRemovable; // 656 reserve offset upto 658
UINT8 HideLPSSDevices; // 657 Hide unsupported LPSS devices when in ACPI mode
UINT8 ReservedO; // 658 OS Selection
UINT8 Reserved00; // 659
UINT8 Reserved01; // 660
UINT8 Reserved02; // 661
UINT8 Reserved03; // 662
UINT8 Reserved04; // 663
UINT8 Reserved05; // 664
UINT8 Reserved06; // 665
UINT8 Reserved07; // 666
UINT8 Reserved08; // 667
UINT8 Reserved09; // 668
UINT8 Reserved0A; // 669
UINT32 Reserved0B; // 670
UINT32 Reserved0C; // 674
UINT32 Reserved0D; // 678
UINT32 Reserved0E; // 682
UINT32 Reserved0F; // 686
UINT32 Reserved10; // 690
UINT32 Reserved11; // 694
UINT32 Reserved12; // 698
UINT32 Reserved13; // 702
UINT32 Reserved14; // 706
UINT32 Reserved15; // 710
UINT32 Reserved16; // 714
UINT8 Reserved17;
UINT32 Reserved18;
UINT32 Reserved19;
UINT32 Reserved1A;
UINT32 Reserved1B;
UINT32 Reserved1C;
UINT8 Reserved1D;
UINT32 Reserved1E;
UINT32 Reserved1F;
UINT32 Reserved20;
UINT32 Reserved21;
UINT32 Reserved22;
UINT8 Reserved23;
UINT8 BatteryChargingSolution; // 761 0-non ULPMC 1-ULPMC
//
//101 bytes
//
UINT8 NFCnSelect; // 762 NFCx Select 1: NFC1 2:NFC2
UINT8 LpssSccMode; // 763 EMMC device 0-ACPI mode, 1-PCI mode
UINT32 TPMAddress; // 764
UINT32 TPMLength; // 768
UINT8 I2CTouchAddress; // 772 I2C touch address, 0x4B:RVP 0x4A:FFRD
UINT8 IdleReserve; // 773 0 - disabled 1 - enabled
UINT8 SDIOMode; // 774 3 - Default 2 - DDR50
UINT8 emmcVersion; // 775 0 - 4.41 1 - 4.5
UINT32 BmBound; // 776 BM Bound
UINT8 FsaStatus; // 780 0 - Fsa is off, 1- Fsa is on
//
// Board Id
// This field is for the ASL code to know whether this board is Baylake or Bayley Bay etc
//
UINT8 BoardID; // 781
UINT8 FabID; // 782
UINT8 OtgMode; // 783 0- OTG disable 1- OTG PCI mode
UINT8 Stepping; // 784 Stepping
UINT8 WittEnable; // 785 WITT eanble 0 - disable 1 - enable
UINT8 SocStepping; // 786 Soc Stepping infomation
UINT8 AmbientTripPointChange; // 787 DPTF: Controls whether _ATI changes other participant's trip point(enabled/disabled)
UINT8 UtsEnable; // 788 Uart Test eanble 0 - disable 1 - enable
UINT8 DptfReserve; // 789
UINT8 SarEnable; // 790
UINT8 PssDeveice; // 791 PSS Deveice: 0 - None, 1 - Monzax 2K, 2 - Monzax 8K
UINT8 EDPV; // 792 Check for eDP display device
UINT32 DIDX; // 793 Device ID for eDP device
UINT8 MicrosoftIoT; // (794)JP1 pins are for Microsoft IoT project.
} EFI_GLOBAL_NVS_AREA;
#pragma pack ()
//
// Global NVS Area Protocol
//
typedef struct _EFI_GLOBAL_NVS_AREA_PROTOCOL {
EFI_GLOBAL_NVS_AREA *Area;
} EFI_GLOBAL_NVS_AREA_PROTOCOL;
#endif

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
HwWatchdogTimer.h
Abstract:
--*/
#ifndef __EFI_WATCHDOG_TIMER_DRIVER_PROTOCOL_H__
#define __EFI_WATCHDOG_TIMER_DRIVER_PROTOCOL_H__
#define EFI_WATCHDOG_TIMER_DRIVER_PROTOCOL_GUID \
{ 0xd5b06d16, 0x2ea1, 0x4def, 0x98, 0xd0, 0xa0, 0x5d, 0x40, 0x72, 0x84, 0x17 }
#define EFI_WATCHDOG_TIMER_NOT_SUPPORTED_PROTOCOL_GUID \
{ 0xe9e156ac, 0x3203, 0x4572, 0xac, 0xdf, 0x84, 0x4f, 0xdc, 0xdb, 0x6, 0xbf }
#include <Guid/HwWatchdogTimerHob.h>
//
// General Purpose Constants
//
#define ICH_INSTAFLUSH_GPIO BIT16 // BIT 16 in GPIO Level 2 is GPIO 48.
#define B_INSTAFLUSH BIT4
//
// Other Watchdog timer values
//
#define WDT_COUNTDOWN_VALUE 0x14
#define BDS_WDT_COUNTDOWN_VALUE 0x35
//
// Prototypes for the Watchdog Timer Driver Protocol
//
/**
This service begins the Watchdog Timer countdown. If the countdown completes prior to
Stop Timer or Restart Timer the system will reset.
@param[in] None
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *EFI_WATCHDOG_START_TIMER) (
VOID
);
/**
This service resets the Watchdog Timer countdown and should only be called after the
Start Timer function.
@param[in] None
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *PEI_WATCHDOG_RESET_TIMER) (
VOID
);
/**
This service restarts the Watchdog Timer countdown and should only be called after the
Start Timer function.
@param[in] None
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *EFI_WATCHDOG_RESTART_TIMER) (
VOID
);
/**
This service disables the Watchdog Timer countdown.
@param[in] None
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *EFI_WATCHDOG_STOP_TIMER) (
VOID
);
/**
**/
typedef
EFI_STATUS
(EFIAPI *EFI_WATCHDOG_CHECK_TIMEOUT) (
OUT HW_WATCHDOG_TIMEOUT *WatchdogTimeout
);
/**
This service forces a reboot of the system due to a reset of the POWERGOOD_PS,
POWERGOOD_CLK, and the BSEL Override
Arguments:
None
Returns:
This function should not return!
EFI_DEVICE_ERROR - The command was unsuccessful and a reboot did not occur
**/
typedef
EFI_STATUS
(EFIAPI *EFI_WATCHDOG_FORCE_REBOOT) (
IN BOOLEAN ForceTimeout,
IN UINT8 ResetType
);
/**
This service notifies the Watchdog Timer of the fact that a known reset is occuring.
@param[in] AllowReset TRUE if a Reset is currently expected
FALSE if a Reset is not currently expected
This function should not return!
EFI_DEVICE_ERROR - The command was unsuccessful and a reboot did not occur
**/
typedef
EFI_STATUS
(EFIAPI *EFI_WATCHDOG_KNOWN_RESET) (
IN BOOLEAN AllowReset
);
/**
This service reads the current Watchdog Timer countdown reload value.
@param[in] CountdownValue pointer to UINT32 to return the value of the reload register.
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *EFI_GET_TIMER_COUNT_DOWN_PERIOD)(
OUT UINT32 *CountdownValue
);
/**
This service reads the current Watchdog Timer countdown reload value.
@param[in] CountdownValue Value to set the reload register.
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *EFI_SET_TIMER_COUNT_DOWN_PERIOD)(
OUT UINT32 CountdownValue
);
/**
This service clears the state that indicates the Watchdog Timer fired.
@retval EFI_SUCCESS - Operation completed successfully
@retval EFI_DEVICE_ERROR - The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *PEI_WATCHDOG_CLEAR_TIMER_STATE) (
);
/**
This service disables the Watchdog Timer countdown. It also closes the recurring restart event
if the event exists.
@param[in] Stall TRUE = Stop the timer countdown
FALSE = Start the timer countdown
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
**/
typedef
EFI_STATUS
(EFIAPI *EFI_STALL_WATCHDOG_COUNTDOWN) (
IN BOOLEAN Stall
);
typedef struct _EFI_WATCHDOG_TIMER_DRIVER_PROTOCOL {
EFI_WATCHDOG_START_TIMER StartWatchdogTimer;
PEI_WATCHDOG_RESET_TIMER ResetWatchdogTimeout;
EFI_WATCHDOG_RESTART_TIMER RestartWatchdogTimer;
EFI_WATCHDOG_STOP_TIMER StopWatchdogTimer;
EFI_WATCHDOG_CHECK_TIMEOUT CheckWatchdogTimeout;
EFI_WATCHDOG_FORCE_REBOOT ForceReboot;
EFI_WATCHDOG_KNOWN_RESET AllowKnownReset;
EFI_GET_TIMER_COUNT_DOWN_PERIOD GetCountdownPeriod;

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@@ -0,0 +1,112 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __I2C_ACPI_H__
#define __I2C_ACPI_H__
#include <Protocol/DevicePath.h>
//
// I2C ACPI protocol
//
typedef struct _EFI_I2C_ACPI_PROTOCOL EFI_I2C_ACPI_PROTOCOL;
//
// I2C device description
//
// This structure provides the platform specific information which
// describes an I2C device.
//
typedef struct {
//
// Hardware revision - ACPI _HRV value
//
UINT32 HardwareRevision;
//
// Device path node for the I2C device.
//
CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath;
//
// I2C bus configuration for the I2C device.
//
UINT32 I2cBusConfiguration;
//
// Number of slave addresses for the I2C device.
//
UINT32 SlaveAddressCount;
//
// Address of the array of slave addresses for the I2C device.
//
CONST UINT32 *SlaveAddressArray;
}EFI_I2C_DEVICE;
/**
Enumerate the I2C devices
This routine must be called at or below TPL_NOTIFY.
This function walks the platform specific data to enumerates the
I2C devices on an I2C bus.
@param[in] This Address of an EFI_I2C_ENUM_PROTOCOL
structure.
@param[in, out] Device Buffer containing the address of an
EFI_I2C_DEVICE structure. Enumeration
is started by setting the initial
EFI_I2C_DEVICE structure address to NULL.
The buffer receives an EFI_I2C_DEVICE
structure address for the next I2C device.
@retval EFI_SUCCESS The platform data for the next device
on the I2C bus was returned successfully.
@retval EFI_INVALID_PARAMETER NextDevice was NULL
@retval EFI_NO_MAPPING PreviousDevice does not point to a valid
EFI_I2C_DEVICE structure.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_ACPI_ENUMERATE) (
IN CONST EFI_I2C_ACPI_PROTOCOL *This,
IN OUT CONST EFI_I2C_DEVICE **Device
);
//
// I2C device description
//
// This structure provides the platform specific information which
// describes an I2C device.
//
struct _EFI_I2C_ACPI_PROTOCOL {
//
// Walk the platform's list of I2C devices on the bus. This
// routine returns the next I2C device in the platform's list
// for this I2C bus.
//

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@@ -0,0 +1,169 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __I2C_BUS_H__
#define __I2C_BUS_H__
#include <Protocol/I2cHostMcg.h>
//
// I2C bus protocol
//
typedef struct _EFI_I2C_BUS_PROTOCOL EFI_I2C_BUS_PROTOCOL;
/**
Perform an I2C operation on the device
This routine must be called at or below TPL_NOTIFY. For synchronous
requests this routine must be called at or below TPL_CALLBACK.
N.B. The typical consumers of this API are the third party I2C
drivers. Extreme care must be taken by other consumers of this
API to prevent confusing the third party I2C drivers due to a
state change at the I2C device which the third party I2C drivers
did not initiate. I2C platform drivers may use this API within
these guidelines.
This routine queues an operation to the I2C controller for execution
on the I2C bus.
As an upper layer driver writer, the following need to be provided
to the platform vendor:
1. ACPI CID value or string - this is used to connect the upper layer
driver to the device.
2. Slave address array guidance when the I2C device uses more than one
slave address. This is used to access the blocks of hardware within
the I2C device.
@param[in] This Address of an EFI_I2C_BUS_PROTOCOL
structure
@param[in] SlaveAddressIndex Index into an array of slave addresses for
the I2C device. The values in the array are
specified by the board designer, with the
I2C device driver writer providing the slave
address order.
For devices that have a single slave address,
this value must be zero. If the I2C device
uses more than one slave address then the third
party (upper level) I2C driver writer needs to
specify the order of entries in the slave address
array.
\ref ThirdPartyI2cDrivers "Third Party I2C Drivers"
section in I2cMaster.h.
@param[in] Event Event to set for asynchronous operations,
NULL for synchronous operations
@param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET
structure describing the I2C operation
@param[out] I2cStatus Optional buffer to receive the I2C operation
completion status
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_ABORTED The request did not complete because the driver
was shutdown.
@retval EFI_ACCESS_DENIED Invalid SlaveAddressIndex value
@retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large.
@retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation.
This could indicate the slave device is not present.
@retval EFI_INVALID_PARAMETER RequestPacket is NULL
@retval EFI_INVALID_PARAMETER TPL is too high
@retval EFI_NO_RESPONSE The I2C device is not responding to the
slave address. EFI_DEVICE_ERROR may also be
returned if the controller can not distinguish
when the NACK occurred.
@retval EFI_NOT_FOUND I2C slave address exceeds maximum address
@retval EFI_NOT_READY I2C bus is busy or operation pending, wait for
the event and then read status pointed to by
the request packet.
@retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation
@retval EFI_TIMEOUT The transaction did not complete within an internally
specified timeout period.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_BUS_START_REQUEST) (
IN CONST EFI_I2C_BUS_PROTOCOL *This,
IN UINTN SlaveAddressIndex,
IN EFI_EVENT Event OPTIONAL,
IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,
OUT EFI_STATUS *I2cStatus OPTIONAL
);
//
// The I2C bus protocol enables access to a specific device on the I2C bus.
//
// Each I2C device is described as an ACPI node (HID, UID and CID) within the
// platform layer. The I2C bus protocol enumerates the I2C devices in the
// platform and creates a unique handle and device path for each I2C device.
//
// I2C slave addressing is abstracted to validate addresses and limit operation
// to the specified I2C device. The third party providing the I2C device support
// provides an ordered list of slave addresses for the I2C device to the team
// building the platform layer. The platform team must preserve the order of the
// supplied list. SlaveAddressCount is the number of entries in this list or
// array within the platform layer. The third party device support references
// a slave address using an index into the list or array in the range of zero
// to SlaveAddressCount - 1.
//
struct _EFI_I2C_BUS_PROTOCOL {
//
// Start an I2C operation on the bus
//
EFI_I2C_BUS_START_REQUEST StartRequest;
//
// The maximum number of slave addresses for the I2C device. The caller may
// validate this value as a check on the platform layer's configuration. Slave
// address selection uses an index value in the range of zero to SlaveAddressCount - 1.
//
UINTN SlaveAddressCount;
//
// Hardware revision - Matches the ACPI _HRV value
//
// The HardwareRevision value allows a single driver to support multiple hardware
// revisions and implement the necessary workarounds for limitations within the
// hardware.
//
UINT32 HardwareRevision;
//
// The maximum number of bytes the I2C host controller
// is able to receive from the I2C bus.
//
UINT32 MaximumReceiveBytes;
//
// The maximum number of bytes the I2C host controller
// is able to send on the I2C bus.
//
UINT32 MaximumTransmitBytes;
//
// The maximum number of bytes in the I2C bus transaction.
//

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@@ -0,0 +1,168 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __I2C_BUS_H__
#define __I2C_BUS_H__
#include <Protocol/I2cHostMcg.h>
//
// I2C bus protocol
//
typedef struct _EFI_I2C_BUS_PROTOCOL EFI_I2C_BUS_PROTOCOL;
/**
Perform an I2C operation on the device
This routine must be called at or below TPL_NOTIFY. For synchronous
requests this routine must be called at or below TPL_CALLBACK.
N.B. The typical consumers of this API are the third party I2C
drivers. Extreme care must be taken by other consumers of this
API to prevent confusing the third party I2C drivers due to a
state change at the I2C device which the third party I2C drivers
did not initiate. I2C platform drivers may use this API within
these guidelines.
This routine queues an operation to the I2C controller for execution
on the I2C bus.
As an upper layer driver writer, the following need to be provided
to the platform vendor:
1. ACPI CID value or string - this is used to connect the upper layer
driver to the device.
2. Slave address array guidance when the I2C device uses more than one
slave address. This is used to access the blocks of hardware within
the I2C device.
@param[in] This Address of an EFI_I2C_BUS_PROTOCOL
structure
@param[in] SlaveAddressIndex Index into an array of slave addresses for
the I2C device. The values in the array are
specified by the board designer, with the
I2C device driver writer providing the slave
address order.
For devices that have a single slave address,
this value must be zero. If the I2C device
uses more than one slave address then the third
party (upper level) I2C driver writer needs to
specify the order of entries in the slave address
array.
\ref ThirdPartyI2cDrivers "Third Party I2C Drivers"
section in I2cMaster.h.
@param[in] Event Event to set for asynchronous operations,
NULL for synchronous operations
@param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET
structure describing the I2C operation
@param[out] I2cStatus Optional buffer to receive the I2C operation
completion status
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_ABORTED The request did not complete because the driver
was shutdown.
@retval EFI_ACCESS_DENIED Invalid SlaveAddressIndex value
@retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large.
@retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation.
This could indicate the slave device is not present.
@retval EFI_INVALID_PARAMETER RequestPacket is NULL
@retval EFI_INVALID_PARAMETER TPL is too high
@retval EFI_NO_RESPONSE The I2C device is not responding to the
slave address. EFI_DEVICE_ERROR may also be
returned if the controller can not distinguish
when the NACK occurred.
@retval EFI_NOT_FOUND I2C slave address exceeds maximum address
@retval EFI_NOT_READY I2C bus is busy or operation pending, wait for
the event and then read status pointed to by
the request packet.
@retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation
@retval EFI_TIMEOUT The transaction did not complete within an internally
specified timeout period.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_BUS_START_REQUEST) (
IN CONST EFI_I2C_BUS_PROTOCOL *This,
IN UINTN SlaveAddressIndex,
IN EFI_EVENT Event OPTIONAL,
IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,
OUT EFI_STATUS *I2cStatus OPTIONAL
);
//
// The I2C bus protocol enables access to a specific device on the I2C bus.
//
// Each I2C device is described as an ACPI node (HID, UID and CID) within the
// platform layer. The I2C bus protocol enumerates the I2C devices in the
// platform and creates a unique handle and device path for each I2C device.
//
// I2C slave addressing is abstracted to validate addresses and limit operation
// to the specified I2C device. The third party providing the I2C device support
// provides an ordered list of slave addresses for the I2C device to the team
// building the platform layer. The platform team must preserve the order of the
// supplied list. SlaveAddressCount is the number of entries in this list or
// array within the platform layer. The third party device support references
// a slave address using an index into the list or array in the range of zero
// to SlaveAddressCount - 1.
//
struct _EFI_I2C_BUS_PROTOCOL {
//
// Start an I2C operation on the bus
//
EFI_I2C_BUS_START_REQUEST StartRequest;
//
// The maximum number of slave addresses for the I2C device. The caller may
// validate this value as a check on the platform layer's configuration. Slave
// address selection uses an index value in the range of zero to SlaveAddressCount - 1.
//
UINTN SlaveAddressCount;
//
// Hardware revision - Matches the ACPI _HRV value
//
// The HardwareRevision value allows a single driver to support multiple hardware
// revisions and implement the necessary workarounds for limitations within the
// hardware.
//
UINT32 HardwareRevision;
//
// The maximum number of bytes the I2C host controller
// is able to receive from the I2C bus.
///
UINT32 MaximumReceiveBytes;
//
// The maximum number of bytes the I2C host controller
// is able to send on the I2C bus.
//
UINT32 MaximumTransmitBytes;
//
// The maximum number of bytes in the I2C bus transaction.
//

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@@ -0,0 +1,143 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __I2C_HOST_H__
#define __I2C_HOST_H__
#include <Protocol/I2cMasterMcg.h>
/**
Declare the forward references
**/
typedef struct _EFI_I2C_HOST_PROTOCOL EFI_I2C_HOST_PROTOCOL;
typedef struct _EFI_I2C_HOST_CALLBACKS EFI_I2C_HOST_CALLBACKS;
/**
Queue an I2C operation for execution on the I2C controller.
This routine must be called at or below TPL_NOTIFY. For synchronous
requests this routine must be called at or below TPL_CALLBACK.
N.B. The typical consumers of this API are the I2C bus driver and
on rare occasions the I2C test application. Extreme care must be
taken by other consumers of this API to prevent confusing the
third party I2C drivers due to a state change at the I2C device
which the third party I2C drivers did not initiate. I2C platform
drivers may use this API within these guidelines.
This layer uses the concept of I2C bus configurations to describe
the I2C bus. An I2C bus configuration is defined as a unique
setting of the multiplexers and switches in the I2C bus which
enable access to one or more I2C devices. When using a switch
to divide a bus, due to speed differences, the I2C platform layer
would define an I2C bus configuration for the I2C devices on each
side of the switch. When using a multiplexer, the I2C platform
layer defines an I2C bus configuration for each of the selector
values required to control the multiplexer. See Figure 1 in the
<a href="http://www.nxp.com/documents/user_manual/UM10204.pdf">I<sup>2</sup>C
Specification</a> for a complex I2C bus configuration.
The I2C host driver processes all operations in FIFO order. Prior to
performing the operation, the I2C host driver calls the I2C platform
driver to reconfigure the switches and multiplexers in the I2C bus
enabling access to the specified I2C device. The I2C platform driver
also selects the maximum bus speed for the device. After the I2C bus
is configured, the I2C host driver calls the I2C port driver to
initialize the I2C controller and start the I2C operation.
@param[in] This Address of an EFI_I2C_HOST_PROTOCOL instance.
@param[in] I2cBusConfiguration I2C bus configuration to access the I2C
device.
@param[in] SlaveAddress Address of the device on the I2C bus.
@param[in] Event Event to set for asynchronous operations,
NULL for synchronous operations
@param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET
structure describing the I2C operation
@param[out] I2cStatus Optional buffer to receive the I2C operation
completion status
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_ABORTED The request did not complete because the driver
was shutdown.
@retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large.
@retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation.
This could indicate the slave device is not present.
@retval EFI_INVALID_PARAMETER RequestPacket is NULL
@retval EFI_INVALID_PARAMETER TPL is too high
@retval EFI_NO_MAPPING Invalid I2cBusConfiguration value
@retval EFI_NO_RESPONSE The I2C device is not responding to the
slave address. EFI_DEVICE_ERROR may also be
returned if the controller cannot distinguish
when the NACK occurred.
@retval EFI_NOT_FOUND I2C slave address exceeds maximum address
@retval EFI_NOT_READY I2C bus is busy or operation pending, wait for
the event and then read status pointed to by
the request packet.
@retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation
@retval EFI_TIMEOUT The transaction did not complete within an internally
specified timeout period.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_HOST_QUEUE_REQUEST) (
IN CONST EFI_I2C_HOST_PROTOCOL *This,
IN UINTN I2cBusConfiguration,
IN UINTN SlaveAddress,
IN EFI_EVENT Event OPTIONAL,
IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,
OUT EFI_STATUS *I2cStatus OPTIONAL
);
///
/// Host access to the I2C bus.
///
struct _EFI_I2C_HOST_PROTOCOL {
///
/// Queue an operation for execution on the I2C bus
///
EFI_I2C_HOST_QUEUE_REQUEST QueueRequest;
///
/// The maximum number of I2C bus configurations
///
UINTN I2cBusConfigurationCount;
///
/// The maximum number of bytes the I2C host controller
/// is able to receive from the I2C bus.
///
UINT32 MaximumReceiveBytes;
///
/// The maximum number of bytes the I2C host controller
/// is able to send on the I2C bus.
///
UINT32 MaximumTransmitBytes;
///
/// The maximum number of bytes in the I2C bus transaction.
///

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@@ -0,0 +1,524 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
\section I2cDriverStack I2C Driver Stack
The following is a representation of the I<sup>2</sup>C (I2C)
driver stack and an I2C bus layout.
<code><pre>
+-----------------+
| Application |
+-----------------+
|
| Third Party or UEFI
|
V
+--------+ +-----------------+
| Slave | | Third Party |
| Driver | | I2C Device |
| | | Driver |
+--------+ +-----------------+
| |
| BUS |
| |
| V
| +-----------------+
| | I2C Bus Driver |------------------.
| +-----------------+ |
| | |
| HOST | BUS |
| | CONFIGURATION |
SLAVE | V MANAGEMENT | ACPI
| +-----------------+ |
| | I2C Host Driver |----------. |
| +-----------------+ | |
| | | |
| MASTER | V V
| | +-------=-------------+
| V | I2C Platform Driver |
| +-----------------+ +---------------------+
`------>| I2C Port Driver | | |
+-----------------+ | |
| | |
Software | | |
--------------------------------------------------
Hardware | | |
| | |
V | |
+-----------------+ | |
| I2C Controller | | |
+-----------------+ | |
| | |
----------------------- | |
I2C Bus | | |
| +------------+ | |
+----| High speed | | |
| | I2C device | | |
| | 0x01 | | |
| +------------+ | |
| | |
+---------+ 0 | |
| Switch |<------------------` |
+---------+ 1 |
| |
| +------------+ |
+----| Fast speed | |
| | I2C device | |
| | 0x02 | |
| +------------+ |
| |
+-------------+ |
| Multiplexer |<-----------------------`
+-------------+
0 | | 1
| |
| |
| | +-------------+
| +----| Third Party |
| | | I2C Device |
| | | 0x03, 0x04 |
| | +-------------+
| |
|
| +-------------+
+------------| Third Party |
| | I2C Device |
| | 0x03, 0x04 |
| +-------------+
|
</pre></code>
The platform hardware designer chooses the bus layout based upon
the platform, I2C chip and software requirements. The design uses
switches to truncate the bus to enable higher speed operation for a
subset of devices which are placed closer to the controller. When the
switch is on, the extended bus must operate at a lower speed. The
design uses multiplexer to create separate address spaces enabling
the use of multiple devices which would otherwise have conflicting
addresses. See the
<a href="http://www.nxp.com/documents/user_manual/UM10204.pdf">I<sup>2</sup>C
Specification</a> for more details.
N.B. Some operating systems may prohibit the changing of switches
and multiplexers in the I2C bus. In this case the platform hardware
and software designers must select a single I2C bus configuration
consisting of constant input values for the switches and multiplexers.
The platform software designer must then ensure that this I2C bus
configuration is enabled prior to passing control to the operating
system.
The platform hardware designer needs to provide the platform software
designer the following data for each I2C bus:
1. Which controller controls this bus
2. A list of logic blocks contained in one or more I2C devices:
a. I2C device which contains this logic block
b. Logic block slave address
c. Logic block name
3. For each configuration of the switches and multiplexer
a. What is the maximum speed of operation
b. What devices are accessible
4. The settings for the switches and multiplexers when control is
given to the operating system.
\section ThirdPartyI2cDrivers Third Party I2C Drivers
This layer is I2C chip specific but platform and host controller
independent.
Third party I2C driver writers, typically silicon vendors, need
to provide:
1. The device path node data that is used to select their
driver.
2. The order for the blocks of logic that get referenced
by the entries in the slave address array.
3. The hardware version of the I2C device, this value is passed
to the third party I2C driver to enable it to perform work
arounds for the specific hardware version. This value should
match the value in the ACPI _HRV tag.
The third party I2C driver uses relative addressing to abstract
the platform specific details of the I2C device. Using an
example I2C device containing an accelerometer and a magnetometer
which consumes two slave addresses, one for each logic block. The
third party I2C driver writer may choose to write two drivers, one
for each block of logic, in which case each driver refers to the
single I2C slave address using the relative value of zero (0).
However if the third party I2C driver writer chooses to write a
single driver which consumes multiple slave addresses then the
third party I2C driver writer needs to convey the order of the
I2C slave address entries in the slave address array to the
platform software designer. For the example:
0: Accelerometer
1: Magnetometer
The platform hardware designer picks the actual slave addresses
from the I2C device's data sheet and provides this information
to the platform software designer. The platform software designer
then places the slave addresses into the slave address array in the
order specified by the third party I2C driver writer. The third
party driver I2C writer then indirectly references this array by
specifying the index value as the relative slave address. The
relative value always starts at zero (0) and its maximum value is
the number of entries in slave address array minus one.
The slave address is specified as a 32-bit integer to allow room
for future slave address expansion. Only the port driver knows
the maximum slave address value. All other drivers and
applications must look for the EFI_NOT_FOUND status for the
indication that the maximum slave address was exceeded.
\section I2cBusDriver I2C Bus Driver
This layer is platform, host controller, and I2C chip independent.
The I2C bus driver creates a handle for each of the I2C devices
described within the platform driver. The I2C controller's device
path is extended with the device path node provided by the platform
driver and attached to the handle. The third party I2C device driver
uses the device path to determine if it may connect. For ACPI nodes,
the third party I2C driver should use the CID or CidString value.
The I2C bus driver validates the relative address for the I2C device
and then converts the relative value to an actual I2C slave address.
The request is then passed to the I2C host driver.
\section I2cHostDriver I2C Host Driver
This layer is platform, host controller, and I2C chip independent.
N.B. For proper operation of the I2C bus, only the I2C bus driver
and the I2C test application should connect to the I2C host driver
via the EFI_I2C_HOST_DRIVER_PROTOCOL.
The I2C host driver may access any device on the I2C bus. The I2C
host driver has the following responsibilities:
1. Limits the number of requests to the I2C port driver to one.
The I2C host driver holds on to additional requests until the
I2C port driver is available to process the request. The I2C
requests are issued in FIFO order to the I2C port driver.
2. Enable the proper I2C bus configuration before starting the
I2C request on the I2C port driver
I2C devices are addressed as the tuple: BusConfiguration:SlaveAddress.
I2C bus configuration zero (0) is the portion of the I2C bus that
connects to the host controller. The bus configuration specifies
the control values for the switches and multiplexers in the I2C bus.
After the switches and multiplexers are properly configured, the I2C
controller uses the slave address to access the requested I2C device.
Since the I2C driver stack supports asynchronous operations this
layer maintains a queue of I2C requests until the I2C controller
is available them. When a request reaches the head of the queue
the necessary bus configuration is enabled and then the request
is sent to the I2C port driver.
\section I2cPortDriver I2C Port Driver
This layer is I2C controller specific but platform independent.
This layer manipulates the I2C controller to perform an operation
on the I2C bus. This layer does not configure the I2C bus so it
is up to the caller to ensure that the I2C bus is in the proper
configuration before issuing the I2C request.
This layer typically needs the following information:
1. Host controller address
2. Controller's input clock frequency
Depending upon the I2C controller, more data may be necessary.
This layer may use any method to get these values: hard coded
values, PCD values, or may choose to communicate with the platform
layer using an undefined mechanism to get these values.
If the I2C port driver requires data from the platform driver then
the I2C port driver writer needs to provide the platform interface
details to the platform software designer.
\section I2cPlatformDriver I2C Platform Driver
When enabling access to I2C devices within UEFI, this driver
installs the EFI_I2C_ACPI_PROTOCOL to provide the I2C device
descriptions to the I2C bus driver using the EFI_I2C_DEVICE
structure. These descriptions include the bus configuration
number required for the I2C device, the slave address array
and the device path.
The EFI_I2C_BUS_CONFIGURATION_MANAGEMENT protocol is optional.
This protocol needs to be specified under the following conditions:
1. The I2C bus must operate at a frequency greater than 100 KHz
2. The I2C bus contains switches or multiplexers.
The EFI_I2C_BUS_CONFIGURATION_MANAGEMENT protocol enables the
I2C host driver to call into the I2C platform driver to enable
a specific I2C bus configuration and set its maximum clock speed.
The platform software designer collects the data requirements
from third party I2C driver writers, the I2C controller
driver writer, the EFI_I2C_ACPI_PROTOCOL and
EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL. The platform
software designer gets the necessary data from the platform
hardware designer. The platform software designer then builds
the data structures and implements the necessary routines to
construct the I2C platform driver.
\section I2cSwitches Switches and Multiplexers
There are some I2C switches and I2C multiplexers where the control
is done via I2C commands. When the control inputs come via the
same I2C bus that is being configured then the platform driver must
use the EFI_I2C_MASTER_PROTOCOL that is passed to the platform
driver. While the I2C host driver makes the call to the I2C
platform driver to configure the bus, the host driver keeps the
I2C port driver idle, to allow the I2C platform driver preform
the necessary configuration operations.
If however the configuration control is done via and I2C device
connected to a different I2C bus (host controller), then it is
possible for the platform software designer may choose between
the following:
1. Call into a third party I2C driver to manipulate the I2C
bus control device.
2. Call into the EFI_I2C_BUS_PROTOCOL if no third party I2C
driver exists for the I2C bus control device
3. Call into the EFI_I2C_HOST_PROTOCOL if the platform does
not expose the I2C bus control device.
**/
#ifndef __I2C_MASTER_H__
#define __I2C_MASTER_H__
/**
Declare the forward references
**/
typedef struct _EFI_I2C_MASTER_PROTOCOL EFI_I2C_MASTER_PROTOCOL; ///< I2C master protocol
///
/// I2C device operation
///
/// This structure provides the information necessary for an operation
/// on an I2C device
///
typedef struct {
///
/// Number of bytes to send to the I2C device
///
UINT32 WriteBytes;
///
/// Number of bytes to read, set to zero for write only operations
///
UINT32 ReadBytes;
///
/// Address of the buffer containing the data to send to the I2C device.
/// The WriteBuffer must be at least WriteBytes in length.
///
UINT8 *WriteBuffer;
///
/// Address of the buffer to receive data from the I2C device. Use NULL
/// for write only operations. The ReadBuffer must be at least ReadBytes
/// in length.
///
UINT8 *ReadBuffer;
///
/// Timeout for the I2C operation in 100 ns units
///
UINT32 Timeout;
} EFI_I2C_REQUEST_PACKET;
/**
Set the I2C controller bus clock frequency.
This routine must be called at or below TPL_NOTIFY.
The software and controller do a best case effort of using the specified
frequency for the I2C bus. If the frequency does not match exactly then
the controller will use a slightly lower frequency to avoid
exceeding the operating conditions for any of the I2C devices on the bus.
For example if 400 KHz was specified and the controller's divide network
only supports 402 KHz or 398 KHz then the controller would be set to 398
KHz. However if the desired frequency is 400 KHz and the controller only
supports 1 MHz and 100 KHz then this routine would return EFI_UNSUPPORTED.
@param[in] This Address of an EFI_I2C_MASTER_PROTOCOL
structure
@param[in] BusClockHertz New I2C bus clock frequency in Hertz
@retval EFI_SUCCESS The bus frequency was set successfully.
@retval EFI_UNSUPPORTED The controller does not support this frequency.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_MASTER_BUS_FREQUENCY_SET) (
IN CONST EFI_I2C_MASTER_PROTOCOL *This,
IN UINTN BusClockHertz
);
/**
Reset the I2C controller and configure it for use
This routine must be called at or below TPL_NOTIFY.
The I2C controller is reset and the I2C bus frequency is set to 100 KHz.
@param[in] This Address of an EFI_I2C_MASTER_PROTOCOL
structure
**/
typedef
VOID
(EFIAPI *EFI_I2C_MASTER_RESET) (
IN CONST EFI_I2C_MASTER_PROTOCOL *This
);
/**
Start an I2C operation on the host controller
This routine must be called at or below TPL_NOTIFY. For synchronous
requests this routine must be called at or below TPL_CALLBACK.
This function initiates an I2C operation on the controller.
The operation is performed by selecting the I2C device with its slave
address and then sending all write data to the I2C device. If read data
is requested, a restart is sent followed by the slave address and then
the read data is clocked into the I2C controller and placed in the read
buffer. When the operation completes, the status value is returned and
then the event is set.
N.B. The typical consumer of this API is the I2C host driver.
Extreme care must be taken by other consumers of this API to
prevent confusing the third party I2C drivers due to a state
change at the I2C device which the third party I2C drivers did
not initiate. I2C platform drivers may use this API within
these guidelines.
N.B. This API supports only one operation, no queuing support
exists at this layer. This API assumes that the I2C bus is in
the correct configuration for the I2C request.
@param[in] This Address of an EFI_I2C_MASTER_PROTOCOL
structure
@param[in] SlaveAddress Address of the device on the I2C bus.
@param[in] Event Event to set for asynchronous operations,
NULL for synchronous operations
@param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET
structure describing the I2C operation
@param[out] I2cStatus Optional buffer to receive the I2C operation
completion status
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_ABORTED The request did not complete because the driver
was shutdown.
@retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large.
@retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation.
This could indicate the slave device is not present.
@retval EFI_INVALID_PARAMETER RequestPacket is NULL
@retval EFI_INVALID_PARAMETER TPL is too high
@retval EFI_NOT_FOUND SlaveAddress exceeds maximum address
@retval EFI_NOT_READY I2C bus is busy or operation pending, wait for
the event and then read status pointed to by
the request packet.
@retval EFI_NO_RESPONSE The I2C device is not responding to the
slave address. EFI_DEVICE_ERROR may also be
returned if the controller cannot distinguish
when the NACK occurred.
@retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation
@retval EFI_TIMEOUT The transaction did not complete within an internally
specified timeout period.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_MASTER_START_REQUEST) (
IN CONST EFI_I2C_MASTER_PROTOCOL *This,
IN UINTN SlaveAddress,
IN EFI_EVENT Event OPTIONAL,
IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,
OUT EFI_STATUS *I2cStatus OPTIONAL
);
///
/// I2C master mode protocol
///
/// This protocol manipulates the I2C host controller to perform transactions as a
/// master on the I2C bus using the current state of any switches or multiplexers
/// in the I2C bus.
///
struct _EFI_I2C_MASTER_PROTOCOL {
///
/// Set the clock frequency for the I2C bus
///
EFI_I2C_MASTER_BUS_FREQUENCY_SET BusFrequencySet;
///
/// Reset the I2C host controller
///
EFI_I2C_MASTER_RESET Reset;
///
/// Start an I2C transaction in master mode on the host controller
///
EFI_I2C_MASTER_START_REQUEST StartRequest;
///
/// The maximum number of bytes the I2C host controller
/// is able to receive from the I2C bus.
///
UINT32 MaximumReceiveBytes;
///
/// The maximum number of bytes the I2C host controller
/// is able to send on the I2C bus.
///
UINT32 MaximumTransmitBytes;
///
/// The maximum number of bytes in the I2C bus transaction.
///

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __I2C_SLAVE_H__
#define __I2C_SLAVE_H__
#include <Protocol/I2cHostMcg.h>
/**
Declare the forward references
**/
typedef struct _EFI_I2C_SLAVE_PROTOCOL EFI_I2C_SLAVE_PROTOCOL; ///< I2C slave protocol
/**
The I2C controller received a data byte from the
I2C msster.
@param[in] Context The value passed to the slave enable routine.
@param[in] NumberOfBytes Number of data bytes received
@param[in] Data Buffer containing the received data bytes
@retval EFI_SUCCESS ACK the data byte
@retval EFI_UNSUPPORTED NACK the data byte
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_SLAVE_RECEIVE_DATA) (
IN VOID *Context,
IN UINTN NumberOfBytes,
IN CONST UINT8 *Data
);
/**
The I2C controller received the start bit from the
I2C master.
@param[in] Context The value passed to the slave enable routine.
**/
typedef
VOID
(EFIAPI *EFI_I2C_SLAVE_RECEIVE_START) (
IN VOID *Context,
IN UINTN BytesSent,
IN EFI_STATUS Status
);
/**
The I2C controller received the stop bit from the
I2C master.
@param[in] Context The value passed to the slave enable routine.
@param[in] BytesSent Number of bytes successfully ACKed by the
I2C master. This is a hint, not all I2C
controllers support the ability to return
the number of bytes sent. When it is not
possible, the port driver returns zero.
@param[in] Status <ul>
<li>EFI_SUCCESS - All of the data was successfully sent</li>
<li>EFI_ABORTED - The controller was reset</li>
<li>EFI_DEVICE_ERROR - A NACK was received when sending the data.</li>
<li>EFI_END_OF_FILE - The stop bit was received before all of
the data was sent.</li>
</ul>
**/
typedef
VOID
(EFIAPI *EFI_I2C_SLAVE_RECEIVE_STOP) (
IN VOID *Context,
IN UINTN BytesSent,
IN EFI_STATUS Status
);
/**
Enable or disable I2C slave operation.
The ReceiveData callback allows the port driver to return data
to the driver or application handling slave mode operations. This
is data that a remote master has sent to the local I2C controller.
The data may be returned one byte at a time if the controller supports
the ability to ACK/NACK on each receive byte. If not, a block of
data may be returned by the I2C port driver and the ACK/NACK status
is used only as a hint for the port driver.
The slave mode driver or application should buffer the data until
either ReceiveStart or ReceiveStop is called. At that time all of
the data is received and the command may be processed.
ReceiveStart is called when the I2C master is expecting a response.
After processing the command, but before sending the response the
slave driver or application should mark the command as processed to
avoid processing it a second time when ReceiveStop is called. The
slave driver or application then calls SendData to send to queue the
response data for transmission. The data must remain valid in the
WriteBuffer until ReceiveStop is called.
ReceiveStop is called when the stop bit is received on the I2C bus.
The slave driver or application starts processing the command if an
command data is pending in the slave driver's or application's buffer.
The BytesSent value is a hint to the slave driver or application as
to how much data was returned to the I2C master. If the controller
does not provide this level of support then this value is set to zero.
@param[in] This Address of an EFI_I2C_SLAVE_PROTOCOL
structure
@param[in] SlaveAddress Slave address for the I2C controller
@param[in] Context Address of a context structure for use when
calling ReceiveData or ReceiveStop
@param[in] ReceiveData Called by the I2C port driver as data bytes
are received from the master. Response status
indicates if the byte is ACKed or NACKed. When
data is passed back a byte at a time, the port
driver must hold the clock until this callback
returns.
@param[in] ReceiveStart Called when the I2C controller receives a start bit.
@param[in] ReceiveStop Called after all of the data bytes are
received.
@retval EFI_SUCCESS Slave operation is enabled on the controller.
@retval EFI_UNSUPPORTED The controller does not support this frequency.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_SLAVE_ENABLE) (
IN CONST EFI_I2C_SLAVE_PROTOCOL *This,
IN UINT32 SlaveAddress,
IN VOID *Context,
IN EFI_I2C_SLAVE_RECEIVE_DATA ReceiveData,
IN EFI_I2C_SLAVE_RECEIVE_START ReceiveStart,
IN EFI_I2C_SLAVE_RECEIVE_STOP ReceiveStop
);
/**
Send data to the I2C master.
Port drivers may implement this as a blocking or non-blocking call.
The data in the write buffer must remain valid until ReceiveStop or
ReceiveStart is called indicating that the I2C master has terminated
the transfer.
@param[in] This Address of an EFI_I2C_SLAVE_PROTOCOL
structure
@param[in] WriteBytes Number of bytes to write
@param[in] WriteBuffer Buffer containing the data to send
@retval EFI_SUCCESS Data waiting for master access.
@retval EFI_INVALID_PARAMETER WriteBuffer is NULL or WriteBytes
is zero.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_I2C_SLAVE_SEND) (
IN CONST EFI_I2C_SLAVE_PROTOCOL *This,
IN UINTN WriteBytes,
IN CONST UINT8 *WriteBuffer
);
///
/// I2C slave protocol
///
/// The port driver publishes this protocol when slave mode is
/// supported by the controller.
///
struct _EFI_I2C_SLAVE_PROTOCOL {
///
/// Enable or disable I2C slave operation
///
EFI_I2C_SLAVE_ENABLE SlaveEnable;
///
/// Send data to the I2C master
///

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
LpcWpc83667Policy.h
Abstract:
Protocol used for WPC83627 Policy definition.
-------------------------------------------------------------------------------
Rev Date<MM/DD/YYYY> Name Description
-------------------------------------------------------------------------------
R01 < 4/22/2011> LB Update driver for Sio83627UGH support.
-------------------------------------------------------------------------------
**/
#ifndef _WPC83627_POLICY_PROTOCOL_H_
#define _WPC83627_POLICY_PROTOCOL_H_
EFI_FORWARD_DECLARATION (EFI_WPC83627_POLICY_PROTOCOL);
#define EFI_WPC83627_POLICY_PROTOCOL_GUID \
{ \
0xd3ecc567, 0x9fd5, 0x44c1, 0x86, 0xcf, 0x5d, 0xa7, 0xa2, 0x4f, 0x4b, 0x5d \
}
#define EFI_WPC83627_COM1_ENABLE 0x01
#define EFI_WPC83627_COM2_ENABLE 0x01
#define EFI_WPC83627_COM3_ENABLE 0x01
#define EFI_WPC83627_COM4_ENABLE 0x01
#define EFI_WPC83627_LPT1_ENABLE 0x01
#define EFI_WPC83627_LPT1_ENABLE 0x01
#define EFI_WPC83627_FDD_ENABLE 0x01
#define EFI_WPC83627_FDD_WRITE_ENABLE 0x01
#define EFI_WPC83627_PS2_KBC_ENABLE 0x01
#define EFI_WPC83627_ECIR_ENABLE 0x01
#define EFI_WPC83627_COM1_DISABLE 0x00
#define EFI_WPC83627_COM2_DISABLE 0x00
#define EFI_WPC83627_COM3_DISABLE 0x00
#define EFI_WPC83627_COM4_DISABLE 0x00
#define EFI_WPC83627_LPT1_DISABLE 0x00
#define EFI_WPC83627_FDD_DISABLE 0x00
#define EFI_WPC83627_FDD_WRITE_PROTECT 0x00
#define EFI_WPC83627_PS2_KBC_DISABLE 0x00
#define EFI_WPC83627_ECIR_DISABLE 0x00
#define EFI_WPC83627_RESERVED_DEFAULT 0x00
typedef struct {
UINT16 Com1 :1; // 0 = Disable, 1 = Enable
UINT16 Lpt1 :1; // 0 = Disable, 1 = Enable
UINT16 Floppy :1; // 0 = Disable, 1 = Enable
UINT16 FloppyWriteProtect :1; // 0 = Write Protect, 1 = Write Enable
UINT16 Port80 :1; // 0 = Disable, 1 = Enable
UINT16 CIR :1; // CIR enable or disable
UINT16 Ps2Keyboard :1; // 0 = Disable, 1 = Enable
UINT16 Ps2Mouse :1; // 0 = Disable, 1 = Enable
UINT16 Com2 :1; // 0 = Disable, 1 = Enable
UINT16 Com3 :1; // 0 = Disable, 1 = Enable
UINT16 Com4 :1; // 0 = Disable, 1 = Enable
UINT16 Dac :1; // 0 = Disable, 1 = Enable
UINT16 Rsvd :6;
} EFI_WPC83627_DEVICE_ENABLES;
typedef enum {
LptModeOutput,
LptModeBiDirectional,
LptModeEpp,
LptModeEcp
} EFI_LPT_MODE;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
LpcWpce791Policy.h
Abstract:
Protocol used for WPCE791 Policy definition.
**/
#ifndef _WPCE791_POLICY_PROTOCOL_H_
#define _WPCE791_POLICY_PROTOCOL_H_
#define EFI_WPCE791_POLICY_PROTOCOL_GUID \
{ \
0xab2bee2f, 0xc1a6, 0x4399, 0x85, 0x3d, 0xc0, 0x7c, 0x77, 0x4f, 0xfd, 0xd \
}
#define EFI_WPCE791_PS2_KEYBOARD_ENABLE 0x01
#define EFI_WPCE791_PS2_KEYBOARD_DISABLE 0x00
#define EFI_WPCE791_PS2_MOUSE_ENABLE 0x01
#define EFI_WPCE791_PS2_MOUSE_DISABLE 0x00
typedef struct {
UINT16 Com1 :1; // 0 = Disable, 1 = Enable
UINT16 Lpt1 :1; // 0 = Disable, 1 = Enable
UINT16 Floppy :1; // 0 = Disable, 1 = Enable
UINT16 FloppyWriteProtect :1; // 0 = Write Protect, 1 = Write Enable
UINT16 Port80 :1; // 0 = Disable, 1 = Enable
UINT16 CIR :1; // CIR enable or disable
UINT16 Ps2Keyboard :1; // 0 = Disable, 1 = Enable
UINT16 Ps2Mouse :1; // 0 = Disable, 1 = Enable
UINT16 Com2 :1; // 0 = Disable, 1 = Enable
UINT16 Dac :1; // 0 = Disable, 1 = Enable
UINT16 Rsvd :6;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __MMIO_DEVICE_H__
#define __MMIO_DEVICE_H__
//
// Protocol to define for the MMIO device
//
typedef struct {
//
// Address of a GUID
//
EFI_GUID *Guid;
//
// Context for the protocol
//
VOID *Context;
} EFI_MMIO_DEVICE_PROTOCOL_ITEM;
typedef struct _EFI_MMIO_DEVICE_PROTOCOL EFI_MMIO_DEVICE_PROTOCOL;
//
// The MMIO device protocol defines a memory mapped I/O device
// for use by the system.
//
struct _EFI_MMIO_DEVICE_PROTOCOL {
//
// Pointer to an ACPI_EXTENDED_HID_DEVICE_PATH structure
// containing HID/HidStr and CID/CidStr values.
//
// See the note below associated with the UnitIdentification
// field.
//
CONST ACPI_EXTENDED_HID_DEVICE_PATH *AcpiPath;
//
// Allow the use of a shared template for the AcpiPath.
//
// If this value is non-zero UID value then the AcpiPath must
// be a template which contains only the HID/HidStr and CID/CidStr
// values. The UID/UidStr values in the AcpiPath must be zero!
//
// If this value is zero then the AcpiPath is not shared and
// must contain either a non-zero UID value or a UidStr value.
//
UINT32 UnitIdentification;
//
// Hardware revision - ACPI _HRV value
//
UINT32 HardwareRevision;
//
// Pointer to a data structure containing the controller
// resources and configuration. At a minimum this points
// to an EFI_PHYSICAL_ADDRESS for the base address of the
// MMIO device.
//
CONST VOID *DriverResources;
//
// Number of protocols in the array
//
UINTN ProtocolCount;

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@@ -0,0 +1,191 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Observable.h
Abstract:
Interface and GUID definitions for Observable protocol.
**/
#ifndef _OBSERVABLE_PROTOCOL_H_
#define _OBSERVABLE_PROTOCOL_H_
//
// GUID Definitions
//
#define OBSERVABLE_PROTOCOL_GUID \
{ \
0xe227c522, 0xd5fe, 0x4a53, 0x87, 0xb1, 0x0f, 0xbe, 0x57, 0x0f, 0x98, 0xe9 \
}
extern EFI_GUID gObservableProtocolGuid;
typedef struct _OBS_OBSERVABLE_PROTOCOL OBS_OBSERVABLE_PROTOCOL;
//
// Interface Definitions
//
/**
Remove all observables.
Remove all observable guids and all interfaces subscribed to them.
@param VOID No Parameters.
@return EFI_SUCCESS Successfully removed all observables and subscribed interfaces.
**/
typedef
EFI_STATUS
(EFIAPI *OBS_REMOVE_ALL_OBSERVABLES) (
VOID
);
/**
Interface for notification functions.
Functions that are to be used as callbacks must inherit this interface in order to be used properly.
@param VOID* Data Parameter context to be passed to the notification function.
@return EFI_STATUS Varies depending on implementation.
**/
typedef
EFI_STATUS
(EFIAPI *OBS_CALLBACK) (
IN OUT VOID* Data
);
/**
Subscribe an interface with an observable guid.
Use this to register a callback function with a guid. The function provided by CallbackInterface will be executed
whenever the appropriate observable instance specified by ReferenceGuid calls Publish.
@param EFI_GUID ReferenceGuid The observable guid that the callback interface will subscribe to.
OBS_NOTIFY_INTERFACE CallbackInterface A pointer to the function that is subscribing to the observable.
@return EFI_SUCCESS Successfully subscribed the interface to the observable guid.
EFI_NOT_FOUND No match could be found between the provided guid and existing observables.
EFI_OUT_OF_RESOURCES Could not subscribe to this observer due to resource limitations.
EFI_INVALID_PARAMETER Interface is already subscribed to this observer.
**/
typedef
EFI_STATUS
(EFIAPI *OBS_SUBSCRIBE) (
IN EFI_GUID ReferenceGuid,
IN OBS_CALLBACK CallbackInterface
);
/**
Unsubscribe an interface with an observable guid.
Use this to remove an interface from the callback list associated with an observable guid.
@param EFI_GUID ReferenceGuid The observable guid to unsubscribe the interface from.
OBS_NOTIFY_INTERFACE NotifyCallback A pointer to the interface that is being unsubscribed.
@return EFI_SUCCESS Successfully unsubscribed the interface from the observable guid.
**/
typedef
EFI_STATUS
(EFIAPI *OBS_UNSUBSCRIBE) (
IN EFI_GUID ReferenceGuid,
IN OBS_CALLBACK CallbackInterface
);
/**
Notify observing functions.
Use this to notify all functions who are subscribed to the guid specified by ReferenceGuid.
@param EFI_GUID ReferenceGuid The observable guid that contains the the list of interfaces to be notified.
VOID* Data Parameter context to be passed to the notification function.
@return EFI_SUCCESS Successfully notified all observers listening to this guid.
EFI_NOT_FOUND No match could be found between the provided guid and existing observables.
**/
typedef
EFI_STATUS
(EFIAPI *OBS_PUBLISH) (
IN EFI_GUID ReferenceGuid,
IN OUT VOID* Data
);
/**
Creates a new observable.
Create a new observable that can be observed with the use of Subscribe function.
@param EFI_GUID ReferenceGuid The observable guid to add.
@return EFI_SUCCESS Successfully added observable.
EFI_INVALID_PARAMETER Observable already exists.
**/
typedef
EFI_STATUS
(EFIAPI *OBS_ADD_OBSERVABLE) (
IN EFI_GUID ReferenceGuid
);
/**
Remove an observable.
Remove an observable so that it can no longer be subscribed to. In addition, unsubscribe any functions
that are subscribed to this guid.
@param EFI_GUID ReferenceGuid The observable guid to remove.
@return EFI_SUCCESS Successfully removed observable.
**/
typedef
EFI_STATUS
(EFIAPI *OBS_REMOVE_OBSERVABLE) (
IN EFI_GUID ReferenceGuid
);
//
// Protocol Definitions
//
typedef struct _OBS_LEAF {
OBS_CALLBACK Observer;
struct _OBS_LEAF* Next;
} OBS_LEAF;
typedef struct _OBS_TREE {
EFI_GUID ObservableGuid;
OBS_LEAF* Leaf;
struct _OBS_TREE* Next;
} OBS_TREE;
struct _OBS_OBSERVABLE_PROTOCOL {

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/*++
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
--*/
/** @file
**/
#ifndef _PLATFORM_GOP_POLICY_PROTOCOL_H_
#define _PLATFORM_GOP_POLICY_PROTOCOL_H_
#define EFI_PLATFORM_GOP_POLICY_PROTOCOL_GUID \
{ 0xec2e931b, 0x3281, 0x48a5, 0x81, 0x7, 0xdf, 0x8a, 0x8b, 0xed, 0x3c, 0x5d }
#define EFI_BMP_IMAGE_GUID \
{ 0x878AC2CC, 0x5343, 0x46F2, 0xB5, 0x63, 0x51, 0xF8, 0x9D, 0xAF, 0x56, 0xBA }
#define PLATFORM_GOP_POLICY_PROTOCOL_REVISION_01 0x01
#define PLATFORM_GOP_POLICY_PROTOCOL_REVISION_02 x0222
#pragma pack(1)
typedef enum {
LidClosed,
LidOpen,
LidStatusMax
} LID_STATUS;
typedef enum {
Docked,
UnDocked,
DockStatusMax
} DOCK_STATUS;
typedef
EFI_STATUS
(EFIAPI *GET_PLATFORM_LID_STATUS) (
OUT LID_STATUS *CurrentLidStatus
);
typedef
EFI_STATUS
(EFIAPI *GET_VBT_DATA) (
OUT EFI_PHYSICAL_ADDRESS *VbtAddress,
OUT UINT32 *VbtSize
);
#pragma pack()
typedef struct _PLATFORM_GOP_POLICY_PROTOCOL {
UINT32 Revision;
GET_PLATFORM_LID_STATUS GetPlatformLidStatus;
GET_VBT_DATA GetVbtData;
} PLATFORM_GOP_POLICY_PROTOCOL;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
PlatformIdeInit.h
Abstract:
EFI Platform Ide Init Protocol
Revision History
**/
#ifndef _EFI_PLATFORM_IDE_INIT_H_
#define _EFI_PLATFORM_IDE_INIT_H_
//
// Global ID for the IDE Platform Protocol
//
#define EFI_PLATFORM_IDE_INIT_PROTOCOL_GUID \
{ 0x377c66a3, 0x8fe7, 0x4ee8, 0x85, 0xb8, 0xf1, 0xa2, 0x82, 0x56, 0x9e, 0x3b };
EFI_FORWARD_DECLARATION (EFI_PLATFORM_IDE_INIT_PROTOCOL);
//

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
SetupMode.h
Abstract:
EFI Setup Mode
Revision History
**/
#ifndef _EFI_SETUP_MODE_H_
#define _EFI_SETUP_MODE_H_
//
// Global ID for the Setup Mode
//
#define EFI_PLATFORM_BOOT_MODE_GUID \
{ 0xce845704, 0x1683, 0x4d38, 0xa4, 0xf9, 0x7d, 0xb, 0x50, 0x77, 0x57, 0x93 }
#define EFI_NORMAL_SETUP_GUID \
{ 0xec87d643, 0xeba4, 0x4bb5, 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0xa9 }
#define EFI_NORMAL_SETUP_RESET_NAME L"Reset"
enum {
//
// This means: "whatever reset defaults in setup does"
//
SetupDataResetNormal = 0,
//
// This means: "the defaults built into the BIOS"
//
SetupDataResetStandard = 1,
//
// This means: "the manufacturing mode defaults"
//
SetupDataResetManufacturing = 2,
//
// This means: "the oem defaults"
//
SetupDataResetOem = 3,
};
//
// PlatformBootMode types
//
#define PLATFORM_NORMAL_MODE 0x01
#define PLATFORM_SAFE_MODE 0x02
#define PLATFORM_RECOVERY_MODE 0x04
#define PLATFORM_MANUFACTURING_MODE 0x08
#define PLATFORM_BACK_TO_BIOS_MODE 0x10
extern EFI_GUID gEfiPlatformBootModeGuid;
extern EFI_GUID gEfiNormalSetupGuid;
extern CHAR16 gEfiNormalSetupName[];
extern CHAR16 gEfiInSetupName[];

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
SmbiosSlotPopulation.h
Abstract:
EFI SMBIOS slot structure control code.
GUID:
{EF7BF7D6-F8FF-4a76-8247-C0D0D1CC49C0}
0xef7bf7d6, 0xf8ff, 0x4a76, 0x82, 0x47, 0xc0, 0xd0, 0xd1, 0xcc, 0x49, 0xc0
Revision History
**/
#ifndef _EFI_SMBIOS_SLOT_POPULATION_H_
#define _EFI_SMBIOS_SLOT_POPULATION_H_
//
// Slot Population Protocol GUID
//
#define EFI_SMBIOS_SLOT_POPULATION_GUID \
{ 0xef7bf7d6, 0xf8ff, 0x4a76, 0x82, 0x47, 0xc0, 0xd0, 0xd1, 0xcc, 0x49, 0xc0 }
typedef struct {
UINT16 SmbiosSlotId; // SMBIOS Slot ID
BOOLEAN InUse; // Does the slot have a card in it
BOOLEAN Disabled; // Should the slot information be in SMBIOS
} EFI_SMBIOS_SLOT_ENTRY;

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Speaker.h
Abstract:
EFI Speaker Interface Protocol
Revision History
**/
#ifndef _EFI_SPEAKER_H
#define _EFI_SPEAKER_H
//
// Global Id for Speaker Interface
//
#define EFI_SPEAKER_INTERFACE_PROTOCOL_GUID \
{ \
0x400b4476, 0x3081, 0x11d6, 0x87, 0xed, 0x00, 0x06, 0x29, 0x45, 0xc3, 0xb9 \
}
typedef struct _EFI_SPEAKER_IF_PROTOCOL EFI_SPEAKER_IF_PROTOCOL;
//
// Beep Code
//
typedef
EFI_STATUS
(EFIAPI *EFI_GENERATE_BEEP) (
IN EFI_SPEAKER_IF_PROTOCOL * This,
IN UINTN NumberOfBeep,
IN UINTN BeepDuration,
IN UINTN TimeInterval
);
//
// Set Frequency
//
typedef
EFI_STATUS
(EFIAPI *EFI_SPEAKER_SET_FREQUENCY) (
IN EFI_SPEAKER_IF_PROTOCOL * This,
IN UINT16 Frequency
);
//

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
TcoReset.h
Abstract:
Protocol to communicate with ICH TCO.
GUID Info:
{A6A79162-E325-4c30-BCC3-59373064EFB3}
0xa6a79162, 0xe325, 0x4c30, 0xbc, 0xc3, 0x59, 0x37, 0x30, 0x64, 0xef, 0xb3);
--*/
#ifndef _TCO_RESET_H_
#define _TCO_RESET_H_
#define EFI_TCO_RESET_PROTOCOL_GUID \
{0xa6a79162, 0xe325, 0x4c30, 0xbc, 0xc3, 0x59, 0x37, 0x30, 0x64, 0xef, 0xb3}
typedef struct _EFI_TCO_RESET_PROTOCOL EFI_TCO_RESET_PROTOCOL;
/**
Enables the TCO timer to reset the system in case of a system hang. This is
used when writing the clock registers.
@param[in] RcrbGcsSaveValue This is the value of the RCRB GCS register before it is
changed by this procedure. This will be used to restore
the settings of this register in PpiDisableTcoReset.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_TCO_RESET_PROTOCOL_ENABLE_TCO_RESET) (
IN UINT32 *RcrbGcsSaveValue
);
/**
Disables the TCO timer. This is used after writing the clock registers.
@param[in] RcrbGcsRestoreValue Value saved in PpiEnableTcoReset so that it can
restored.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_TCO_RESET_PROTOCOL_DISABLE_TCO_RESET) (
OUT UINT32 RcrbGcsRestoreValue
);

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Tpm.h
Abstract:
--*/
#ifndef __EFI_TPM_MP_DRIVER_PROTOCOL_H__
#define __EFI_TPM_MP_DRIVER_PROTOCOL_H__
#define EFI_TPM_MP_DRIVER_PROTOCOL_GUID \
{ 0xde161cfe, 0x1e60, 0x42a1, 0x8c, 0xc3, 0xee, 0x7e, 0xf0, 0x73, 0x52, 0x12 }
EFI_FORWARD_DECLARATION (EFI_TPM_MP_DRIVER_PROTOCOL);
#define TPM_DRIVER_STATUS 0
#define TPM_DEVICE_STATUS 1
#define TPM_DRIVER_OK 0
#define TPM_DRIVER_FAILED 1
#define TPM_DRIVER_NOT_OPENED 2
#define TPM_DEVICE_OK 0
#define TPM_DEVICE_UNRECOVERABLE 1
#define TPM_DEVICE_RECOVERABLE 2
#define TPM_DEVICE_NOT_FOUND 3
//
// Prototypes for the TPM MP Driver Protocol
//
/**
This service Open the TPM interface
@param[in] This A pointer to the EFI_TPM_MP_DRIVER_PROTOCOL.
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
@retval EFI_NOT_FOUND The component was not running
**/
typedef
EFI_STATUS
(EFIAPI *EFI_TPM_MP_INIT) (
IN EFI_TPM_MP_DRIVER_PROTOCOL *This
);
/**
This service close the TPM interface and deactivate TPM
@param[in] This A pointer to the EFI_TPM_MP_DRIVER_PROTOCOL.
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
@retval EFI_NOT_FOUND The component was not running
**/
typedef
EFI_STATUS
(EFIAPI *EFI_TPM_MP_CLOSE) (
IN EFI_TPM_MP_DRIVER_PROTOCOL *This
);
/**
This service get the current status infomation of TPM
@param[in] This A pointer to the EFI_TPM_MP_DRIVER_PROTOCOL.
@param[in] ReqStatusType Requested type of status information, driver or device.
@param[in] Status Pointer to the returned status.
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
@retval EFI_INVALID_PARAMETER One or more of the parameters are incorrect
@retval EFI_BUFFER_TOO_SMALL The receive buffer is too small
@retval EFI_NOT_FOUND The component was not running
**/
typedef
EFI_STATUS
(EFIAPI *EFI_TPM_MP_GET_STATUS_INFO) (
IN EFI_TPM_MP_DRIVER_PROTOCOL *This,
IN UINT32 ReqStatusType,
OUT UINT32 *Status
);
/**
This service transmit data to the TPM and get response from TPM
@param[in] This A pointer to the EFI_TPM_MP_DRIVER_PROTOCOL.
@param[in] TransmitBuf Pointer to a buffer containing TPM transmit data.
@param[in] TransmitBufLen Sizeof TPM input buffer in bytes.
@param[in] ReceiveBuf Pointer to a buffer containing TPM receive data.
@param[in] ReceiveBufLen On input, size of TPM receive buffer in bytes.
On output, number of bytes written.
@retval EFI_SUCCESS Operation completed successfully
@retval EFI_DEVICE_ERROR The command was unsuccessful
@retval EFI_INVALID_PARAMETER One or more of the parameters are incorrect
@retval EFI_BUFFER_TOO_SMALL The receive buffer is too small
@retval EFI_NOT_FOUND The component was not running
**/
typedef
EFI_STATUS
(EFIAPI *EFI_TPM_MP_TRANSMIT) (
IN EFI_TPM_MP_DRIVER_PROTOCOL *This,
IN UINT8 *TransmitBuffer,
IN UINT32 TransmitBufferLen,
OUT UINT8 *ReceiveBuf,
IN OUT UINT32 *ReceiveBufLen
);
typedef struct _EFI_TPM_MP_DRIVER_PROTOCOL {

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/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
UsbPolicy.h
Abstract:
--*/
#ifndef _USB_POLICY_H_
#define _USB_POLICY_H_
EFI_FORWARD_DECLARATION (EFI_USB_POLICY_PROTOCOL);
#define USB_POLICY_GUID \
{\
0xf617b358, 0x12cf, 0x414a, 0xa0, 0x69, 0x60, 0x67, 0x7b, 0xda, 0x13, 0xb4\
}
#define TIANO_CODE_BASE 0x00
#define ICBD_CODE_BASE 0x01
#define ATUO_TYPE 0x00
#define USB_FDD_TYPE 0x01
#define HDD_TYPE 0x02
#define ZIP_TYPE 0x03
#define CDROM_TYPE 0x04
#define SIZE_TYPE 0x05
#define ZIP_FDD 0x80
#define FDD_EMULATION 0x00
#define HDD_EMULATION 0x01
#define HIGH_SPEED 0x00
#define FULL_SPEED 0x01
#define SUPER_SPEED 0x02
#define LEGACY_KB_EN 0x01
#define LEGACY_KB_DIS 0x00
#define LEGACY_MS_EN 0x01
#define LEGACY_MS_DIS 0x00
#define LEGACY_USB_EN 0x00
#define LEGACY_USB_DIS 0x01
#define LEGACY_FREE_SUPP 0x01
#define LEGACY_FREE_UN_SUPP 0x00
#define LEGACY_PERIOD_SUPP 0x01
#define LEGACY_PERIOD_UN_SUPP 0x00
#define LEGACY_USB_TIME_TUE_ENABLE 0x01
#define LEGACY_USB_TIME_TUE_DISABLE 0x00
#define USB_HAVE_HUB_INTERNEL 0x01
#define USB_NOT_HAVE_HUB_INTERNEL 0x00
#define USB_POLICY_PROTOCOL_REVISION_1 1
#define USB_POLICY_PROTOCOL_REVISION_2 2
#ifndef __GNUC__
#pragma warning ( disable : 4306 )
#pragma warning ( disable : 4054 )
#endif
#define GET_USB_CFG (UsbCfg);\
do{\
UINT16 *pSegOfEbda;\
UINT32 mToEbda;\
pSegOfEbda = (UINT16 *)(UINTN)0x40E;\
mToEbda = (UINT32)(((UINTN)(*pSegOfEbda) << 4) + 0x80);\
UsbCfg = (USB_CFG *)(UINTN)mToEbda;\
}while(0);
#pragma pack(1)
typedef struct {
UINT8 HasUSBKeyboard:1;
UINT8 HasUSBMouse:1;
UINT8 LegacyFreeSupport:1;
UINT8 UsbOperationMode:1;
UINT8 LegacyKBEnable:1;
UINT8 LegacyMSEnable:1;
UINT8 USBPeriodSupport:1;
UINT8 Reserved:1;
} USB_DEVICE_INFOR;
typedef struct {
UINT8 Codebase;
UINT8 USBHDDForceType;
UINT8 Configurated;
UINT8 LpcAcpiBase;
UINT8 AcpiTimerReg;
UINT8 Reserved1[0x01];
UINT8 LegacyUsbEnable;
USB_DEVICE_INFOR UsbDeviceInfor;
UINT16 UsbEmulationSize;
UINT8 Reserved2[0x06];
} USB_CFG;
#pragma pack()
typedef struct _EFI_USB_POLICY_PROTOCOL{
UINT8 Version;
UINT8 UsbMassStorageEmulationType; // 1: FDD_Type; 2: HDD_Type; other:Auto_Type*
UINT8 UsbOperationMode; // 0: High_Speed; 1: Full_Speed;
UINT8 LegacyKBEnable; // 0: Disabled; 1: Enabled*
UINT8 LegacyMSEnable; // 0: Disabled; 1: Enabled*
UINT8 USBPeriodSupport; // 0; Unsupport; 1: Support
UINT8 LegacyUsbEnable; // 1: Disabled; 0: Enabled*
UINT8 LegacyFreeSupport; // 0: Unsupport; 1: Support
UINT8 CodeBase;
UINT8 LpcAcpiBase; // 40h(default)
UINT8 AcpiTimerReg;
UINT8 UsbTimeTue;
UINT8 InternelHubExist; // 1: Host have internel hub on board; 0: No internel hub on board

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/**
Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
VlvPlatformPolicy.h
Abstract:
Interface definition details between MCH and platform drivers during DXE phase.
--*/
#ifndef _VLV_PLATFORM_POLICY_H_
#define _VLV_PLATFORM_POLICY_H_
//
// VLV Policy provided by platform for DXE phase {5BAB88BA-E0E2-4674-B6AD-B812F6881CD6}
//
#define DXE_VLV_PLATFORM_POLICY_GUID \
{0x5bab88ba, 0xe0e2, 0x4674, 0xb6, 0xad, 0xb8, 0x12, 0xf6, 0x88, 0x1c, 0xd6}
//
// Extern the GUID for protocol users.
//
extern EFI_GUID gDxeVlvPlatformPolicyGuid;
//
// Protocol revision number
// Any backwards compatible changes to this protocol will result in an update in the revision number
// Major changes will require publication of a new protocol
//
#define DXE_VLV_PLATFORM_POLICY_PROTOCOL_REVISION 0
typedef struct {
UINT8 PFITStatus;
UINT8 IgdTheramlSupport;
UINT8 ALSEnabled;
UINT8 LidStatus;
} IGD_PANEL_FEATURES;
typedef struct {
UINT8 Reserved00;
UINT8 Reserved01;
UINT16 Reserved02;
UINT16 Reserved03;
UINT16 Reserved04;
UINT16 Reserved05;
UINT16 Reserved06;
UINT16 Reserved07;
UINT16 Reserved08;
UINT16 Reserved09;
UINT16 Reserved0A;
UINT16 Reserved0B;
UINT16 Reserved0C;
UINT16 Reserved0D;
UINT8 Reserved0E;
UINT8 Reserved0F;
UINT32 Reserved10;
UINT32 Reserved11;
UINT32 Reserved12;
UINT32 Reserved13;
UINT32 Reserved14;
UINT8 Reserved15;
UINT8 Reserved16;
} DPTF_SETTINGS;
//
// MCH DXE Platform Policiy ==================================================
//
#define NO_AUDIO 0
#define HD_AUDIO 1
#define LPE_AUDIO 2
typedef struct _DXE_VLV_PLATFORM_POLICY_PROTOCOL {
UINT8 Revision;
IGD_PANEL_FEATURES IgdPanelFeatures;
DPTF_SETTINGS Reserved;
UINT8 GraphicReserve00;
UINT8 GraphicsPerfAnalyzers;
UINT8 PwmReserved00;
UINT8 PwmReserved01;
UINT8 PmSupport;
UINT8 GraphicReserve01;
UINT8 GfxPause;
UINT8 GraphicsFreqReq;
UINT8 GraphicReserve03;
UINT8 GraphicReserve02;
UINT8 GraphicReserve04;
UINT8 PavpMode;
UINT8 GraphicReserve05;
UINT8 UlClockGating;
UINT8 IdleReserve;
UINT8 AudioTypeSupport;
UINT8 GraphicReserve06;
} DXE_VLV_PLATFORM_POLICY_PROTOCOL;
#endif