Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to

https://svn.code.sf.net/p/edk2/code/trunk/edk2/, 

which are for MinnowBoard MAX open source project.


Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
Reviewed-by: Mike Wu <mike.wu@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Wei
2015-01-12 09:37:20 +00:00
committed by zwei4
parent 6f785cfcc3
commit 3cbfba02fe
518 changed files with 118538 additions and 0 deletions

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#
#
# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#
#Module Name:
#
# CpuIA32.c
#
#Abstract:
#
#--*/
##include "CpuIA32.h"
#include "EfiBind.h"
#---------------------------------------------------------------------------
.586p:
#.MODEL flat,C
.code:
#---------------------------------------------------------------------------
.globl ASM_PFX(EfiHalt)
.globl ASM_PFX(EfiWbinvd)
.globl ASM_PFX(EfiInvd)
.globl ASM_PFX(EfiCpuid)
.globl ASM_PFX(EfiReadMsr)
.globl ASM_PFX(EfiWriteMsr)
.globl ASM_PFX(EfiReadTsc)
.globl ASM_PFX(EfiDisableCache)
.globl ASM_PFX(EfiEnableCache)
.globl ASM_PFX(EfiGetEflags)
.globl ASM_PFX(EfiDisableInterrupts)
.globl ASM_PFX(EfiEnableInterrupts)
.globl ASM_PFX(EfiCpuidExt)
#VOID
#EfiHalt (
# VOID
#)
ASM_PFX(EfiHalt):
hlt
ret
#EfiHalt ENDP
#VOID
#EfiWbinvd (
# VOID
#)
ASM_PFX(EfiWbinvd):
wbinvd
ret
#EfiWbinvd ENDP
#VOID
#EfiInvd (
# VOID
#)
ASM_PFX(EfiInvd):
invd
ret
#EfiInvd ENDP
#VOID
#EfiCpuid (IN UINT32 RegisterInEax,
# OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
ASM_PFX(EfiCpuid):
pushl %ebp
movl %esp, %ebp
pushl %ebx
pushl %esi
pushl %edi
pushal
movl 8(%ebp), %eax #RegisterInEax
cpuid
cmpl $0, 0xC(%ebp) # Reg
je L1
movl 0xC(%ebp), %edi # Reg
movl %eax, (%edi) # Reg->RegEax
movl %ebx, 4(%edi) # Reg->RegEbx
movl %ecx, 8(%edi) # Reg->RegEcx
movl %edx, 0xC(%edi) # Reg->RegEdx
L1:
popal
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
#EfiCpuid ENDP
#UINT64
#EfiReadMsr (
# IN UINT32 Index
# );
ASM_PFX(EfiReadMsr):
movl 4(%esp), %ecx # Index
rdmsr
ret
#EfiReadMsr ENDP
#VOID
#EfiWriteMsr (
# IN UINT32 Index,
# IN UINT64 Value
# );
ASM_PFX(EfiWriteMsr):
movl 4(%esp), %ecx # Index
movl 8(%esp), %eax # DWORD PTR Value[0]
movl 0xC(%esp), %edx # DWORD PTR Value[4]
wrmsr
ret
#EfiWriteMsr ENDP
#UINT64
#EfiReadTsc (
# VOID
# )
ASM_PFX(EfiReadTsc):
rdtsc
ret
#EfiReadTsc ENDP
#VOID
#EfiDisableCache (
# VOID
#)
ASM_PFX(EfiDisableCache):
movl %cr0, %eax
bswapl %eax
andb $0x60, %al
cmpb $0x60, %al
je L2
movl %cr0, %eax
orl $0x60000000, %eax
movl %eax, %cr0
wbinvd
L2:
ret
#EfiDisableCache ENDP
#VOID
#EfiEnableCache (
# VOID
# )
ASM_PFX(EfiEnableCache):
wbinvd
movl %cr0, %eax
andl $0x9fffffff, %eax
movl %eax, %cr0
ret
#EfiEnableCache ENDP
#UINT32
#EfiGetEflags (
# VOID
# )
ASM_PFX(EfiGetEflags):
pushfl
popl %eax
ret
#EfiGetEflags ENDP
#VOID
#EfiDisableInterrupts (
# VOID
# )
ASM_PFX(EfiDisableInterrupts):
cli
ret
#EfiDisableInterrupts ENDP
#VOID
#EfiEnableInterrupts (
# VOID
# )
ASM_PFX(EfiEnableInterrupts):
sti
ret
#EfiEnableInterrupts ENDP
#VOID
#EfiCpuidExt (
# IN UINT32 RegisterInEax,
# IN UINT32 CacheLevel,
# OUT EFI_CPUID_REGISTER *Regs
# )
ASM_PFX(EfiCpuidExt):
push %ebx
push %edi
push %esi
pushal
movl 0x30(%esp), %eax # RegisterInEax
movl 0x34(%esp), %ecx # CacheLevel
cpuid
movl 0x38(%esp), %edi # DWORD PTR Regs
movl %eax, (%edi) # Reg->RegEax
movl %ebx, 4(%edi) # Reg->RegEbx
movl %ecx, 8(%edi) # Reg->RegEcx
movl %edx, 0xC(%edi) # Reg->RegEdx

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;
; This file contains an 'Intel Sample Driver' and is
; licensed for Intel CPUs and chipsets under the terms of your
; license agreement with Intel or your vendor. This file may
; be modified by the user, subject to additional terms of the
; license agreement
;
;
; Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
;
; This program and the accompanying materials are licensed and made available under
; the terms and conditions of the BSD License that accompanies this distribution.
; The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;
;Module Name:
;
; CpuIA32.c
;
;Abstract:
;
;--*/
;#include "CpuIA32.h"
;---------------------------------------------------------------------------
.586p
.model flat,C
.code
;---------------------------------------------------------------------------
;VOID
;EfiHalt (
; VOID
;)
EfiHalt PROC C PUBLIC
hlt
ret
EfiHalt ENDP
;VOID
;EfiWbinvd (
; VOID
;)
EfiWbinvd PROC C PUBLIC
wbinvd
ret
EfiWbinvd ENDP
;VOID
;EfiInvd (
; VOID
;)
EfiInvd PROC C PUBLIC
invd
ret
EfiInvd ENDP
;VOID
;EfiCpuid (IN UINT32 RegisterInEax,
; OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
EfiCpuid PROC C PUBLIC
push ebp
mov ebp, esp
push ebx
push esi
push edi
pushad
mov eax, dword ptr[ebp + 8] ;egisterInEax
cpuid
cmp dword ptr[ebp + 0Ch], 0 ; Reg
je @F
mov edi,dword ptr [ebp+0Ch] ; Reg
mov dword ptr [edi],eax ; Reg->RegEax
mov dword ptr [edi+4],ebx ; Reg->RegEbx
mov dword ptr [edi+8],ecx ; Reg->RegEcx
mov dword ptr [edi+0Ch],edx ; Reg->RegEdx
@@:
popad
pop edi
pop esi
pop ebx
pop ebp
ret
EfiCpuid ENDP
;UINT64
;EfiReadMsr (
; IN UINT32 Index
; );
EfiReadMsr PROC C PUBLIC
mov ecx, dword ptr [esp + 4]; Index
rdmsr
ret
EfiReadMsr ENDP
;VOID
;EfiWriteMsr (
; IN UINT32 Index,
; IN UINT64 Value
; );
EfiWriteMsr PROC C PUBLIC
mov ecx, dword ptr [esp+4]; Index
mov eax, dword ptr [esp+8]; DWORD PTR Value[0]
mov edx, dword ptr [esp+0Ch]; DWORD PTR Value[4]
wrmsr
ret
EfiWriteMsr ENDP
;UINT64
;EfiReadTsc (
; VOID
; )
EfiReadTsc PROC C PUBLIC
rdtsc
ret
EfiReadTsc ENDP
;VOID
;EfiDisableCache (
; VOID
;)
EfiDisableCache PROC C PUBLIC
mov eax, cr0
bswap eax
and al, 60h
cmp al, 60h
je @F
mov eax, cr0
or eax, 060000000h
mov cr0, eax
wbinvd
@@:
ret
EfiDisableCache ENDP
;VOID
;EfiEnableCache (
; VOID
; )
EfiEnableCache PROC C PUBLIC
wbinvd
mov eax, cr0
and eax, 09fffffffh
mov cr0, eax
ret
EfiEnableCache ENDP
;UINT32
;EfiGetEflags (
; VOID
; )
EfiGetEflags PROC C PUBLIC
pushfd
pop eax
ret
EfiGetEflags ENDP
;VOID
;EfiDisableInterrupts (
; VOID
; )
EfiDisableInterrupts PROC C PUBLIC
cli
ret
EfiDisableInterrupts ENDP
;VOID
;EfiEnableInterrupts (
; VOID
; )
EfiEnableInterrupts PROC C PUBLIC
sti
ret
EfiEnableInterrupts ENDP
;VOID
;EfiCpuidExt (
; IN UINT32 RegisterInEax,
; IN UINT32 CacheLevel,
; OUT EFI_CPUID_REGISTER *Regs
; )
EfiCpuidExt PROC C PUBLIC USES ebx edi esi
pushad
mov eax, dword ptr [esp + 30h] ; RegisterInEax
mov ecx, dword ptr [esp + 34h] ; CacheLevel
cpuid
mov edi, dword ptr [esp + 38h] ; DWORD PTR Regs
mov dword ptr [edi], eax ; Reg->RegEax
mov dword ptr [edi + 4], ebx ; Reg->RegEbx

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/** @file
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CpuIA32.c
Abstract:
--*/
#include <Library/CpuIA32.h>
VOID
EfiHalt (VOID)
{
__asm {
hlt
}
}
VOID
EfiWbinvd (VOID)
{
__asm {
wbinvd
}
}
VOID
EfiInvd (VOID)
{
__asm {
invd
}
}
VOID
EfiCpuid (IN UINT32 RegisterInEax,
OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
{
__asm {
pushad
mov eax, RegisterInEax
cpuid
cmp Reg, 0
je _Exit
mov edi, DWORD PTR Reg
mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax
mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx
mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx
mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx
_Exit:
popad
}
}
UINT64
EfiReadMsr (IN UINT32 Index)
{
__asm {
mov ecx, Index
rdmsr
}
}
VOID
EfiWriteMsr (
IN UINT32 Index,
IN UINT64 Value
)
{
__asm {
mov ecx, Index
mov eax, DWORD PTR Value[0]
mov edx, DWORD PTR Value[4]
wrmsr
}
}
UINT64
EfiReadTsc (VOID)
{
__asm {
rdtsc
}
}
VOID
EfiDisableCache (VOID)
{
__asm {
mov eax, cr0
bswap eax
and al, 60h
cmp al, 60h
je Exit
mov eax, cr0
or eax, 060000000h
mov cr0, eax
wbinvd
Exit:
}
}
VOID
EfiEnableCache (VOID)
{
__asm {
wbinvd
mov eax, cr0
and eax, 09fffffffh
mov cr0, eax
}
}
UINT32
EfiGetEflags (
VOID
)
{
__asm {
pushfd
pop eax
}
}
VOID
EfiDisableInterrupts (VOID)
{
__asm {
cli
}
}
VOID
EfiEnableInterrupts (
VOID
)
{
__asm {
sti
}
}
VOID
EfiCpuidExt (
IN UINT32 RegisterInEax,
IN UINT32 CacheLevel,
OUT EFI_CPUID_REGISTER *Regs
)
{
__asm {
pushad
mov eax, RegisterInEax
mov ecx, CacheLevel
cpuid
mov edi, DWORD PTR Regs