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Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to

Browse Source 
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, 

which are for MinnowBoard MAX open source project.


Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
Reviewed-by: Mike Wu <mike.wu@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Wei
2015-01-12 09:37:20 +00:00
committed by zwei4
parent 6f785cfcc3
commit 3cbfba02fe
518 changed files with 118538 additions and 0 deletions
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227
Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm Normal file
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TITLE Cpu.asm: Assembly code for the x64 resources
;
; This file contains an 'Intel Sample Driver' and is
; licensed for Intel CPUs and chipsets under the terms of your
; license agreement with Intel or your vendor. This file may
; be modified by the user, subject to additional terms of the
; license agreement
;
;
; Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
;
; This program and the accompanying materials are licensed and made available under
; the terms and conditions of the BSD License that accompanies this distribution.
; The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;
;
;
;
;* Module Name:
;*
;* Cpu.asm
;*
;* Abstract:
;*
;------------------------------------------------------------------------------
text SEGMENT
;------------------------------------------------------------------------------
; VOID
; EfiHalt (
; VOID
; )
;------------------------------------------------------------------------------
EfiHalt PROC PUBLIC
hlt
ret
EfiHalt ENDP
;------------------------------------------------------------------------------
; VOID
; EfiWbinvd (
; VOID
; )
;------------------------------------------------------------------------------
EfiWbinvd PROC PUBLIC
wbinvd
ret
EfiWbinvd ENDP
;------------------------------------------------------------------------------
; VOID
; EfiInvd (
; VOID
; )
;------------------------------------------------------------------------------
EfiInvd PROC PUBLIC
invd
ret
EfiInvd ENDP
;------------------------------------------------------------------------------
; VOID
; EfiCpuid (
; IN UINT32 RegisterInEax, // rcx
; OUT EFI_CPUID_REGISTER *Reg OPTIONAL // rdx
; )
;------------------------------------------------------------------------------
EfiCpuid PROC PUBLIC
push rbx
mov r8, rdx ; r8 = *Reg
mov rax, rcx ; RegisterInEax
cpuid
cmp r8, 0
je _Exit
mov [r8 + 0], eax ; Reg->RegEax
mov [r8 + 4], ebx ; Reg->RegEbx
mov [r8 + 8], ecx ; Reg->RegEcx
mov [r8 + 12], edx ; Reg->RegEdx
_Exit:
pop rbx
ret
EfiCpuid ENDP
;------------------------------------------------------------------------------
; UINT64
; EfiReadMsr (
; IN UINT32 Index, // rcx
; )
;------------------------------------------------------------------------------
EfiReadMsr PROC PUBLIC
rdmsr
sal rdx, 32 ; edx:eax -> rax
or rax, rdx ; rax = edx:eax
ret
EfiReadMsr ENDP
;------------------------------------------------------------------------------
; VOID
; EfiWriteMsr (
; IN UINT32 Index, // rcx
; IN UINT64 Value // rdx
; )
;------------------------------------------------------------------------------
EfiWriteMsr PROC PUBLIC
mov rax, rdx ; rdx = Value
sar rdx, 32 ; convert rdx to edx upper 32-bits
wrmsr ; wrmsr[ecx] result = edx:eax
ret
EfiWriteMsr ENDP
;------------------------------------------------------------------------------
; UINT64
; EfiReadTsc (
; VOID
; );
;------------------------------------------------------------------------------
EfiReadTsc PROC PUBLIC
rdtsc
shl rax, 32
shrd rax, rdx, 32
ret
EfiReadTsc ENDP
;------------------------------------------------------------------------------
; VOID
; EfiDisableCache (
; VOID
; );
;------------------------------------------------------------------------------
EfiDisableCache PROC PUBLIC
; added a check to see if cache is already disabled. If it is, then skip.
mov rax, cr0
and rax, 060000000h
cmp rax, 0
jne @f
mov rax, cr0
or rax, 060000000h
mov cr0, rax
wbinvd
@@:
ret
EfiDisableCache ENDP
;------------------------------------------------------------------------------
; VOID
; EfiEnableCache (
; VOID
; );
;------------------------------------------------------------------------------
EfiEnableCache PROC PUBLIC
wbinvd
mov rax, cr0
and rax, 09fffffffh
mov cr0, rax
ret
EfiEnableCache ENDP
;------------------------------------------------------------------------------
; UINTN
; EfiGetEflags (
; VOID
; );
;------------------------------------------------------------------------------
EfiGetEflags PROC PUBLIC
pushfq
pop rax
ret
EfiGetEflags ENDP
;------------------------------------------------------------------------------
; VOID
; EfiDisableInterrupts (
; VOID
; );
;------------------------------------------------------------------------------
EfiDisableInterrupts PROC PUBLIC
cli
ret
EfiDisableInterrupts ENDP
;------------------------------------------------------------------------------
; VOID
; EfiEnableInterrupts (
; VOID
; );
;------------------------------------------------------------------------------
EfiEnableInterrupts PROC PUBLIC
sti
ret
EfiEnableInterrupts ENDP
;------------------------------------------------------------------------------
; VOID
; EfiCpuidExt (
; IN UINT32 RegisterInEax,
; IN UINT32 CacheLevel,
; OUT EFI_CPUID_REGISTER *Regs
; )
;------------------------------------------------------------------------------
EfiCpuidExt PROC PUBLIC
push rbx
mov rax, rcx ; rax = RegisterInEax
mov rcx, rdx ; rcx = CacheLevel
cpuid