Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Wei
zwei4
178
Vlv2TbltDevicePkg/Library/ResetSystemLib/ResetSystemLib.c
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178
Vlv2TbltDevicePkg/Library/ResetSystemLib/ResetSystemLib.c
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/** @file
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Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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IdeBus.h
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Abstract:
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System reset Library Services. This library class provides a set of
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methods to reset whole system with manipulate ICH.
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**/
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#include <Base.h>
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#include <Library/ResetSystemLib.h>
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#include <Library/BaseLib.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PciLib.h>
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#include "PchRegs.h"
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#include "Rsci.h"
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#include "Platform.h"
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#define RESET_GENERATOR_PORT R_PCH_RST_CNT
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VOID
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EFIAPI
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PlatformResetHook (
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UINT8 ResetType
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)
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{
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//
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// Platform need to save OS reset request/types for next Android boot
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//
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IoWrite8 (0x72, CMOS_RESET_TYPE_BY_OS);
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IoWrite8 (0x73, ResetType);
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}
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/**
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Calling this function causes a system-wide reset. This sets
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all circuitry within the system to its initial state. This type of reset
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is asynchronous to system operation and operates without regard to
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cycle boundaries.
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System reset should not return, if it returns, it means the system does
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not support cold reset.
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**/
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VOID
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EFIAPI
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ResetCold (
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VOID
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)
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{
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PlatformResetHook(COLD_RESET);
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IoWrite8 (RESET_GENERATOR_PORT, 0x2);
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IoWrite8 (RESET_GENERATOR_PORT, 0x6);
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}
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/**
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Calling this function causes a system-wide initialization. The processors
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are set to their initial state, and pending cycles are not corrupted.
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System reset should not return, if it returns, it means the system does
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not support warm reset.
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**/
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VOID
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EFIAPI
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ResetWarm (
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VOID
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)
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{
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PlatformResetHook(WARM_RESET);
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IoWrite8 (RESET_GENERATOR_PORT, 0x0);
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IoWrite8 (RESET_GENERATOR_PORT, 0x4);
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}
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/**
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Calling this function causes the system to enter a power state equivalent
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to the ACPI G2/S5 or G3 states.
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System shutdown should not return, if it returns, it means the system does
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not support shut down reset.
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**/
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VOID
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EFIAPI
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ResetShutdown (
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VOID
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)
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{
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UINT16 PchPmioBase;
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UINT16 Data16;
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UINT32 Data32;
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PchPmioBase = (UINT16) (PciRead16 (PCI_LIB_ADDRESS(0, PCI_DEVICE_NUMBER_PCH_LPC, 0, R_PCH_LPC_ACPI_BASE)) & ~BIT0);
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//
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// Then, GPE0_EN should be disabled to avoid any GPI waking up the system from S5
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//
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Data16 = 0;
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IoWrite16 (
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(UINTN)(PchPmioBase + R_PCH_ACPI_GPE0a_EN),
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(UINT16)Data16
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);
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//
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// Clear Sleep SMI Status
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//
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IoWrite16 (PchPmioBase + R_PCH_SMI_STS,
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(UINT16)(IoRead16 (PchPmioBase + R_PCH_SMI_STS) | B_PCH_SMI_STS_ON_SLP_EN));
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//
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// Clear Sleep Type Enable
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//
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IoWrite16 (PchPmioBase + R_PCH_SMI_EN,
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(UINT16)(IoRead16 (PchPmioBase + R_PCH_SMI_EN) & (~B_PCH_SMI_EN_ON_SLP_EN)));
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//
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// Clear Power Button Status
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//
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IoWrite16(PchPmioBase + R_PCH_ACPI_PM1_STS, B_PCH_ACPI_PM1_STS_PWRBTN);
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//
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// Secondly, Power Button Status bit must be cleared
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//
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// Write a "1" to bit[8] of power button status register at
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// (ABASE + PM1_STS) to clear this bit
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// Clear it through SMI Status register
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//
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Data16 = B_PCH_SMI_STS_PM1_STS_REG;
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IoWrite16 ((UINTN) (PchPmioBase + R_PCH_SMI_STS), Data16);
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//
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// Finally, transform system into S5 sleep state
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//
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Data32 = IoRead32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT));
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Data32 = (UINT32) ((Data32 &~(B_PCH_ACPI_PM1_CNT_SLP_TYP + B_PCH_ACPI_PM1_CNT_SLP_EN)) | V_PCH_ACPI_PM1_CNT_S5);
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IoWrite32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT), Data32);
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Data32 = Data32 | B_PCH_ACPI_PM1_CNT_SLP_EN;
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IoWrite32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT), Data32);
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return;
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}
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/**
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Calling this function causes the system to enter a power state for capsule
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update.
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Reset update should not return, if it returns, it means the system does
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not support capsule update.
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**/
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