Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
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186
Vlv2TbltDevicePkg/PlatformInitPei/PlatformInfoInit.c
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186
Vlv2TbltDevicePkg/PlatformInitPei/PlatformInfoInit.c
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/** @file
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Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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PlatformInfoInit.c
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Abstract:
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Platform Info Driver.
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--*/
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#include "PlatformEarlyInit.h"
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#define LEN_64M 0x4000000
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//
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// Default PCI32 resource size
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//
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#define RES_MEM32_MIN_LEN 0x38000000
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#define RES_IO_BASE 0x0D00
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#define RES_IO_LIMIT 0xFFFF
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#define MemoryCeilingVariable L"MemCeil."
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EFI_STATUS
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CheckOsSelection (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN SYSTEM_CONFIGURATION *SystemConfiguration
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)
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{
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EFI_STATUS Status;
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EFI_PEI_READ_ONLY_VARIABLE2_PPI *Variable;
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UINTN VariableSize;
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EFI_OS_SELECTION_HOB *OsSelectionHob;
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UINT8 OsSelection;
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UINT8 *LpssDataHobPtr;
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UINT8 *LpssDataVarPtr;
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UINTN i;
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Status = (*PeiServices)->LocatePpi (
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PeiServices,
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&gEfiPeiReadOnlyVariable2PpiGuid,
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0,
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NULL,
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(void **)&Variable
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);
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if (!EFI_ERROR(Status)) {
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VariableSize = sizeof (OsSelection);
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Status = Variable->GetVariable (
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Variable,
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L"OsSelection",
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&gOsSelectionVariableGuid,
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NULL,
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&VariableSize,
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&OsSelection
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);
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if (!EFI_ERROR(Status) && (SystemConfiguration->ReservedO != OsSelection)) {
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//
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// Build HOB for OsSelection
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//
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OsSelectionHob = BuildGuidHob (&gOsSelectionVariableGuid, sizeof (EFI_OS_SELECTION_HOB));
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ASSERT (OsSelectionHob != NULL);
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OsSelectionHob->OsSelectionChanged = TRUE;
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OsSelectionHob->OsSelection = OsSelection;
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SystemConfiguration->ReservedO = OsSelectionHob->OsSelection;
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//
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// Load LPSS and SCC defalut configurations
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//
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OsSelectionHob->LpssData.LpsseMMCEnabled = FALSE;
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OsSelectionHob->LpssData.LpssSdioEnabled = TRUE;
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OsSelectionHob->LpssData.LpssSdcardEnabled = TRUE;
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OsSelectionHob->LpssData.LpssSdCardSDR25Enabled = FALSE;
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OsSelectionHob->LpssData.LpssSdCardDDR50Enabled = TRUE;
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OsSelectionHob->LpssData.LpssMipiHsi = FALSE;
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OsSelectionHob->LpssData.LpsseMMC45Enabled = TRUE;
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OsSelectionHob->LpssData.LpsseMMC45DDR50Enabled = TRUE;
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OsSelectionHob->LpssData.LpsseMMC45HS200Enabled = FALSE;
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OsSelectionHob->LpssData.LpsseMMC45RetuneTimerValue = 8;
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OsSelectionHob->LpssData.eMMCBootMode = 1; // Auto Detect
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SystemConfiguration->Lpe = OsSelectionHob->Lpe;
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SystemConfiguration->PchAzalia = SystemConfiguration->PchAzalia;
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LpssDataHobPtr = &OsSelectionHob->LpssData.LpssPciModeEnabled;
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LpssDataVarPtr = &SystemConfiguration->LpssPciModeEnabled;
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for (i = 0; i < sizeof(EFI_PLATFORM_LPSS_DATA); i++) {
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*LpssDataVarPtr = *LpssDataHobPtr;
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LpssDataVarPtr++;
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LpssDataHobPtr++;
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}
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}
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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PlatformInfoUpdate (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob,
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IN SYSTEM_CONFIGURATION *SystemConfiguration
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)
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{
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EFI_STATUS Status;
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EFI_PEI_READ_ONLY_VARIABLE2_PPI *Variable;
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UINTN VariableSize;
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UINT32 MemoryCeiling;
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//
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// Checking PCI32 resource from previous boot to determine the memory ceiling
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//
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Status = (*PeiServices)->LocatePpi (
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PeiServices,
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&gEfiPeiReadOnlyVariable2PpiGuid,
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0,
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NULL,
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(void **)&Variable
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);
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if (!EFI_ERROR(Status)) {
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//
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// Get the memory ceiling
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//
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VariableSize = sizeof(MemoryCeiling);
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Status = Variable->GetVariable (
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Variable,
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MemoryCeilingVariable,
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&gEfiGlobalVariableGuid,
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NULL,
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&VariableSize,
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&MemoryCeiling
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);
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if(!EFI_ERROR(Status)) {
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//
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// Set the new PCI32 resource Base if the variable available
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//
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PlatformInfoHob->PciData.PciResourceMem32Base = MemoryCeiling;
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PlatformInfoHob->MemData.MemMaxTolm = MemoryCeiling;
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PlatformInfoHob->MemData.MemTolm = MemoryCeiling;
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//
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// Platform PCI MMIO Size in unit of 1MB
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//
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PlatformInfoHob->MemData.MmioSize = 0x1000 - (UINT16)(PlatformInfoHob->MemData.MemMaxTolm >> 20);
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Initialize the platform related info hob according to the
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pre-determine value or setup option
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@retval EFI_SUCCESS Memory initialization completed successfully.
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@retval Others All other error conditions encountered result in an ASSERT.
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**/
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EFI_STATUS
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InitializePlatform (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob,
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