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Remove hard code value and create new PCDs for OpROM reserved range in CSM module.

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Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13991 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
li-elvin
2012-12-12 07:47:33 +00:00
parent b3d4217001
commit 3e5eb44701
3 changed files with 29 additions and 2 deletions
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17
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
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@ -682,6 +682,7 @@ LegacyBiosInstall (
LEGACY_BIOS_INSTANCE *Private; LEGACY_BIOS_INSTANCE *Private;
EFI_TO_COMPATIBILITY16_INIT_TABLE *EfiToLegacy16InitTable; EFI_TO_COMPATIBILITY16_INIT_TABLE *EfiToLegacy16InitTable;
EFI_PHYSICAL_ADDRESS MemoryAddress; EFI_PHYSICAL_ADDRESS MemoryAddress;
EFI_PHYSICAL_ADDRESS EbdaReservedBaseAddress;
VOID *MemoryPtr; VOID *MemoryPtr;
EFI_PHYSICAL_ADDRESS MemoryAddressUnder1MB; EFI_PHYSICAL_ADDRESS MemoryAddressUnder1MB;
UINTN Index; UINTN Index;
@ -880,9 +881,21 @@ LegacyBiosInstall (
// //
// Allocate all 32k chunks from 0x60000 ~ 0x88000 for Legacy OPROMs that // Allocate all 32k chunks from 0x60000 ~ 0x88000 for Legacy OPROMs that
// don't use PMM but look for zeroed memory. Note that various non-BBS // don't use PMM but look for zeroed memory. Note that various non-BBS
// SCSIs expect different areas to be free // OpROMs expect different areas to be free
// //
for (MemStart = 0x60000; MemStart < 0x88000; MemStart += 0x1000) { EbdaReservedBaseAddress = MemoryAddress;
MemoryAddress = PcdGet32 (PcdOpromReservedMemoryBase);
MemorySize = PcdGet32 (PcdOpromReservedMemorySize);
//
// Check if base address and size for reserved memory are 4KB aligned.
//
ASSERT ((MemoryAddress & 0xFFF) == 0);
ASSERT ((MemorySize & 0xFFF) == 0);
//
// Check if the reserved memory is below EBDA reserved range.
//
ASSERT ((MemoryAddress < EbdaReservedBaseAddress) && ((MemoryAddress + MemorySize - 1) < EbdaReservedBaseAddress));
for (MemStart = MemoryAddress; MemStart < MemoryAddress + MemorySize; MemStart += 0x1000) {
Status = AllocateLegacyMemory ( Status = AllocateLegacyMemory (
AllocateAddress, AllocateAddress,
MemStart, MemStart,

2
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf
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@ -140,6 +140,8 @@
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEndOpromShadowAddress gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEndOpromShadowAddress
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLowPmmMemorySize gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLowPmmMemorySize
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdHighPmmMemorySize gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdHighPmmMemorySize
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemoryBase
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemorySize
[Depex] [Depex]
gEfiLegacyRegion2ProtocolGuid AND gEfiLegacyInterruptProtocolGuid AND gEfiLegacyBiosPlatformProtocolGuid AND gEfiLegacy8259ProtocolGuid AND gEfiGenericMemTestProtocolGuid AND gEfiCpuArchProtocolGuid AND gEfiTimerArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid gEfiLegacyRegion2ProtocolGuid AND gEfiLegacyInterruptProtocolGuid AND gEfiLegacyBiosPlatformProtocolGuid AND gEfiLegacy8259ProtocolGuid AND gEfiGenericMemTestProtocolGuid AND gEfiCpuArchProtocolGuid AND gEfiTimerArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid

12
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
View File

@ -199,6 +199,18 @@
## The value should be a multiple of 4KB. ## The value should be a multiple of 4KB.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x30000005 gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x30000005
## The PCD is used to specify memory base address for OPROM to find free memory.
# Some OPROMs do not use EBDA or PMM to allocate memory for its usage,
# instead they find the memory filled with zero from 0x20000.
# The range should be below the EBDA reserved range from
# (CONVENTIONAL_MEMORY_TOP - PcdEbdaReservedMemorySize) to CONVENTIONAL_MEMORY_TOP.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x3000000c
## The PCD is used to specify memory size with bytes for OPROM to find free memory.
## The value should be a multiple of 4KB. And the range should be below the EBDA reserved range from
# (CONVENTIONAL_MEMORY_TOP - PcdEbdaReservedMemorySize) to CONVENTIONAL_MEMORY_TOP.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x3000000d
## The PCD is used to specify memory size with page number for a pre-allocated reserved memory to be used ## The PCD is used to specify memory size with page number for a pre-allocated reserved memory to be used
# by PEI in S3 phase. The default size 32K. When changing the value of this PCD, the platform # by PEI in S3 phase. The default size 32K. When changing the value of this PCD, the platform
# developer should make sure the memory size is large enough to meet PEI requiremnt in S3 phase. # developer should make sure the memory size is large enough to meet PEI requiremnt in S3 phase.