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Add in the 1st version of ECP.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2832 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qwang12
2007-06-28 07:00:39 +00:00
parent 30d4a0c7ec
commit 3eb9473ea9
1433 changed files with 266617 additions and 0 deletions
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42
EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/CpuIA32Lib.inf Normal file
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#/*++
#
# Copyright (c) 2004 - 2005, Intel Corporation
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# CpuIA32Lib.inf
#
# Abstract:
#
# Component description file for the Cpu IA32 library.
#
#--*/
[defines]
BASE_NAME = CpuIA32Lib
COMPONENT_TYPE = LIBRARY
[sources.common]
EfiCpuVersion.c
[sources.ia32]
Ia32\CpuIA32.c
[sources.x64]
x64\Cpu.asm
[includes.common]
$(EDK_SOURCE)\Foundation\Efi
$(EDK_SOURCE)\Foundation\Efi\Include
$(EDK_SOURCE)\Foundation\Framework\Include
.
$(EDK_SOURCE)\Foundation\Cpu\Pentium\Include
$(EDK_SOURCE)\Foundation\Include
[nmake.common]

73
EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/EfiCpuVersion.c Normal file
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/*++
Copyright (c) 2004 - 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
EfiCpuVersion.c
Abstract:
Provide cpu version extract considering extended family & model ID.
--*/
#include "CpuIA32.h"
VOID
EfiCpuVersion (
IN OUT UINT16 *FamilyId, OPTIONAL
IN OUT UINT8 *Model, OPTIONAL
IN OUT UINT8 *SteppingId, OPTIONAL
IN OUT UINT8 *Processor OPTIONAL
)
/*++
Routine Description:
Extract CPU detail version infomation
Arguments:
FamilyId - FamilyId, including ExtendedFamilyId
Model - Model, including ExtendedModel
SteppingId - SteppingId
Processor - Processor
--*/
{
EFI_CPUID_REGISTER Register;
UINT8 TempFamilyId;
EfiCpuid (EFI_CPUID_VERSION_INFO, &Register);
if (SteppingId != NULL) {
*SteppingId = (UINT8) (Register.RegEax & 0xF);
}
if (Processor != NULL) {
*Processor = (UINT8) ((Register.RegEax >> 12) & 0x3);
}
if (Model != NULL || FamilyId != NULL) {
TempFamilyId = (UINT8) ((Register.RegEax >> 8) & 0xF);
if (Model != NULL) {
*Model = (UINT8) ((Register.RegEax >> 4) & 0xF);
if (TempFamilyId == 0x6 || TempFamilyId == 0xF) {
*Model |= (Register.RegEax >> 12) & 0xF0;
}
}
if (FamilyId != NULL) {
*FamilyId = TempFamilyId;
if (TempFamilyId == 0xF) {
*FamilyId = *FamilyId + (UINT16) ((Register.RegEax >> 20) & 0xFF);
}
}
}
}

179
EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.c Normal file
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/*++
Copyright (c) 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
CpuIA32.c
Abstract:
--*/
#include "CpuIA32.h"
VOID
EfiHalt (VOID)
{
__asm {
hlt
}
}
VOID
EfiWbinvd (VOID)
{
__asm {
wbinvd
}
}
VOID
EfiInvd (VOID)
{
__asm {
invd
}
}
VOID
EfiCpuid (IN UINT32 RegisterInEax,
OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
{
__asm {
pushad
mov eax, RegisterInEax
cpuid
cmp Reg, 0
je _Exit
mov edi, DWORD PTR Reg
mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax
mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx
mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx
mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx
_Exit:
popad
}
}
UINT64
EfiReadMsr (IN UINT32 Index)
{
__asm {
mov ecx, Index
rdmsr
}
}
VOID
EfiWriteMsr (
IN UINT32 Index,
IN UINT64 Value
)
{
__asm {
mov ecx, Index
mov eax, DWORD PTR Value[0]
mov edx, DWORD PTR Value[4]
wrmsr
}
}
UINT64
EfiReadTsc (VOID)
{
__asm {
rdtsc
}
}
VOID
EfiDisableCache (VOID)
{
__asm {
mov eax, cr0
bswap eax
and al, 60h
cmp al, 60h
je Exit
wbinvd
mov eax, cr0
or eax, 060000000h
mov cr0, eax
Exit:
}
}
VOID
EfiEnableCache (VOID)
{
__asm {
invd
mov eax, cr0
and eax, 09fffffffh
mov cr0, eax
}
}
UINT32
EfiGetEflags (
VOID
)
{
__asm {
pushfd
pop eax
}
}
VOID
EfiDisableInterrupts (VOID)
{
__asm {
cli
}
}
VOID
EfiEnableInterrupts (
VOID
)
{
__asm {
sti
}
}
VOID
EfiCpuidExt (
IN UINT32 RegisterInEax,
IN UINT32 CacheLevel,
OUT EFI_CPUID_REGISTER *Regs
)
{
__asm {
pushad
mov eax, RegisterInEax
mov ecx, CacheLevel
cpuid
mov edi, DWORD PTR Regs
mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax
mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx
mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx
mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx
popad
}
}

215
EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/x64/Cpu.asm Normal file
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TITLE Cpu.asm: Assembly code for the x64 resources
;------------------------------------------------------------------------------
;*
;* Copyright (c) 2005 - 2007, Intel Corporation
;* All rights reserved. This program and the accompanying materials
;* are licensed and made available under the terms and conditions of the BSD License
;* which accompanies this distribution. The full text of the license may be found at
;* http://opensource.org/licenses/bsd-license.php
;*
;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;*
;* Module Name:
;*
;* Cpu.asm
;*
;* Abstract:
;*
;------------------------------------------------------------------------------
text SEGMENT
;------------------------------------------------------------------------------
; VOID
; EfiHalt (
; VOID
; )
;------------------------------------------------------------------------------
EfiHalt PROC PUBLIC
hlt
ret
EfiHalt ENDP
;------------------------------------------------------------------------------
; VOID
; EfiWbinvd (
; VOID
; )
;------------------------------------------------------------------------------
EfiWbinvd PROC PUBLIC
wbinvd
ret
EfiWbinvd ENDP
;------------------------------------------------------------------------------
; VOID
; EfiInvd (
; VOID
; )
;------------------------------------------------------------------------------
EfiInvd PROC PUBLIC
invd
ret
EfiInvd ENDP
;------------------------------------------------------------------------------
; VOID
; EfiCpuid (
; IN UINT32 RegisterInEax, // rcx
; OUT EFI_CPUID_REGISTER *Reg OPTIONAL // rdx
; )
;------------------------------------------------------------------------------
EfiCpuid PROC PUBLIC
push rbx
mov r8, rdx ; r8 = *Reg
mov rax, rcx ; RegisterInEax
cpuid
cmp r8, 0
je _Exit
mov [r8 + 0], eax ; Reg->RegEax
mov [r8 + 4], ebx ; Reg->RegEbx
mov [r8 + 8], ecx ; Reg->RegEcx
mov [r8 + 12], edx ; Reg->RegEdx
_Exit:
pop rbx
ret
EfiCpuid ENDP
;------------------------------------------------------------------------------
; UINT64
; EfiReadMsr (
; IN UINT32 Index, // rcx
; )
;------------------------------------------------------------------------------
EfiReadMsr PROC PUBLIC
rdmsr
sal rdx, 32 ; edx:eax -> rax
or rax, rdx ; rax = edx:eax
ret
EfiReadMsr ENDP
;------------------------------------------------------------------------------
; VOID
; EfiWriteMsr (
; IN UINT32 Index, // rcx
; IN UINT64 Value // rdx
; )
;------------------------------------------------------------------------------
EfiWriteMsr PROC PUBLIC
mov rax, rdx ; rdx = Value
sar rdx, 32 ; convert rdx to edx upper 32-bits
wrmsr ; wrmsr[ecx] result = edx:eax
ret
EfiWriteMsr ENDP
;------------------------------------------------------------------------------
; UINT64
; EfiReadTsc (
; VOID
; );
;------------------------------------------------------------------------------
EfiReadTsc PROC PUBLIC
rdtsc
shl rax, 32
shrd rax, rdx, 32
ret
EfiReadTsc ENDP
;------------------------------------------------------------------------------
; VOID
; EfiDisableCache (
; VOID
; );
;------------------------------------------------------------------------------
EfiDisableCache PROC PUBLIC
; added a check to see if cache is already disabled. If it is, then skip.
mov rax, cr0
and rax, 060000000h
cmp rax, 0
jne @f
wbinvd
mov rax, cr0
or rax, 060000000h
mov cr0, rax
@@:
ret
EfiDisableCache ENDP
;------------------------------------------------------------------------------
; VOID
; EfiEnableCache (
; VOID
; );
;------------------------------------------------------------------------------
EfiEnableCache PROC PUBLIC
invd
mov rax, cr0
and rax, 09fffffffh
mov cr0, rax
ret
EfiEnableCache ENDP
;------------------------------------------------------------------------------
; UINTN
; EfiGetEflags (
; VOID
; );
;------------------------------------------------------------------------------
EfiGetEflags PROC PUBLIC
pushfq
pop rax
ret
EfiGetEflags ENDP
;------------------------------------------------------------------------------
; VOID
; EfiDisableInterrupts (
; VOID
; );
;------------------------------------------------------------------------------
EfiDisableInterrupts PROC PUBLIC
cli
ret
EfiDisableInterrupts ENDP
;------------------------------------------------------------------------------
; VOID
; EfiEnableInterrupts (
; VOID
; );
;------------------------------------------------------------------------------
EfiEnableInterrupts PROC PUBLIC
sti
ret
EfiEnableInterrupts ENDP
;------------------------------------------------------------------------------
; VOID
; EfiCpuidExt (
; IN UINT32 RegisterInEax,
; IN UINT32 CacheLevel,
; OUT EFI_CPUID_REGISTER *Regs
; )
;------------------------------------------------------------------------------
EfiCpuidExt PROC PUBLIC
push rbx
mov rax, rcx ; rax = RegisterInEax
mov rcx, rdx ; rcx = CacheLevel
cpuid
mov [r8 + 0 ], eax ; Reg->RegEax
mov [r8 + 4 ], ebx ; Reg->RegEbx
mov [r8 + 8 ], ecx ; Reg->RegEcx
mov [r8 + 12], edx ; Reg->RegEdx
pop rbx
ret
EfiCpuidExt ENDP
END