diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 620b0136c5..79b7c90a80 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -943,7 +943,7 @@ SmmStartupThisAp (
 }
 
 /**
-  This funciton sets DR6 & DR7 according to SMM save state, before running SMM C code.
+  This function sets DR6 & DR7 according to SMM save state, before running SMM C code.
   They are useful when you want to enable hardware breakpoints in SMM without entry SMM mode.
 
   NOTE: It might not be appreciated in runtime since it might
@@ -961,7 +961,7 @@ CpuSmmDebugEntry (
   SMRAM_SAVE_STATE_MAP *CpuSaveState;
   
   if (FeaturePcdGet (PcdCpuSmmDebug)) {
-    CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmst->CpuSaveState[CpuIndex];
+    CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
     if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
       AsmWriteDr6 (CpuSaveState->x86._DR6);
       AsmWriteDr7 (CpuSaveState->x86._DR7);
@@ -973,7 +973,7 @@ CpuSmmDebugEntry (
 }
 
 /**
-  This funciton restores DR6 & DR7 to SMM save state.
+  This function restores DR6 & DR7 to SMM save state.
 
   NOTE: It might not be appreciated in runtime since it might
         conflict with OS debugging facilities. Turn them off in RELEASE.
@@ -990,7 +990,7 @@ CpuSmmDebugExit (
   SMRAM_SAVE_STATE_MAP *CpuSaveState;
 
   if (FeaturePcdGet (PcdCpuSmmDebug)) {
-    CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmst->CpuSaveState[CpuIndex];
+    CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
     if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
       CpuSaveState->x86._DR7 = (UINT32)AsmReadDr7 ();
       CpuSaveState->x86._DR6 = (UINT32)AsmReadDr6 ();