sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

MdePkg: Add a new library named PeiServicesTablePointerLibKs0

Browse Source 
Adding PeiServicesTablePointerLibKs0 for LoongArch64, which provides
setting and getting the PEI service table pointer through the CSR KS0
register.

The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Chao Li
2023-12-01 17:29:01 +08:00
committed by Liming Gao
parent bc0b418cba
commit 3f8fb8aeb9
5 changed files with 152 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
MdePkg/Include/Library/PeiServicesTablePointerLib.h
View File

@@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
a dedicated CPU register. This means that there is no memory storage
associated with storing the PEI Services Table pointer, so no additional
migration actions are required for Itanium or ARM CPUs.
For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
is stored in a dedicated CPU register. This means that there is no
memory storage associated with storing the PEI Services Table pointer,
so no additional migration actions are required for Itanium, ARM and
LoongArch CPUs.
**/
VOID